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Electrical and Electronics Engineering publications abstract of: 09-2012 sorted by title, page: 0
» (110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation
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Highlights

Appeared in: Solid-State Electronics
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 0.5V bulk-driven analog building blocks
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Autors:
Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 1-1-1 MASH Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping
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Two 1-1-1 MASH time-to-digital converters (TDCs) are presented in this paper. Third-order time domain noise-shaping has been adopted by the TDCs to achieve better than 6 ps resolution. Following a detailed analysis of the noise generation and propagation in the MASH structure, the first prototyping TDC has been realized in CMOS technology. It achieves an ENOB of 11 bits and consumes 1.7 mW from a 1.2 V supply. In the second MASH TDC, a delay-line assisted calibration technique is introduced to mitigate the phase skew caused by the large comparator delay, which is the main limiting factor of the MASH TDC's resolution. The demonstrated TDC achieves an ENOB of 13 bits and a wide input range of 100 ns. This TDC shows a temperature coefficient of within a temperature range of to . It consumes only 0.7 mW and occupies area (core).
Autors: Cao, Y.;De Cock, W.;Steyaert, M.;Leroux, P.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2093 - 2106
Publisher: IEEE
 
» 10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS
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We describe transmitter and receiver circuits for a 10-Gbps single-ended optical link in a 40-nm CMOS technology. The circuits are bonded using low-parasitic micro-solder bumps to silicon photonic devices on a 130-nm SOI platform. The transmitter drives oval resonant ring modulators with a 2-V swing and employs static thermal tuners to compensate for optical device process variations. The receiver is based on a transimpedance amplifier (TIA) with 4- gain and designed for an input power of 15 dBm, a photodiode responsivity of 0.7 A/W, and an input extinction ratio of 6 dB. It employs a pair of interleaved clocked sense-amplifiers for voltage slicing and uses a DLL with phase adjustment for centering the clock in the data eye. Periodic calibration allows for adjustment of both voltage and timing margins. At 10 Gbps, the transmitter extinction ratio exceeds 7 dB and, excluding thermal tuning and laser power, it consumes 1.35 mW. At the same datarate, the receiver consumes 3.95 mW. On-chip PRBS generators and checkers with sequences confirm operation at a BER better than .
Autors: Liu, F. Y.;Patil, D.;Lexau, J.;Amberg, P.;Dayringer, M.;Gainsley, J.;Moghadam, H. F.;Zheng, X.;Cunningham, J. E.;Krishnamoorthy, A. V.;Alon, E.;Ho, R.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2049 - 2067
Publisher: IEEE
 
» 10.7-Gb/s Discrete Multitone Transmission Over 50-m SI-POF Based on WDM Technology
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The capacity of the transmission link based on standard 1-mm core-diameter step-index plastic optical fiber (SI-POF) is strictly limited due to the strong attenuation and inter-modal dispersion. Parallel transmission of the data streams using several optical carriers might overcome the mentioned limits and allows for low-bandwidth transmitters and receivers. In this letter, we demonstrate the implementation of wavelength-division multiplexing technology with three laser diodes operating at 405, 515, and 650 nm with , , and fiber-coupled power. The 10.7-Gb/s data transmission based on the offline-processed discrete multitone modulation technique has been realized over 50-m SI-POF at the bit-error ratio of .
Autors: Kruglov, R.;Vinogradov, J.;Ziemann, O.;Loquai, S.;Bunge, C.-A.;
Appeared in: IEEE Photonics Technology Letters
Publication date: Sep 2012, volume: 24, issue:18, pages: 1632 - 1634
Publisher: IEEE
 
» 130-GHz On-Chip Meander Slot Antennas With Stacked Dielectric Resonators in Standard CMOS Technology
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This work discusses the design methodologies of 130-GHz high gain and high efficiency on-chip meander slot antennas in a standard CMOS technology. In the proposed structure, stacked dielectric resonators (DRs) are placed on the top of the on-chip feeding element to form series-fed antenna array for antenna gain and efficiency improvement. The integrated antenna with double stacked DRs achieved a measured gain of 4.7 dBi at 130 GHz with a bandwidth of 11%. The antenna size is and the simulation results indicate a radiation efficiency of 43%. To the best of our knowledge, this is the first demonstration of an on-chip antenna gain and efficiency enhancement through stacked DRs.
Autors: Hou, D.;Xiong, Y.-Z.;Goh, W.-L.;Hu, S.;Hong, W.;Madihian, M.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Sep 2012, volume: 60, issue:9, pages: 4102 - 4109
Publisher: IEEE
 
» 15% efficient Cu(In,Ga)Se2 solar cells obtained by low-temperature pulsed electron deposition
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An approach to low-cost production of Cu(In,Ga)Se2 (CIGS) solar cells based on pulsed electron deposition (PED) has achieved a crucial milestone. Lab-scale solar cells with efficiencies exceeding 15% were obtained by depositing CIGS from a stoichiometric quaternary target at 270 °C and without any post-growth treatment. An effective control of the p-doping level in CIGS was achieved by starting the PED deposition with a layer of NaF tailored to generate the optimum Na diffusion. These results show that PED is a promising technology for the development of a competitive low-cost production process for CIGS solar cells.
Autors: Rampino, S.;Armani, N.;Bissoli, F.;Bronzoni, M.;Calestani, D.;Calicchio, M.;Delmonte, N.;Gilioli, E.;Gombia, E.;Mosca, R.;Nasi, L.;Pattini, F.;Zappettini, A.;Mazzer, M.;
Appeared in: Applied Physics Letters
Publication date: Sep 2012, volume: 101, issue:13, pages: 132107 - 132107-4
Publisher: IEEE
 
» 1550 nm ErAs:In(Al)GaAs large area photoconductive emitters
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We report on high power terahertz (THz) emission from ErAs-enhanced In0.52Al0.48As-In0.53Ga0.47As superlattices for operation at 1550 nm. ErAs clusters act as efficient recombination centers. The optical power is distributed among a large, microstructured area in order to reduce the local optical intensity. A THz field strength of 0.7 V/cm (1 V/cm peak-to-peak) at 100 mW average optical power has been obtained, with emission up to about 4 THz in air, limited by the detection crystal used in the system.
Autors: Preu, S.;Mittendorff, M.;Lu, H.;Weber, H. B.;Winnerl, S.;Gossard, A. C.;
Appeared in: Applied Physics Letters
Publication date: Sep 2012, volume: 101, issue:10, pages: 101105 - 101105-4
Publisher: IEEE
 
» 2-D sizing of sodium oxalate crystals by automated optical image analysis
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Appeared in: Advanced Powder Technology
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 200-V Lateral Superjunction LIGBT on Partial SOI
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This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18- partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an of 765 . It exhibits half the value of specific on-state resistance and three times higher saturation current for the same BV, compared to a comparable lateral superjunction laterally diffused metal–oxide–semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in at 175 , compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18- PSOI HV process.
Autors: Kho, E. C. T.;Hoelke, A. D.;Pilkington, S. J.;Pal, D. K.;Wan Zainal Abidin, W. A.;Ng, L. Y.;Antoniou, M.;Udrea, F.;
Appeared in: IEEE Electron Device Letters
Publication date: Sep 2012, volume: 33, issue:9, pages: 1291 - 1293
Publisher: IEEE
 
» 2011 IEEE Visualization Contest Winner: Visualizing Unsteady Vortical Behavior of a Centrifugal Pump
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In the 2011 IEEE Visualization Contest, the dataset represented a high-resolution simulation of a centrifugal pump operating below optimal speed. The goal was to find suitable visualization techniques to identify regions of rotating stall that impede the pump's effectiveness. The winning entry split analysis of the pump into three parts based on the pump's functional behavior. It then applied local and integration-based methods to communicate the unsteady flow behavior in different regions of the dataset. This research formed the basis for a comparison of common vortex extractors and more recent methods. In particular, integration-based methods (separation measures, accumulated scalar fields, particle path lines, and advection textures) are well suited to capture the complex time-dependent flow behavior. This video (http://youtu.be/oD7QuabY0oU) shows simulations of unsteady flow in a centrifugal pump.
Autors: Otto, Mathias;Kuhn, Alexander;Engelke, Wito;Theisel, Holger;
Appeared in: IEEE Computer Graphics and Applications
Publication date: Sep 2012, volume: 32, issue:5, pages: 12 - 19
Publisher: IEEE
 
» 2012 Industrial Electronics Society Awards [Society News]
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Autors: Rodriguez-Andina, J.J.;
Appeared in: IEEE Industrial Electronics Magazine
Publication date: Sep 2012, volume: 6, issue:3, pages: 58 - 58
Publisher: IEEE
 
» 2012 VLSI-TSA and VSLI-DAT Attract Nearly 800 in April: Twin Conferences Feature Joint Plenary and Special Sessions [Conference Reports]
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Autors: Chu, S.;Ho, E.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Sep 2012, volume: 4, issue:3, pages: 98 - 100
Publisher: IEEE
 
» 3-D modeling and analysis of meander-line-coil surface wave EMATs
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Appeared in: Mechatronics
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 3-D Modeling From a Single View of a Symmetric Object
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3-D technologies are considered as the next generation of multimedia applications. Currently, one of the challenges faced by 3-D applications is the shortage of 3-D resources. To solve this problem, many 3-D modeling methods are proposed to directly recover 3-D geometry from 2-D images. However, these methods on single view modeling either require intensive user interaction, or are restricted to a specific kind of object. In this paper, we propose a novel 3-D modeling approach to recover 3-D geometry from a single image of a symmetric object with minimal user interaction. Symmetry is one of the most common properties of natural or manmade objects. Given a single view of a symmetric object, the user marks some symmetric lines and depth discontinuity regions on the image. Our algorithm first finds a set of planes to approximately fit to the object, and then a rough 3-D point cloud is generated by an optimization procedure. The occluded part of the object is further recovered using symmetry information. Experimental results on various indoor and outdoor objects show that the proposed system can obtain 3-D models from single images with only a little user interaction.
Autors: Xue, T.;Liu, J.;Tang, X.;
Appeared in: IEEE Transactions on Image Processing
Publication date: Sep 2012, volume: 21, issue:9, pages: 4180 - 4189
Publisher: IEEE
 
» 3-D Object Retrieval and Recognition With Hypergraph Analysis
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View-based 3-D object retrieval and recognition has become popular in practice, e.g., in computer aided design. It is difficult to precisely estimate the distance between two objects represented by multiple views. Thus, current view-based 3-D object retrieval and recognition methods may not perform well. In this paper, we propose a hypergraph analysis approach to address this problem by avoiding the estimation of the distance between objects. In particular, we construct multiple hypergraphs for a set of 3-D objects based on their 2-D views. In these hypergraphs, each vertex is an object, and each edge is a cluster of views. Therefore, an edge connects multiple vertices. We define the weight of each edge based on the similarities between any two views within the cluster. Retrieval and recognition are performed based on the hypergraphs. Therefore, our method can explore the higher order relationship among objects and does not use the distance between objects. We conduct experiments on the National Taiwan University 3-D model dataset and the ETH 3-D object collection. Experimental results demonstrate the effectiveness of the proposed method by comparing with the state-of-the-art methods.
Autors: Gao, Y.;Wang, M.;Tao, D.;Ji, R.;Dai, Q.;
Appeared in: IEEE Transactions on Image Processing
Publication date: Sep 2012, volume: 21, issue:9, pages: 4290 - 4303
Publisher: IEEE
 
» 33rd Annual CICC Will Convene on 9??12 September 2012 in San Jose [Conference Reports]
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Autors: Suyama, K.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Sep 2012, volume: 4, issue:3, pages: 100 - 101
Publisher: IEEE
 
» 35.5 GHz Parametric CMOS Upconverter
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Parametric circuit techniques are a promising means of applying CMOS to millimeter-wave (mm-wave) and sub-mm-wave front-ends. However, almost no experimental results are available for these circuits in modern silicon technologies. In this letter, a parametric 0.5-to-35.5 GHz upconverter based on an accumulation-mode MOS varactor (AMOSV) is implemented in 0.13 CMOS technology. It achieves a maximum conversion gain of 14 dB in the upper sideband (USB) configuration and 13 dB in the lower sideband (LSB) configuration with no dc power consumption. In the design, on-chip slow-wave coplanar waveguide interconnections are used for reducing layout area.
Autors: Zhao, Z.;Magierowski, S.;Belostotski, L.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Sep 2012, volume: 22, issue:9, pages: 477 - 479
Publisher: IEEE
 
» 3D model based tracking for omnidirectional vision: A new spherical approach
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Appeared in: Robotics and Autonomous Systems
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 3D modified unitary matrix pencil method with automatic grouping of unknown parameters of far field signals
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Appeared in: Digital Signal Processing
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 3D numerical model of the electrostatic coating process with moving objects using a moving mesh
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Appeared in: Journal of Electrostatics
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 3D thermal-aware floorplanner using a MILP approximation
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Appeared in: Microprocessors and Microsystems
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 3D Whole Body Imaging for Detecting Explosive-Related Threats
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The aim of the millimeter-wave imaging system presented in this work is to produce accurate geometry reconstruction of the human body torso and objects concealed under clothing detection. To this effect, two techniques will be combined. First, an inverse source-based fast multipole method which provides a first approach to the true human body torso profile is considered. Second, the retrieved geometry is refined with the Iterative Field Matrix technique, based on a parameterization of the geometry to be retrieved. Assuming smooth variations of the human body profile, objects' detection is performed by comparing the retrieved surface with a smoothed one. The results presented in this communication are based on physical optics simulations of the human body, considering cases with and without objects.
Autors: Alvarez, Y.;Gonzalez-Valdes, B.;Martinez, J. Á.;Las-Heras, F.;Rappaport, C. M.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Sep 2012, volume: 60, issue:9, pages: 4453 - 4458
Publisher: IEEE
 
» 40 Gb/s Low-Power 4:1 Multiplexer Based on Resonant Tunneling Diodes
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An integrated resonant tunneling diode (RTD)-based 4:1 multiplexer core for low power consumption and high-speed operation is proposed. The proposed 4:1 multiplexer core is designed based on a power-efficient negative differential resistance (NDR) circuit topology, which actively utilizes the unique NDR characteristics of the RTD. The proposed IC is comprised of two RTD-based 2:1 multiplexers and a 2:1 selector. The designed IC has been fabricated using an InP RTD/heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit technology, which is optimized by introducing an undercut process in the stacked RTD/HBT epistructure. A low power consumption of 75 mW at a supply voltage of –2.9 V has been achieved at a speed up to 40 Gb/s. The implemented IC, which has a higher complexity than monolithically integrated RTD/transistor digital circuits reported to date, is the first demonstration of a low-power high-speed 4:1 multiplexer IC based on an NDR device technology.
Autors: Lee, J.;Choi, S.;Lee, J.;Yang, K.;
Appeared in: IEEE Transactions on Nanotechnology
Publication date: Sep 2012, volume: 11, issue:5, pages: 890 - 895
Publisher: IEEE
 
» 4over6: network layer virtualization for IPv4-IPv6 coexistence
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IANA exhausted its IPv4 address space in 2011, and IPv6 is the next generation to replace IPv4. However, the IPv6 transition techniques are still immature and holding back the development of the next-generation Internet. Hence, IPv4-IPv6 coexistence is becoming increasingly imminent. During the coexistence period, the Internet will consist of IPv4-only, IPv6-only, and dual-stack segments. Both the network infrastructure and operations must support IPv4-only, IPv6-only, and dual-stack accordingly. This article develops a 4over6 virtualization architecture that virtualizes IPv4-only networks over IPv6-only networks. This architecture enables two IPv4- only segments to communicate over an IPv6-only network by using an IPv4-in-IPv6 tunnel. The architecture can be examined in different areas such as addressing schema, layer 3 routing, and packet forwarding. The 4over6 virtualization architecture is being standardized in IETF. Various implementations and deployment scenarios are actively discussed in the ISP and vendor communities.
Autors: Cui, Y.;Wu, P.;Xu, M.;Wu, J.;Lee, Y.L.;Durand, A.;Metz, C.;
Appeared in: IEEE Network
Publication date: Sep 2012, volume: 26, issue:5, pages: 44 - 48
Publisher: IEEE
 
» 5-11GHz CMOS PA with 158.941ps group delay and low power using current-reused technique
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Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 6-DoF miniature maglev positioning stage for application in haptic micro-manipulation
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Appeared in: Mechatronics
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» 6th Annual ??Topics on Microelectronics?? Seminar Held by SSCS-Italy: Programs in January and May at the University of Pavia [Chapters]
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Autors: Baschirotto, A.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Sep 2012, volume: 4, issue:3, pages: 88 - 89
Publisher: IEEE
 
» Nanowires UV Photodetectors With Ir Schottky Contacts
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The authors present the fabrication of a nanowire ultraviolet (UV) photodetector (PD) with Iridium Schottky contact electrodes. UV-to-visible rejection ratio of the sample is around 107 when biased at 5 V, and the fabricated PD is visible-blind with a sharp cutoff at 390 nm. With an incident light wavelength of 390 nm and an applied bias of 5 V, the measured responsivity of the PD is 9.73 .
Autors: Tsai, T.-Y.;Chang, S.-J.;Weng, W.-Y.;Wang, S.-H.;Chiu, C.-J.;Hsu, C.-L.;Hsueh, T.-J.;
Appeared in: IEEE Photonics Technology Letters
Publication date: Sep 2012, volume: 24, issue:18, pages: 1584 - 1586
Publisher: IEEE
 
» Nanoribbon Transistors: Transition From Depletion Mode to Enhancement Mode by Channel-Width Trimming
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We study the channel width scaling of back-gated metal–oxide–semiconductor field-effect transistors from 2 down to 60 nm. We reveal that the channel conductance scales linearly with channel width, indicating no evident edge damage for nanoribbons with widths down to 60 nm as defined by plasma dry etching. However, these transistors show a strong positive threshold voltage shift with narrow channel widths of less than 200 nm. Our results also show that transistors with thinner channel thicknesses have larger shifts associated with width scaling. Devices fabricated on a 6-nm-thick crystal underwent the transition from depletion mode to enhancement mode.
Autors: Liu, H.;Gu, J.;Ye, P. D.;
Appeared in: IEEE Electron Device Letters
Publication date: Sep 2012, volume: 33, issue:9, pages: 1273 - 1275
Publisher: IEEE
 
» -Canceling MISR Architectures for Output Response Compaction With Unknown Values
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In this paper, an -tolerant multiple-input signature register (MISR) compaction methodology that compacts output responses containing unknown values is described. Each bit of the MISR signature is expressed as a linear combination in terms of by symbolic simulation. Linearly dependent combinations of the signature bits are identified with Gaussian elimination and xored to remove values and yield deterministic values. Two -canceling MISR architectures are proposed and analyzed with industrial designs. This paper also shows the correlation between the estimated result based on idealized modeling and the actual data for real circuits for error coverage, hardware overhead, and other metrics. Experimental results indicate that high error coverage can be achieved with -canceling MISR configurations and it highly correlates with actual results.
Autors: Yang, J.-S.;Touba, N. A.;
Appeared in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publication date: Sep 2012, volume: 31, issue:9, pages: 1417 - 1427
Publisher: IEEE
 
» -Based Inductively Coupled Plasma Etching of GaN/AlGaN Using Photoresist Mask
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Gallium nitride/aluminium gallium nitride (GaN/AlGaN) etching in -based inductively coupled plasma (ICP) is investigated for high electron mobility transistor (HEMT) mesa etching using rarely preferred mask-photoresist. The critical issues related to photresist burning/deforming, resist removal, selectivity, mesa edge roughening, and nonuniform etching of GaN and AlGaN layers are discussed in detail using plasma of gases. The effect of ICP process parameters like ICP power, RF power, pressure, and flow rate ratio on etch rate of GaN/AlGaN layers and mask is studied systematically for the optimization of a HEMT mesa etching process that results in smooth etched surface with sharp and highly anisotropic mesa edges. The photoresist mask selectivity is found to depend strongly on pressure and RF power, whereas the etched surface morphology changes significantly with the gas flow rate ratio and chamber pressure. The AlGaN etch rate and selectivity with respect to GaN is also characterized for different Al concentrations varying up to 33%. The etch process is finally applied to GaN/AlGaN HEMT mesa etching, where the mesa features with depth of are etched successfully. The resultant process etch uniformity is found to be better than 5% over 2-in wafer.
Autors: Rawal, D. S.;Malik, H. K.;Agarwal, V. R.;Kapoor, A. K.;Sehgal, B. K.;Muralidharan, R.;
Appeared in: IEEE Transactions on Plasma Science
Publication date: Sep 2012, volume: 40, issue:9, pages: 2211 - 2220
Publisher: IEEE
 
» ??From Traditional to Fractional PI Control: A Key for Generalization
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Proportional-integral (PI) controllers are the most common form of feedback used in industrial applications today [1][3]. The use of proportional and integral feedback also has a long history of practical applications [4]. For example, in the middle of the 18th century, centrifugal governors as the proportional feedback were applied to regulate the speed of windmills [5]. By the 19th century, it was known that using integral feedback could remove the offsets appearing in working with governors [6]. At present, PI control, still a very basic form of feedback, is also one of the first solutions often considered in the control of industrial systems [7]. On the other hand, in some applications, using the PI controller in its traditional form may not be satisfactory, and a more advanced controller is needed to achieve control objectives. In such cases, modified versions of the PI controller have been proposed to enhance the controller's performance. The fractional-order PI controller is one of these modified versions, and it is attracting increased interest in control system design uses [8], [9]. The idea of using such a controller originated with fractional calculus, known as a generalization for classical calculus [10]. The following section presents a brief review of recent fractional calculus applications in control system design.
Autors: Tavazoei, M.S.;
Appeared in: IEEE Industrial Electronics Magazine
Publication date: Sep 2012, volume: 6, issue:3, pages: 41 - 51
Publisher: IEEE
 
» ??IEEE SSCS DL Vladimir Stojanovic Lectures at SEMINATEC 2012: Seventh Annual Workshop on Semiconductors and Micro- and Nanotechnology Sponsored by SSCS-Sao Paulo in April [People]
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Autors: Noije, W.V.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Sep 2012, volume: 4, issue:3, pages: 74 - 76
Publisher: IEEE
 
» ??Viva Conferences?? [President's Column]
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Autors: Kolias, N.;
Appeared in: IEEE Microwave Magazine
Publication date: Sep 2012, volume: 13, issue:6, pages: 12 - 14
Publisher: IEEE
 
» A 0.7V input output-capacitor-free digitally controlled low-dropout regulator with high current efficiency in 0.35?m CMOS technology
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Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 1.1-V Regulator-Stabilized 21.4-GHz VCO and a 115% Frequency-Range Dynamic Divider for -Band Wireless Communication
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A 21.4-GHz 1.1-V regulator-stabilized voltage-controlled oscillator (VCO) with a dual-transformer configuration and a 115% frequency-range dynamic divider—both based on 0.18- m SiGe BiCMOS technology—were developed. As for the VCO, the combination of two types of transformers, which exhibit high input impedance and capacitive-input impedance, respectively, provides both wide frequency-tuning range and low phase noise. The measured phase noise of the VCO at a 1-MHz offset frequency is 109 dBc/Hz with 11.1-mW dc power dissipation (including the regulator). The figure of merit of the VCO is 192 dBc/Hz, which is the best value among 20-GHz-class silicon-based VCOs (to the best of the authors' knowledge). As for the divider, a two-stage single-balanced mixer reduces dc power and increases operation frequency range. The measured operation frequency of the divider is from 7 to 26 GHz while dissipating only 1.15-mW dc power and occupying a small area (0.004 mm ). These performance results indicate that the proposed VCO and the divider are suitable for low-power transceivers of quasi-millimeter-wave wireless communication systems.
Autors: Nakamura, T.;Masuda, T.;Shiramizu, N.;Nakamura, A.;Washio, K.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Sep 2012, volume: 60, issue:9, pages: 2823 - 2832
Publisher: IEEE
 
» A 12-b, 30-MS/s, 2.95-mW Pipelined ADC Using Single-Stage Class-AB Amplifiers and Deterministic Background Calibration
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A 12-b 30-MS/s pipelined ADC is realized using single-stage, low-gain, class-AB amplifiers, which can dynamically provide the load currents without large static currents. In addition, the amplifiers are power cycled and turned on only during residue amplification to enable further power savings. Nonlinear errors due to finite gain are addressed using a deterministic digital background calibration scheme. The amplifier's transfer function is piecewise modeled in our calibration scheme using three third-order polynomial functions (splines) for low computational overhead. The presented ADC occupies an active area of 0.36 in 90-nm CMOS. It dissipates 2.95 mW from a 1.2-V supply and achieves an SNDR of 64.5 dB for inputs near Nyquist. The corresponding figure of merit is 72 fJ/conversion-step.
Autors: Kim, J. K.-R.;Murmann, B.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2141 - 2151
Publisher: IEEE
 
» A 12.5Gb/s 6.6mW receiver with analog equalizer and 1-tap DFE
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Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 15fJ/conversion-step 8-bit 50MS/s asynchronous SAR ADC with efficient charge recycling technique
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Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 17.5–26 GHz Low-Noise Amplifier With Over 8 kV ESD Protection in 65 nm CMOS
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By the electrostatic discharge (ESD)/matching co-design methodology, a wideband low-noise amplifier (LNA) using a grounded spiral inductor in conjunction with a MOM capacitor for ESD protection and wideband matching is demonstrated in a 65 nm CMOS. The shunt inductor provides an effective bidirectional ESD protection to the ground and the series capacitor greatly enhances the breakdown level in the current discharge path. The measurement results demonstrate an over 8 kV human-body-model ESD protection level with almost no RF characteristic degradation after ESD zapping. Under a power consumption of 5.6 mW, the ESD-protected LNA presents a flat and power gain of 3.3–3.9 dB and 16.6–17.9 dB, respectively, in the frequency range of 18.5–24.5 GHz, and a 3 dB bandwidth of 17.5–26 GHz is achieved.
Autors: Tsai, M-H.;Hsu, S. S. H.;Hsueh, F.-L.;Jou, C.-P.;Yeh, T.-J.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Sep 2012, volume: 22, issue:9, pages: 483 - 485
Publisher: IEEE
 
» A 20-b 40-mV Range Read-Out IC With 50-nV Offset and 0.04% Gain Error for Bridge Transducers
Abstract:
This paper presents a 20-b read-out IC with 40-mV full-scale range that is intended for use with bridge transducers. It consists of a current-feedback instrumentation amplifier (CFIA) followed by a switched-capacitor incremental ADC. The CFIA's offset and noise are mitigated by chopping, while its gain accuracy and gain drift are improved by applying dynamic element matching to its input and feedback transconductors. Their mismatch is reduced by a digitally assisted correction loop, which further reduces the CFIA's gain drift. Finally, bulk-biasing and impedance-balancing techniques are used to reduce the common-mode dependency of these transconductors, which would otherwise limit the achievable gain accuracy. The combination of these techniques enables the read-out IC to achieve 140-dB CMRR, a worst-case gain error of 0.04% over a 0–2.5 V common-mode range, a maximum gain drift of 0.7 ppm/ C and an INL of 5 ppm. After applying nested-chopping, the read-out IC achieves 50-nV offset, 6-nV/ C offset drift, a thermal noise floor of 16.2 nV/ Hz and a 0.1-mHz noise corner. Implemented in a 0.7- m CMOS technology, the prototype read-out IC consumes 270 A from a 5-V supply.
Autors: Wu, R.;Chae, Y.;Huijsing, J. H.;Makinwa, K. A. A.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2152 - 2163
Publisher: IEEE
 
» A 20Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 24W Ku band GaN based power amplifier with 9.1dB linear gain
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 3.2ppm/C curvature-compensated bandgap reference with wide supply voltage range
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 450-mV Single-Fuel-Cell Power Management Unit With Switch-Mode Quasi- Hysteretic Control and Automatic Startup on 0.35- m Standard CMOS Process
Abstract:
This paper presents a power management unit (PMU) for emerging applications powered by low-voltage single direct methanol fuel cell (DMFC). A subthreshold startup scheme and its circuit implementation are proposed to enable low-voltage self-startup feature. A boost switching converter with a switch-mode, quasi- hysteretic control is designed for power conditioning. The PMU is implemented on a standard 0.35- m CMOS process with of 0.55 V/ 0.75 V, respectively. Experimental results prove that the PMU automatically starts up with 450-mV single DMFC input. The output voltage of the PMU is well regulated with below 25 mV ripple. With an output power ranging from 20 to 200 mW, an average efficiency above 85.2% is obtained, with a maximum of 89.4%. Load transient recovery times are 11.6 s/4.2 s, respectively, in response to the step-up and step-down load changes between 10 and 100 mA.
Autors: Wang, Y.;Ma, D.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2216 - 2226
Publisher: IEEE
 
» A 5.4-Gbit/s Adaptive Continuous-Time Linear Equalizer Using Asynchronous Undersampling Histograms
Abstract:
We demonstrate a new type of adaptive continuous-time linear equalizer (CTLE) based on asynchronous undersampling histograms. Our CTLE automatically selects the optimal equalizing filter coefficient among several predetermined values by searching for the coefficient that produces the largest peak value in histograms obtained with asynchronous undersampling. This scheme is simple and robust and does not require clock synchronization for its operation. A prototype chip realized in 0.13- CMOS technology successfully achieves equalization for 5.4-Gbit/s pseudorandom bit sequence data through 40-, 80-, and 120-cm PCB traces and 3-m DisplayPort cable. In addition, we present the results of statistical analysis with which we verify the reliability of our scheme for various sample sizes. The results of this analysis are confirmed with experimental data.
Autors: Kim, W.-S.;Seong, C.-K.;Choi, W.-Y.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Sep 2012, volume: 59, issue:9, pages: 553 - 557
Publisher: IEEE
 
» A 5.79-Gb/s Energy-Efficient Multirate LDPC Codec Chip for IEEE 802.15.3c Applications
Abstract:
An LDPC codec chip supporting four code rates of IEEE 802.15.3c applications is presented. After utilizing row-based layered scheduling, the normalized min-sum (NMS) algorithm can reduce half of the iteration number while maintaining similar performance. According to the unique code structure of the parity-check matrix, a reconfigurable 8/16/32-input sorter is designed to deal with LDPC codes in four different code rates. Both sorter input reallocation and pre-coded routing switch are proposed to alleviate routing complexity, leading to 64% input reduction of multiplexers. In addition, an adder-accumulator-shift register (AASR) circuit is proposed for the LDPC encoder to reduce hardware complexity. After implemented in 65-nm 1P10M CMOS process, the proposed LDPC decoder chip can achieve maximum 5.79-Gb/s throughput with the hardware efficiency of 3.7 and energy efficiency of 62.4 pJ/b, respectively.
Autors: Yen, S.-W.;Hung, S.-Y.;Chen, C.-L.;Chang, H.-C.;Jou, S.-J.;Lee, C.-Y.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2246 - 2257
Publisher: IEEE
 
» A 5MSps 13.25?W 8-bit SAR ADC with single-ended or differential input
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A 6–20 GHz Adaptive SiGe Image Reject Mixer for a Self-Healing Receiver
Abstract:
A wideband (6–20 GHz) Silicon-Germanium (SiGe) adaptive image-reject mixer with an intermediate frequency (IF) of 1.8 GHz is presented. The mixer can be “self-healed” to deliver consistent performance by nullifying the effects of process variations, environmental changes, or aging. Various performance metrics of the mixer can also be adapted to different specifications across multiple frequency bands. A conversion gain greater than 15 dB, an image rejection ratio (IRR) exceeding 35 dB, and an output 1-dB compression point greater than 10 dBm, were obtained in measurement. An automated self-healing procedure is developed and shown to be effective for improving the measured performance of the mixer. The mixer was fabricated in a 150 GHz peak , 200 nm SiGe BiCMOS process technology and consumes 215 mA of current operating off a 4 V rail.
Autors: Saha, P. K.;Howard, D. C.;Shankar, S.;Diestelhorst, R.;England, T.;Cressler, J. D.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 1998 - 2006
Publisher: IEEE
 
» A 7.4-mW 200-MS/s Wideband Spectrum Sensing Digital Baseband Processor for Cognitive Radios
Abstract:
A digital baseband cognitive radio spectrum sensing processor with 200-kHz resolution over 200-MHz bandwidth is integrated in 1.64 mm in 65-nm CMOS. The processor uses adaptive channel-specific threshold and sensing time to achieve detection probability 0.9 and false-alarm probability 0.1 for 5-dB SNR and adjacent-band interferers of 30-dB INR within a 50-ms sensing time. The chip power and area are minimized by jointly considering algorithm, architecture, and circuit parameters. The chip dissipates 7.4 mW for a 200-MHz sensing bandwidth, which is a 22 reduction in power per sensing bandwidth compared with prior work.
Autors: Yu, T.-H.;Yang, C.-H.;Cabric, D.;Markovic, D.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2235 - 2245
Publisher: IEEE
 
» A 77 GHz Low LO Power Mixer With a Split Self-Driven Switching Cell in 65 nm CMOS Technology
Abstract:
A low LO power mixer with high gain by using a split self-driven switching cell for automotive applications at 77 GHz is presented. By splitting the switching cell, the required LO power is reduced and the VCO has less capacitive loading. The mixer has a peak conversion gain of 6.8 dB and the input 1 dB compression point is 7 dBm at LO power of 5 dBm. The chip is fabricated in 65 nm CMOS technology and the chip size including a Marchand balun is . The total power consumption is 3 mW from a 1.2 V supply.
Autors: Kim, S.-K.;Cui, C.;Huang, G.;Kim, S.;Kim, B.-S.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Sep 2012, volume: 22, issue:9, pages: 480 - 482
Publisher: IEEE
 
» A 77-GHz SiGe Integrated Six-Port Receiver Front-End for Angle-of-Arrival Detection
Abstract:
In this paper an integrated six-port receiver front-end for angle-of-arrival detection of 77-GHz signals is presented. Applications of the circuit are direction finding, automotive radar calibration, or high precision industrial radar. The measurement principle is based on passive superposition of two incident signals and power detection. The circuit features two input amplifiers, a broadband passive six-port network, and four power detectors. The integrated circuit has a power consumption of 95 mW with 5 V supply voltage. It is fabricated in a 200-GHz f SiGe bipolar technology and occupies only 1028 1128 µm . The circuit operates in a 3-dB bandwidth from 75 GHz to 84 GHz and has a responsivity of 152 kV/W at 80 GHz. A simple calibration method is proposed and all calibration parameters are calculated for different frequency values.
Autors: Laemmle, B.;Vinci, G.;Maurer, L.;Weigel, R.;Koelpin, A.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 1966 - 1973
Publisher: IEEE
 
» A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order Modulator
Abstract:
A low-power switched-capacitor third-order sigma- delta modulator suitable for portable sensor systems is described. The architecture uses only one operational amplifier working in a time-interleaved fashion. The architecture employs swing reduction techniques to limit the swing and the slew-rate requirements of all internal nodes. Realized in a 0.18- m 2P6M CMOS technology, the modulator provides 84-dB SNDR and 88-dB dynamic range in a signal bandwidth of 100 kHz and clock at 3.2 MHz. The 1.5-V supplied prototype dissipates 140 W with a FoM of 54 fJ/conversion-level.
Autors: Pena-Perez, A.;Bonizzoni, E.;Maloberti, F.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Sep 2012, volume: 47, issue:9, pages: 2107 - 2118
Publisher: IEEE
 
» A W Complementary Bridge Rectifier With Near Zero Turn-on Voltage in SOS CMOS for Wireless Power Supplies
Abstract:
An inherent shortcoming of rectifiers designed using standard CMOS devices is poor low input power performance. It is shown that this can be overcome through the use of intrinsic devices with close to zero-threshold voltage available in a 0.25 silicon-on-sapphire (SOS) CMOS process. A novel complementary bridge rectifier structure based on a combination of cross-connected and diode bridge rectifier topologies is introduced to avoid the excessive leakage current incurred through the use of intrinsic devices. A design strategy which maximizes efficiency and produces an input impedance which will interface well with the inductive coil type antennas used in biomedical implants is presented for this new rectifier type. The fabricated rectifier achieves a 1 DC output power for an input power of 26.5 dBm at 100 MHz. A peak measured power conversion efficiency of 67% is achieved at 100 MHz, but more importantly 30% is attained for a wide output power range which reaches as low as 40 dBm. At the target 1 output power a of 44% was achieved.
Autors: Theilmann, P. T.;Presti, C. D.;Kelly, D. J.;Asbeck, P. M.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Sep 2012, volume: 59, issue:9, pages: 2111 - 2124
Publisher: IEEE
 
» A W Complementary Bridge Rectifier With Near Zero Turn-on Voltage in SOS CMOS for Wireless Power Supplies
Abstract:
An inherent shortcoming of rectifiers designed using standard CMOS devices is poor low input power performance. It is shown that this can be overcome through the use of intrinsic devices with close to zero-threshold voltage available in a 0.25 μm silicon-on-sapphire (SOS) CMOS process. A novel complementary bridge rectifier structure based on a combination of cross-connected and diode bridge rectifier topologies is introduced to avoid the excessive leakage current incurred through the use of intrinsic devices. A design strategy which maximizes efficiency and produces an input impedance which will interface well with the inductive coil type antennas used in biomedical implants is presented for this new rectifier type. The fabricated rectifier achieves a 1 μW DC output power for an input power of -26.5 dBm at 100 MHz. A peak measured power conversion efficiency of 67% is achieved at 100 MHz, but more importantly >;30% PCE is attained for a wide output power range which reaches as low as -40 dBm. At the target 1 μW output power a PCE of 44% was achieved.
Autors: Theilmann, P.T.;Presti, C.D.;Kelly, D.J.;Asbeck, P.M.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Sep 2012, volume: 59, issue:9, pages: 2111 - 2124
Publisher: IEEE
 
» A Bayesian Restoration Approach for Hyperspectral Images
Abstract:
In this paper, a Bayesian restoration technique for multiple observations of hyperspectral (HS) images is presented. As a prototype problem, we assume that a low-spatial-resolution HS observation and a high-spatial-resolution multispectral (MS) observation of the same scene are available. The proposed approach applies a restoration on the HS image and a joint fusion with the MS image, accounting for the joint statistics with the MS image. The restoration is based on an expectation–maximization algorithm, which applies a deblurring step and a denoising step iteratively. The Bayesian framework allows to include spatial information from the MS image. To keep the calculation feasible, a practical implementation scheme is presented. The proposed approach is validated by simulation experiments for general HS image restoration and for the specific case of pansharpening. The experimental results of the proposed approach are compared with pure fusion and deconvolution results for performance evaluation.
Autors: Zhang, Y.;Duijster, A.;Scheunders, P.;
Appeared in: IEEE Transactions on Geoscience and Remote Sensing
Publication date: Sep 2012, volume: 50, issue:9, pages: 3453 - 3462
Publisher: IEEE
 
» A benchmark test system for testing frequency dependent network equivalents for electromagnetic simulations
Abstract:


Autors:
Appeared in: International Journal of Electrical Power & Energy Systems
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A Bidirectional Successive Detection Technique for Asynchronous OFDMA-Based Wireless Mesh Networks
Abstract:
In this correspondence, a minimum-mean-square-error bidirectional successive detection (MMSE-BSD) technique is proposed to mitigate the effects of interferences caused by time difference of arrivals (TDoAs) in wireless mesh networks (WMNs) based on orthogonal frequency-division multiple access (OFDMA). The proposed BSD technique can successfully reduce the error propagation phenomenon in successive detection with low computational complexity by exploiting the subframe structure used in WMNs. It is shown by simulation that the proposed MMSE-BSD technique is robust to multipath channels and can be effectively used in asynchronous OFDMA-based WMNs.
Autors: Park, C. H.;Lee, M.;So, A.;Cho, Y. S.;
Appeared in: IEEE Transactions on Vehicular Technology
Publication date: Sep 2012, volume: 61, issue:7, pages: 3346 - 3352
Publisher: IEEE
 
» A Bifocal Ellipsoidal Gregorian Reflector System for THz Imaging Applications
Abstract:
Current terahertz imagers rely on reflector systems for the beam quality and imaging speed because the cross-range span that the system can cover is limited by the beam aberrations when the antenna scans. We present the design of a Bifocal reflector system that can rapidly scan a terahertz beam for standoff imaging applications while increasing the field of view of previous designs up to 50%. The design is based in a confocal Gregorian system where the nominal reflector surfaces are substituted by shaped surfaces to reduce the beam aberrations, while not increasing the manufacture cost of the reflector antenna. We also provide a set of useful design formulas for the design of this kind of reflector systems. The beam patterns obtained by the proposed designs are numerically calculated with the commercial software GRASP and compared with those obtained with previous approaches to the same problem, showing the better performance of the proposed solution.
Autors: Garcia-Pino, A.;Llombart, N.;Gonzalez-Valdes, B.;Rubinos-Lopez, O.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Sep 2012, volume: 60, issue:9, pages: 4119 - 4129
Publisher: IEEE
 
» A Binaural Scene Analyzer for Joint Localization and Recognition of Speakers in the Presence of Interfering Noise Sources and Reverberation
Abstract:
In this study, we present a binaural scene analyzer that is able to simultaneously localize, detect and identify a known number of target speakers in the presence of spatially positioned noise sources and reverberation. In contrast to many other binaural cocktail party processors, the proposed system does not require a priori knowledge about the azimuth position of the target speakers. The proposed system consists of three main building blocks: binaural localization, speech source detection, and automatic speaker identification. First, a binaural front-end is used to robustly localize relevant sound source activity. Second, a speech detection module based on missing data classification is employed to determine whether detected sound source activity corresponds to a speaker or to an interfering noise source using a binary mask that is based on spatial evidence supplied by the binaural front-end. Third, a second missing data classifier is used to recognize the speaker identities of all detected speech sources. The proposed system is systematically evaluated in simulated adverse acoustic scenarios. Compared to state-of-the art MFCC recognizers, the proposed model achieves significant speaker recognition accuracy improvements.
Autors: May, T.;van de Par, S.;Kohlrausch, A.;
Appeared in: IEEE Transactions on Audio, Speech, and Language Processing
Publication date: Sep 2012, volume: 20, issue:7, pages: 2016 - 2030
Publisher: IEEE
 
» A bio-inspired multi degree of freedom actuator based on a novel cylindrical ionic polymer-metal composite material
Abstract:


Autors:
Appeared in: Robotics and Autonomous Systems
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A biologically motivated approach towards modular and robust low-level sensor fusion for application in agricultural machinery design
Abstract:


Autors:

Highlights

Appeared in: Computers and Electronics in Agriculture
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A biomimetic underwater microrobot with multifunctional locomotion
Abstract:


Autors:
Appeared in: Robotics and Autonomous Systems
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A Biosensor based on Periodic Arrays of Gold Nanodisks under Normal Transmission
Abstract:


Autors:

Highlights

Appeared in: Sensors and Actuators A: Physical
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A bivariate model for retinal image identification in lambs
Abstract:


Autors:

Highlights

Appeared in: Computers and Electronics in Agriculture
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A black box method for solving the complex exponentials approximation problem
Abstract:


Autors:
Appeared in: Digital Signal Processing
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A Block Replacement Policy for Systems Subject to Non-homogeneous Pure Birth Shocks
Abstract:
This note studies the block replacement policy with general repairs for an operating system subject to shocks occurring according to a non-homogeneous pure birth process. A shock causes the system to fail. There are two types of failures: a type-I failure (minor failure) is fixed by a general repair, whereas a type-II failure (catastrophic failure) is removed by an unplanned (or unscheduled) replacement. The failure type probabilities depend on the number of type-I failure shocks that occurred since the last replacement. Under the block replacement policy, the operating system is replaced every time units to reduce the chances of more expensive unplanned replacements due to type-II failures. The aim of this note is to determine the optimal block interval , which minimizes the expected cost rate and the expected total discounted cost rate of the proposed policy. As the shock process is a more general non-homogeneous pure birth process, several previous models become the special cases of our model.
Autors: Sheu, S.-H.;Chen, Y.-L.;Chang, C.-C.;Zhang, Z. G.;
Appeared in: IEEE Transactions on Reliability
Publication date: Sep 2012, volume: 61, issue:3, pages: 741 - 748
Publisher: IEEE
 
» A Broadband LTE/WWAN Antenna Design for Tablet PC
Abstract:
A broadband yet compact antenna design applicable to tablets and laptops is proposed. The antenna provides an extensive coverage for existing and upcoming mobile communication bands. Several band broadening and antenna miniaturization techniques were employed, including the use of a parasitic element, meandered structures, branched structures and a lump component. The proposed design is planar, compact and can be fabricated via printed circuit board technology. Measurement results exhibits broad resonant bandwidth. Nearly omni-directional patterns and reasonable radiation efficiency are observed.
Autors: Chang, S.-H.;Liao, W.-J.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Sep 2012, volume: 60, issue:9, pages: 4354 - 4359
Publisher: IEEE
 
» A broadband optical fiber based inline polarizer for telecom wavelength range
Abstract:


Autors:
Appeared in: Sensors and Actuators A: Physical
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A Business Case for Feature-Oriented Requirements Engineering
Abstract:
Owing to strong market growth for medical devices deployed in critical-care facilities, development organizations in medical engineering must continually look for opportunities to drive engineering efficiency and cost effectiveness. Furthermore, cycle time must decrease, the alignment of clinical workflow is breaking down departmental barriers, and an increased amount of product functionality is being realized in software. To help meet such challenges, adequate requirements engineering is necessary. Toward that end, Syngo (a business unit of the Imaging and Therapy division of Siemens) introduced Feature-Oriented Requirements Engineering (FORE) and developed a business case for using it in the context of a lean engineering program. FORE integrates with other engineering disciplines such as project management, software architecture, and test management. There was an error in the biographical information for Tobias Stenzel. Stenzel's biography should have indicated that he has an MS in industrial engineering and management from the University of Technology Karlsruhe, Germany.
Autors: Rudorfer, Arnold;Stenzel, Tobias;Herold, Gerold;
Appeared in: IEEE Software
Publication date: Sep 2012, volume: 29, issue:5, pages: 54 - 59
Publisher: IEEE
 
» A C-Band AlGaN-GaN MMIC HPA for SAR
Abstract:
A C-Band MMIC high power amplifier (HPA) has been designed exploiting a 0.25 HEMT GaN process on SiC substrate. The HPA is designed for future synthetic aperture radar (SAR) antenna applications. The HPA delivers 16 W output power with PAE over 38% at 6 dB gain compression within a 900 MHz bandwidth around 5.75 GHz. Up to 20 W output power and 40% PAE are obtained at higher gain compression. A comparison with another amplifier, differing only for the layout of the devices in the final stage, points out that the transistor thermal conditions represent the main limitation for this high power density technology.
Autors: Florian, C.;Cignani, R.;Niessen, D.;Santarelli, A.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Sep 2012, volume: 22, issue:9, pages: 471 - 473
Publisher: IEEE
 
» A Calderon Multiplicative Preconditioner for the PMCHWT Equation for Scattering by Chiral Objects
Abstract:
Scattering of time-harmonic electromagnetic waves by chiral structures can be modeled via an extension of the Poggio-Miller-Chan-Harrington-Wu-Tsai (PMCHWT) boundary integral equation for analyzing scattering by dielectric objects. The classical PMCHWT equation however suffers from dense discretization breakdown: the matrices resulting from its discretization become increasingly ill-conditioned when the mesh density increases. This contribution revisits the PMCHWT equation for chiral media. It is demonstrated that it also suffers from dense discretization breakdown. This dense discretization breakdown is mitigated by the construction of a Calderón multiplicative preconditioner. A stable discretization scheme is introduced, and the resulting algorithm's accuracy and efficiency are corroborated by numerical examples.
Autors: Beghein, Y.;Cools, K.;Andriulli, F. P.;De Zutter, D.;Michielssen, E.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Sep 2012, volume: 60, issue:9, pages: 4239 - 4248
Publisher: IEEE
 
» A cascade face recognition system using hybrid feature extraction
Abstract:


Autors:

Highlights

Appeared in: Digital Signal Processing
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A Class of Binomial Bent Functions Over the Finite Fields of Odd Characteristic
Abstract:
This paper studies a class of binomial functions over the finite fields of odd characteristic and characterizes their bentness in terms of the Kloosterman sums. Numerical results show that the proposed class contains bent functions that are affinely inequivalent to all known monomial and binomial ones.
Autors: Jia, W.;Zeng, X.;Helleseth, T.;Li, C.;
Appeared in: IEEE Transactions on Information Theory
Publication date: Sep 2012, volume: 58, issue:9, pages: 6054 - 6063
Publisher: IEEE
 
» A Closed-Form Power Allocation for Minimizing Secrecy Outage Probability for MISO Wiretap Channels via Masked Beamforming
Abstract:
In this letter, we aim to achieve secure communication for a multiple-input single-output (MISO) wiretap channel in the presence of multiple non-colluding eavesdroppers. It is assumed that the eavesdroppers' channels are unavailable to the transmitter, and artificial noise (AN) is used to provide masked beamforming for degrading the eavesdroppers' channels. First, we derive the secrecy rate outage probability for the masked beamforming system and then the optimal power allocation between data and AN is obtained in closed form for minimizing the secrecy rate outage probability under a total power constraint. The effects of the number of transmit antennas, the transmit power, and the target secrecy rate on the optimal power allocation parameter are characterized. Numerical results are presented to show the performance of our proposed power allocation scheme.
Autors: Xiong, Jun;Wong, Kai-Kit;Ma, Dongtang;Wei, Jibo;
Appeared in: IEEE Communications Letters
Publication date: Sep 2012, volume: 16, issue:9, pages: 1496 - 1499
Publisher: IEEE
 
» A closed-loop data based test for robust performance improvement in iterative identification and control redesigns
Abstract:


Autors:
Appeared in: Automatica
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A CMOS Biocompatible Charge Detector for Biosensing Applications
Abstract:
A solid-state CMOS device capable of detecting the changes of electric charge caused by a chemical or biological reaction is presented. The device is fully compatible with a standard CMOS process. Biocompatibility is obtained by the passivation of the active area with a layer of alumina obtained with a simple, low-cost, and reliable process. A test chip hosting 80 sensors has been realized and characterized showing the detection capabilities of the novel sensor. The reusability of the device by stripping of the alumina layer was proved.
Autors: Lai, S.;Caboni, A.;Loi, D.;Barbaro, M.;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Sep 2012, volume: 59, issue:9, pages: 2512 - 2519
Publisher: IEEE
 
» A CMOS RF Programmable-Gain Amplifier for Digital TV With a 9-dBm IIP3 Cross-Coupled Common-Gate LNA
Abstract:
A CMOS RF programmable-gain amplifier (RFPGA) is designed for a digital television receiver. In order to obtain high linearity with wide bandwidth, a common-gate (CG) low-noise amplifier (LNA) with transconductance nonlinearity cancelation is proposed for the RFPGA. The proposed LNA achieves high linearity while maintaining low-noise and low-power characteristics by applying a nonlinearity cancelation technique to the cross-coupled CG configuration. The proposed RFPGA is designed with a 0.13- CMOS process and measured. The measurement result at maximum gain mode shows a gain of 17.5–19.8 dB, a noise figure of 1.9–3.9 dB, an input-referred third-order intercept point of 6–9.1 dBm, an input-referred second-order intercept point of 22.4–25 dBm, and an input impedance matching of less than 10 dB over the range of 48–860 MHz with 5.4-mW power consumption at a 1.8-V supply voltage. The total gain range of the proposed RFPGA covers 55 dB with a 1-dB resolution.
Autors: Han, H. G.;Kim, T. W.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Sep 2012, volume: 59, issue:9, pages: 543 - 547
Publisher: IEEE
 
» A collaborative and integrated platform to support distributed manufacturing system using a service-oriented approach based on cloud computing paradigm
Abstract:


Autors:

Highlights

Appeared in: Robotics and Computer-Integrated Manufacturing
Publication date: Sep 2012
Publisher: Elsevier B.V.
 
» A combination of parallel factor and independent component analysis
Abstract:


Autors:

Highlights

Appeared in: Signal Processing
Publication date: Sep 2012
Publisher: Elsevier B.V.
 

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