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Electrical and Electronics Engineering publications abstract of: 08-2012 sorted by title, page: 0
» 0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking
Abstract:
A near-threshold forwarded-clock I/O receiver architecture is presented. In the proposed receiver, the majority of the circuitry is designed to operate in the near-threshold region at 0.6 V supply to save power, with the exception of only the global clock buffer, test buffers and synthesized digital circuits at the nominal 1 V supply. To ensure the quantizers are working properly with this low supply, a 1:10 direct demultiplexing rate is chosen as a demonstration of achieving low supply operation by high-parallelism. A novel low-power super-harmonic injection-locked ring oscillator is proposed to generate deskewable symmetric multi-phase local clock phases. The relative performance impact of including a per-data lane sample-and-hold (S/H) to improve quantizer aperture time at low voltage is demonstrated with two receiver prototypes fabricated in a 65 nm CMOS technology. Including the amortized power of global clock distribution, the receiver without S/H consumes 1.3 mW and the one with S/H consumes 2 mW at an 8 Gb/s input data rate, which converts to 0.163 pJ/bit and 0.25 pJ/bit, respectively. Measurement results show both receivers get BER 10 across a 20-cm FR4 PCB channel.
Autors: Hu, K.;Bai, R.;Jiang, T.;Ma, C.;Ragab, A.;Palermo, S.;Chiang, P. Y.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1842 - 1853
Publisher: IEEE
 
» 0.5V bulk-driven analog building blocks
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Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 19-Gb/s adaptively modulated optical OFDM transmission by separated I/Q baseband delivery using 1GHz RSOAs
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Appeared in: Optical Fiber Technology
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 2-D sizing of sodium oxalate crystals by automated optical image analysis
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Appeared in: Advanced Powder Technology
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 20 W High-Power Picosecond Single-Walled Carbon Nanotube Based MOPA Laser System
Abstract:
Compact, high average output power with picosecond pulses laser was achieved through a carbon nanotube based master oscillator power amplifier, MOPA, configuration. The master oscillator was a single-walled carbon nanotube based passively mode-locked Nd:YVO laser. Then the ultrashort laser pulses from the master oscillator were amplified by a diode laser pumped ytterbium-doped fiber amplifier. The maximum average output power measured has been successfully achieved to be 20 W with a repetition rate of 82 MHz, and a pulse width of 15.7 ps. The pulse energy and peak power of the output laser were 244 nJ and 15.5 kW, respectively. The amplified spontaneous emission and stimulated Raman scattering were not observed.
Autors: Zhang, L.;Wang, Y. G.;Yu, H. J.;Sun, W.;Yang, Y. Y.;Han, Z. H.;Qu, Y.;Hou, W.;Li, J. M.;Lin, X. C.;Tsang, Y.;
Appeared in: Journal of Lightwave Technology
Publication date: Aug 2012, volume: 30, issue:16, pages: 2713 - 2717
Publisher: IEEE
 
» 20-Gb/s AMO OFDM Transmission Over 20-km Bidirectional Link by Separate I/Q Baseband Delivery Using Remotely Fed 1-GHz RSOAs
Abstract:
We demonstrated a novel 20-Gb/s adaptively modulated optical orthogonal frequency division multiplexed (AMO OFDM) transmission scheme with separate in-phase (I) and quadrature (Q) channel baseband delivery over a 20-km single fiber link using remotely fed 1-GHz reflective semiconductor optical amplifiers (RSOAs) for a colorless optical network unit (ONU). The OFDM symbols with adaptive bit-/power-loading were applied to overcome the bandwidth limitation of RSOAs and to optimize the performance. In order to realize the baseband transmission without Hermitian symmetry, the I and Q channel data streams in the OFDM symbols were separately transmitted by optical carriers at two different wavelengths. Our proposed scheme was experimentally validated using a periodic property of free spectral range (FSR) in a wavelength multiplexer. The separate optical “dual” carriers were provided by the same port of the wavelength multiplexer to avoid wasting the number of wavelength division multiplexed channels.
Autors: Joo, J.-M.;Hong, M.-K.;Pham, D. T.;Han, S.-K.;
Appeared in: Journal of Lightwave Technology
Publication date: Aug 2012, volume: 30, issue:16, pages: 2661 - 2667
Publisher: IEEE
 
» 25th Anniversary Eurosensors XXV
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Appeared in: Sensors and Actuators A: Physical
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 3,4-Methylenedioxymethylamphetamine detection using a microcantilever-based biosensor
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Appeared in: Sensors and Actuators A: Physical
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 3-D Finite Element Method Analysis of Additional Load Losses in the End Region of Permanent-Magnet Generators
Abstract:
Machine design typically concentrates on the main magnetic and electric circuits while various additional losses are evaluated only by simple empirical equations. The objective of this paper is to examine the importance of the additional losses in the stator end region and in the housing of a 3.1 MW permanent-magnet wind generator. Stator stack clamping ring and finger plate losses are investigated using a 3-D finite element method. 2-D FEM analysis of the stator supporting housing losses is also performed. Two common mechanical component materials are analyzed in the 3-D studies; construction steel and stainless steel. The results show that failure to consider stator end areas and stator supporting constructions at the design stage can result in unwanted additional losses and affect machine efficiency. Indirect verification of the results is provided by efficiency measurements of different versions of the real 3.1 MW machine.
Autors: Hamalainen, H. M.;Pyrhonen, J.;Nerg, J.;Puranen, J.;
Appeared in: IEEE Transactions on Magnetics
Publication date: Aug 2012, volume: 48, issue:8, pages: 2352 - 2357
Publisher: IEEE
 
» 3D force sensor for biomechanical applications
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Appeared in: Sensors and Actuators A: Physical
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 3D model based tracking for omnidirectional vision: A new spherical approach
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Appeared in: Robotics and Autonomous Systems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 3D numerical model of the electrostatic coating process with moving objects using a moving mesh
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Appeared in: Journal of Electrostatics
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 3D thermal-aware floorplanner using a MILP approximation
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Appeared in: Microprocessors and Microsystems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 4.6-W Single Frequency Semiconductor Disk Laser With Linewidth
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We report on a single frequency semiconductor disk laser producing 4.6 W of output power with the free-running linewidth of derived from delayed self-heterodyne measurements. The implementation of the flip-chip gain design allows for considerable power scaling with good beam quality and high spectral purity.
Autors: Rantamaki, A.;Chamorovskiy, A.;Lyytikainen, J.;Okhotnikov, O.;
Appeared in: IEEE Photonics Technology Letters
Publication date: Aug 2012, volume: 24, issue:16, pages: 1378 - 1380
Publisher: IEEE
 
» 5-11GHz CMOS PA with 158.941ps group delay and low power using current-reused technique
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Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» 840 V/6 A-AlGaN/GaN Schottky Barrier Diode With Bonding Pad Over Active Structure Prepared on Sapphire Substrate
Abstract:
Multifinger lateral-type AlGaN/GaN Schottky barrier diode (SBD) with bonding pad over active (BPOA) structure was fabricated and exhibited excellent device performances, such as forward current of 6 A at 1.5 V, leakage current of 16 at 600 V, reverse-recovery time of 18 ns, breakdown voltage of 840 V, and low specific on-resistance of 9 , resulting in the figure-of-merit as high as 78 , which demonstrates that the AlGaN/GaN SBD with BPOA structure has a great potential application to the high-power electronics.
Autors: Lee, J.-H.;Yoo, J.-K.;Kang, H.-S.;Lee, J.-H.;
Appeared in: IEEE Electron Device Letters
Publication date: Aug 2012, volume: 33, issue:8, pages: 1171 - 1173
Publisher: IEEE
 
» -User Interference Channels: Degrees of Freedom
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This paper analyzes the gains of opportunistic communication in multiuser interference channels. Consider a fully connected -user Gaussian interference channel. At each time instance, only transmitters are allowed to be communicating with their respective receivers and the remaining transmitter-receiver pairs remain inactive. For finite , if the transmitters can acquire the instantaneous channel realizations and if all channel gains are bounded away from zero and infinity, the seminal results on interference alignment establish that for any arbitrary active pairs the total number of spatial degrees of freedom per orthogonal time and frequency domain is . In dense networks ( ), however, as the size of the network increases, it becomes less likely to sustain the bounding conditions on the channel gains. By exploiting this fact, we show that when obeys certain scaling laws, by opportunistically and dynamically selecting the active pairs at each time instance, the number of degrees of freedom can exceed and in fact can be made arbitrarily close to . More specifically, for single-antenna transmitters and receivers, the network size scaling as $n in omega ({ssr SNR}^{dlceil d-1rceil})$ when power allocation is allowed and scaling as without power allocation are sufficient conditions for achieving degrees of freedom. Moreover, for achieving these degrees of freedom the transmitters do not require the knowledge of the instantaneous channel realizations. Hence, invoking opportunistic communication in the context of interference channels leads to achieving higher degrees of freedom that are not achievable otherwise. with no knowledge of the channel gains at the transmitters side and with the knowledge of the channel gains at the transmitters side. We extend the results for multi-antenna Gaussian interference channels.
Autors: Tajer, A.;Wang, X.;
Appeared in: IEEE Transactions on Information Theory
Publication date: Aug 2012, volume: 58, issue:8, pages: 5338 - 5353
Publisher: IEEE
 
» A “Random Chemistry” Algorithm for Identifying Collections of Multiple Contingencies That Initiate Cascading Failure
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This paper describes a stochastic “Random Chemistry” (RC) algorithm to identify large collections of multiple contingencies that initiate large cascading failures in a simulated power system. The method requires only simulations per contingency identified, which is orders of magnitude faster than random search of this combinatorial space. We applied the method to a model of cascading failure in a power network with branches and identify unique, minimal branch contingencies that cause large cascades, many of which would be missed by using pre-contingency flows, linearized line outage distribution factors, or performance indices as screening factors. Within each collection, the frequency with which individual branches appear follows a power-law (or nearly so) distribution, indicating that a relatively small number of components contribute disproportionately to system vulnerability. The paper discusses various ways that RC generated collections of dangerous contingencies could be used in power systems planning and operations.
Autors: Eppstein, M. J.;Hines, P. D. H.;
Appeared in: IEEE Transactions on Power Systems
Publication date: Aug 2012, volume: 27, issue:3, pages: 1698 - 1705
Publisher: IEEE
 
» A 0.5-V, 440-µW Frequency Synthesizer for Implantable Medical Devices
Abstract:
An ultra-low-power, low-voltage frequency synthesizer designed for implantable medical devices is presented. Several design techniques are adopted to address the issues in ultra-low voltage and current design. The charge pump (CP) in the synthesizer utilizes dynamic threshold-voltage and switch-coupled techniques to provide a high driving current with a low standby current. The synthesizer adopts a ring-based voltage controlled oscillator (VCO) that utilizes a dual resistor-varactor tuning technique to compensate for process-voltage-temperature (PVT) variations and the exponential voltage-to-current curve. Implemented in a 0.13- m CMOS technology, the 0.5-V medical-band frequency synthesizer consumes 440 W while exhibiting a phase noise of 91.5 dBc/Hz at 1-MHz frequency offset.
Autors: Chen, W.-H.;Loke, W.-F.;Jung, B.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1896 - 1907
Publisher: IEEE
 
» A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction
Abstract:
This paper presents a 0.6-V quadrature voltage-controlled oscillator (QVCO) with enhanced swing for low power supply applications. The QVCO comprises a novel capacitive coupling technique that is employed not only for quadrature signal coupling, but also for phase noise reduction. As a result, the proposed QVCO can even achieve 4.6 dB lower phase noise than its single-phase counterpart at 3-MHz offset. Optimized capacitive coupling combined with source inductive enhance-swing technique enables low power and low phase noise simultaneously. The QVCO achieves a measured phase noise of dBc/Hz @ 3-MHz offset with a center frequency of 5.6 GHz and consumes 4.2 mW from a 0.6-V supply. This performance corresponds to a figure-of-merit (FoM) of 191.4 dB. Due to the intrinsic phase shift in the proposed quadrature-coupling path, the problem associated with phase ambiguity between the quadrature outputs has been avoided. The QVCO RFIC is implemented in a CMOS process with core area of .
Autors: Zhao, F.;Dai, F. F.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1694 - 1705
Publisher: IEEE
 
» A 0.7V input output-capacitor-free digitally controlled low-dropout regulator with high current efficiency in 0.35?m CMOS technology
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Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A 1-1-1-1 MASH Delta-Sigma Modulator With Dynamic Comparator-Based OTAs
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A dynamic comparator-based OTA is introduced as a replacement for a conventional OTA. It performs charge transfer in a switched-capacitor circuit by repeatedly evaluating the polarity of the differential input using a dynamic clocked comparator and injecting current pulses at the output to move the input voltage toward zero. The amplitude of the current pulse is reduced each time the input voltage crosses zero to provide fast but accurate settling of the output voltage. Dynamic comparator-based OTAs are applied to the design of a 1-1-1-1 MASH delta-sigma modulator. The 65-nm CMOS prototype achieves a 70.4 dB peak SNDR over a 2.5-MHz bandwidth while consuming 3.73 mW from a 1.2-V supply. The 276-fJ/conv-step FoM represents a four times improvement over previously-reported delta-sigma modulators using zero-crossing-based circuits or comparator-based switched capacitors. Because of the dynamic operation of the OTAs and discrete-time delta-sigma modulator architecture, both bandwidth and power consumption linearly scale with the sampling frequency without any reconfiguration of the modulator.
Autors: Yamamoto, K.;Carusone, A.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1866 - 1883
Publisher: IEEE
 
» A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion
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A series combining transformer(SCT)-based, watt-level 1.9 GHz linear CMOS power amplifier with an on-chip linearizer is demonstrated. Proposed compact, predistortion-based linearizer is embedded in the two-stage PA to compensate AM-PM distortion of the cascode power stages, and improve ACLR of 3GPP WCDMA uplink signal by 2.6 dB at 28.0 dBm output power. The designed interstage power distributor with one tuning inductor contributes to low-loss power supply for the driver stage and high common-mode stability of the whole PA. Moreover, a newly developed PVT variation- tolerant cascode biasing circuit guarantees highly accurate bias voltages in a wide supply voltage range from 2.5 V to 3.6 V. The test chip demonstrates maximum output power of 28.3 dBm at 1.95 GHz, satisfying 3GPP WCDMA spectrum mask with die area of 5.4 mm .
Autors: Onizuka, K.;Ishihara, H.;Hosoya, M.;Saigusa, S.;Watanabe, O.;Otaka, S.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1820 - 1827
Publisher: IEEE
 
» A 12.5-bit 4 MHz 13.8 mW MASH Modulator With Multirated VCO-Based ADC
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A novel MASH delta-sigma ADC architecture is introduced that has a multirated voltage controlled oscillator (VCO)-based ADC in its second stage. The architecture allows for low power and high speed operation and is insensitive to the VCO linearity. A prototype consists of a first-order switched-capacitor (SC) modulator operating at 100 MHz in the first stage followed by a second-stage VCO-based ADC operating at 1.2 GHz. A custom IC prototype of this architecture achieves 77.3 dB signal-to-noise-ratio (SNR) over a 4 MHz signal bandwidth with a power consumption of 13.8 mW. It was fabricated in a 130 nm 1P8M CMOS process. The resulting FoM is 298 fJ per conversion.
Autors: Zaliasl, S.;Saxena, S.;Hanumolu, P. K.;Mayaram, K.;Fiez, T. S.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1604 - 1613
Publisher: IEEE
 
» A 16 MHz BW 75 dB DR CT ADC Compensated for More Than One Cycle Excess Loop Delay
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The maximum sampling rate of a continuous-time modulator in a given process is limited by the minimum flash ADC delay that can be realized. Excess loop delay compensation techniques that are widely used can compensate for delays up to half a clock cycle. Addition of a fast loop outside the flash ADC can break this limit and compensate for one and half clock cycles of delay at the cost of reducing the order of noise shaping by one. This technique, along with a low latency flash ADC, and a delay free calibrated DAC, result in a lowpass continuous-time ADC with the highest reported sampling rate in a 0.18 m process. The prototype occupies 0.68 mm , consumes 47.6 mW, and operates at 800 MS/s. In a 16 MHz bandwidth (oversampling ratio of 25), the dynamic range, maximum signal to noise ratio, and maximum signal to noise and distortion ratios are 75 dB, 67 dB, and 65 dB respectively. In a 32 MHz bandwidth, the dynamic range, maximum signal to noise ratio, and maximum signal to noise and distortion ratios are 64 dB, 57 dB, and 57 dB, respectively.
Autors: Singh, V.;Krishnapura, N.;Pavan, S.;Vigraham, B.;Behera, D.;Nigania, N.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1884 - 1895
Publisher: IEEE
 
» A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology
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This paper presents a 16-Gb/s 45-nm SOI CMOS transceiver for multi-standard backplane applications. The receiver uses a 12-tap DFE with circuit refinements for supporting higher data rates. Both the receiver and the transmitter use dynamic adaptation to combat parameter drift due to changing supply voltage and temperature. A 3-tap FFE is included in the source-series-terminated driver. The combination of DFE and FFE permits error-free NRZ signaling at 16 Gb/s over channels exceeding 30 dB loss. The 8-port core with two PLLs is fully characterized for 16GFC and consumes 385 m W/link.
Autors: Gangasani, G. R.;Hsu, C.-H.;Bulzacchelli, J. F.;Rylov, S.;Beukema, T.;Freitas, D.;Kelly, W.;Shannon, M.;Qi, J.;Xu, H. H.;Natonio, J.;Rasmus, T.;Guo, J.-R.;Wielgos, M.;Garlett, J.;Sorna, M. A.;Meghelli, M.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1828 - 1841
Publisher: IEEE
 
» A 2–20-GHz Analog Lag Correlator for Radio Interferometry
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We present the design and testing of a 2–20-GHz continuum-band analog lag correlator with 16 frequency channels for astronomical interferometry. The correlator has been designed for future use with a prototype single-baseline interferometer operating at 185–275 GHz. The design uses a broad-band Wilkinson divider tree with integral thin-film resistors implemented on an alumina substrate, and custom-made broad-band InGaP/GaAs Gilbert Cell multipliers. The prototype correlator has been fully bench-tested, together with the necessary readout electronics for acquisition of the output signals. The results of these measurements show that the response of the correlator is well behaved over the band. An investigation of the noise behavior also shows that the signal-to-noise ratio of the system is not limited by the correlator performance.
Autors: Holler, C. M.;Jones, M. E.;Taylor, A. C.;Harris, A. I.;Maas, S. A.;
Appeared in: IEEE Transactions on Instrumentation and Measurement
Publication date: Aug 2012, volume: 61, issue:8, pages: 2253 - 2261
Publisher: IEEE
 
» A 20Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter
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Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A 24W Ku band GaN based power amplifier with 9.1dB linear gain
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Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A 3.2ppm/C curvature-compensated bandgap reference with wide supply voltage range
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Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A 4-GHz All Digital PLL With Low-Power TDC and Phase-Error Compensation
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This paper presents a 4-GHz all-digital fractional-N PLL with a low-power TDC operating at low-rate retimed reference clocks, a compensator preventing big phase-error downfalls, and a loop settling monitor. Two retimed reference clocks, nCKR and pCKR, are employed in the TDC to estimate the fractional phase error between the low-rate reference and high-rate oscillator clocks. Applying the retimed reference clocks does not only reduce a dynamic power in its delay chain, but simplify a fractional phase-error correction. The phase-error compensator is introduced to avoid big phase-error downfalls caused by large output glitches originating from a high-speed accumulator. In addition, a loop-settling monitor is invented to allow the DCO operation mode to be shifted seamlessly and fast. By consuming 9.6 mW, the ADPLL achieves in-band phase noise, integrated noise, and 740 ns settling time.
Autors: Lee, J.-Y.;Park, M.-J.;Min, B.-H.;Kim, S.;Park, M.-Y.;Yu, H.-K.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1706 - 1719
Publisher: IEEE
 
» A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech Recognition
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We have developed a low-power VLSI chip for 60-kWord real-time continuous speech recognition based on a context-dependent hidden Markov model (HMM). Our implementation includes a cache architecture using locality of speech recognition, beam pruning using a dynamic threshold, two-stage language model searching, highly parallel Gaussian mixture model (GMM) computation based on the mixture level, a variable-frame look-ahead scheme, and elastic pipeline operation between the Viterbi transition and GMM processing. The accuracy degradation of the important parameters in Viterbi computation is strictly discussed. Results show that our implementation achieves 95% bandwidth reduction (70.86 MB/s) and 78% required frequency reduction (126.5 MHz) comparing to the referential Julius system. The test chip, fabricated using 40 nm CMOS technology, contains 1.9 M transistors for logic and 7.8 Mbit on-chip memory. It dissipates 144 mW at 126.5 MHz and 1.1 V for 60-kWord real-time continuous speech recognition.
Autors: He, G.;Sugahara, T.;Miyamoto, Y.;Fujinaga, T.;Noguchi, H.;Izumi, S.;Kawaguchi, H.;Yoshimoto, M.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1656 - 1666
Publisher: IEEE
 
» A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications
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A 7-bit, 2.2-GS/s time-interleaved subranging CMOS analog-to-digital converter (ADC) for low-power gigabit wireless communication system-on-a-chip (SoC) is presented. A time-splitting subranging architecture is invented to significantly boost the speed of individual ADC channels. In addition, a low-power and fast-settling distributed resistor array for reference voltages is proposed to mitigate gain mismatches within channels. Moreover, the channel offset mismatches are calibrated through the digital- controlled corrective current sources embedded in the track-and-hold amplifiers of each sub-ADC. The prototype is implemented in 65 nm CMOS, occupying only 0.3 mm chip area and consuming 40 mW at 2.2 GS/s from a 1 V supply. Measured signal-to-noise and distortion ratio (SNDR) and spurious-free dynamic range (SFDR) are 38 dB and 46 dB, respectively, with a 1.08 GHz input at 2.2 GS/s sampling rate. The effective number of bits (ENOB) is 6.0 bits at Nyquist rate, and the figure-of-merit (F.O.M.) is 0.28 pJ/conv.-step. This prototype has also been integrated into a gigabit self-healing wireless transceiver SoC.
Autors: Ku, I.-N.;Xu, Z.;Kuan, Y.-C.;Wang, Y.-H.;Chang, M.-C. F.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1854 - 1865
Publisher: IEEE
 
» A 5MSps 13.25?W 8-bit SAR ADC with single-ended or differential input
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Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A 60 mW Class-G Stereo Headphone Driver for Portable Battery-Powered Devices
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Pub DtlA 60 mW 1.15 mA/channel Class-G stereo headphone driver primarily designed for demanding applications in mobile phones and other portable communication devices is described. The architecture of the driver has been chosen to overcome the various design challenges for audio amplifiers in a wireless environment. A high-order feed-forward loop topology provides high immunity to battery disturbance with extended correction range. In addition, a Class-G amplifier with a Class-AB/B driving stage improves the small-signal efficiency and extends music playback time. Implemented in 0.18 m CMOS technology, the stereo headphone driver achieves a DR of 111 dB and PSRR of 120 dB at the GSM TDMA frequency of 217 Hz while occupying an area of 2.3 mm .
Autors: Galal, S.;Zheng, H.;Abdelfattah, K.;Chandrasekhar, V.;Mehr, I.;Chen, A. J.;Platenak, J.;Matalon, N.;Brooks, T. L.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1921 - 1934
Publisher: IEEE
 
» A 64-Channel Transmitter for Investigating Parallel Transmit MRI
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Multiple channel radiofrequency (RF) transmitters are being used in magnetic resonance imaging to investigate a number of active research topics, including transmit SENSE and B shimming. Presently, the cost and availability of multiple channel transmitters restricts their use to relatively few sites. This paper describes the development and testing of a relatively inexpensive transmit system that can be easily duplicated by users with a reasonable level of RF hardware design experience. The system described here consists of 64 channels, each with 100 W peak output level. The hardware is modular at the level of four channels, easily accommodating larger or smaller channel counts. Unique aspects of the system include the use of vector modulators to replace more complex IQ direct digital modulators, 100 W MOSFET RF amplifiers with partial microstrip matching networks, and the use of digital potentiometers to replace more complex and costly digital-to-analog converters to control the amplitude and phase of each channel. Although mainly designed for B shimming, the system is capable of dynamic modulation necessary for transmit SENSE by replacing the digital potentiometers controlling the vector modulators with commercially available analog output boards. The system design is discussed in detail and bench and imaging data are shown, demonstrating the ability to perform phase and amplitude control for B shimming as well as dynamic modulation for transmitting complex RF pulses.
Autors: Feng, K.;Hollingsworth, N. A.;McDougall, M. P.;Wright, S. M.;
Appeared in: IEEE Transactions on Biomedical Engineering
Publication date: Aug 2012, volume: 59, issue:8, pages: 2152 - 2160
Publisher: IEEE
 
» A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2–2 MASH Modulator Dissipating 16 mW Power
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This paper presents a new stage-sharing technique in a discrete-time (DT) 2–2 MASH delta-sigma ADC to reduce the modulator power consumption and chip die area. The proposed technique shares all active blocks between the two stages of the modulator. The 2–2 MASH modulator utilizes the second-order Chain of Integrators with Weighted Feed-forward Summation (CIFF) and the Cascade of Integrators with Distributed Feedback Branches (CIFB) architectures for the first and second stages, respectively. Using the proposed technique, the second integrator and the adder op-amps of the modulator first stage are shared with the first and second integrator op-amps of the second stage. In addition to the stage-sharing scheme, other changes are introduced to improve the modulator dynamic range (DR) and power dissipation. Measurement results show that the modulator designed in a CMOS technology achieves 75 dB SNDR over a 5 MHz signal bandwidth with a clock frequency of 130 MHz, while dissipating less than 9 mW analog power.
Autors: Zanbaghi, R.;Saxena, S.;Temes, G. C.;Fiez, T. S.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1614 - 1625
Publisher: IEEE
 
» A Bayesian approach to sparse dynamic network identification
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Appeared in: Automatica
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A bio-inspired multi degree of freedom actuator based on a novel cylindrical ionic polymer-metal composite material
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Appeared in: Robotics and Autonomous Systems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A biomimetic underwater microrobot with multifunctional locomotion
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Appeared in: Robotics and Autonomous Systems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A bivariate model for retinal image identification in lambs
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Appeared in: Computers and Electronics in Agriculture
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Broadband Optical Fiber Based Inline Polarizer for Telecom Wavelength Range
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Appeared in: Sensors and Actuators A: Physical
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A cascade face recognition system using hybrid feature extraction
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Appeared in: Digital Signal Processing
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Chance-Constrained Optimization Approach for Control of Transmission Voltages
Abstract:
In this paper, a chance-constrained optimization (CCO) is presented to handle uncertainty in control of transmission voltages. A control scheme is proposed using a steady-state system model to achieve the goal of online voltage control and preventing long-term voltage instability. In order to model steady-state system response, the long-term model of governors and Automatic Voltage Regulators are employed in the control scheme. The Nordic32 test system is selected to show the simulation results of the proposed technique.
Autors: Hajian, M.;Glavic, M.;Rosehart, W. D.;Zareipour, H.;
Appeared in: IEEE Transactions on Power Systems
Publication date: Aug 2012, volume: 27, issue:3, pages: 1568 - 1576
Publisher: IEEE
 
» A Class-E driven inductive power delivery system covering the complete upper body
Abstract:


Autors:
Appeared in: Sensors and Actuators A: Physical
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A closed-loop data based test for robust performance improvement in iterative identification and control redesigns
Abstract:


Autors:
Appeared in: Automatica
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A CLT on the SNR of Diagonally Loaded MVDR Filters
Abstract:
This paper studies the fluctuations of the signal-to-noise ratio (SNR) of minimum variance distorsionless response (MVDR) filters implementing diagonal loading in the estimation of the covariance matrix. Previous results in the signal processing literature are generalized and extended by considering both spatially as well as temporarily correlated samples. Specifically, a central limit theorem (CLT) is established for the fluctuations of the SNR of the diagonally loaded MVDR filter, under both supervised and unsupervised training settings in adaptive filtering applications. Our second-order analysis is based on the Nash-Poincaré inequality and the integration by parts formula for Gaussian functionals, as well as classical tools from statistical asymptotic theory. Numerical evaluations validating the accuracy of the CLT confirm the asymptotic Gaussianity of the fluctuations of the SNR of the MVDR filter.
Autors: Rubio, F.;Mestre, X.;Hachem, W.;
Appeared in: IEEE Transactions on Signal Processing
Publication date: Aug 2012, volume: 60, issue:8, pages: 4178 - 4195
Publisher: IEEE
 
» A combination of parallel factor and independent component analysis
Abstract:


Autors:

Highlights

Appeared in: Signal Processing
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A combined algorithm for simulating fiber lasers based on the shooting and relaxation methods
Abstract:


Autors:

Highlights

Appeared in: Optical Fiber Technology
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A compact and low cost dosimetry system based on MOSFET for in vivo radiotherapy
Abstract:


Autors:
Appeared in: Sensors and Actuators A: Physical
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A comparative study of spacecraft attitude determination and estimation algorithms (a cost-benefit approach)
Abstract:


Autors:
Appeared in: Aerospace Science and Technology
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Comparison of Simulation and Hardware-in-the- Loop Alternatives for Digital Control of Power Converters
Abstract:
Debugging digital controllers for power converters can be a problem because there are both digital and analog components. This paper focuses on debugging digital controllers to be implemented in Field Programmable Gate Arrays or Application Specific Integrated Circuits, which are designed in hardware description languages. Four methods are proposed and described. All of them allow simulation, and two methods also allow emulation—synthesizing the model of the converter to run the complete closed-loop system in actual hardware. The first method consists in using a mixed analog and digital simulator. This is the easiest alternative for the designer, but simulation time can be a problem, specially for long simulations like those necessary in power factor correction or when the controller is very complex, for example, with embedded processors. The alternative is to use pure digital models, generating a digital model of the power converter. Three methods are proposed: real type, float type and fixed point models (in the latter case including hand-coded and automatic-coded descriptions). Float and fixed point models are synthesizable, so emulation is possible, achieving speedups over 20 000. The results obtained with each method are presented, highlighting the advantages and disadvantages of each one. Apart from that, an analysis of the necessary resolution in the variables is presented, being the main conclusion that 32-bit floating point is not enough for medium and high switching frequencies.
Autors: Sanchez, A.;de Castro, A.;Garrido, J.;
Appeared in: IEEE Transactions on Industrial Informatics
Publication date: Aug 2012, volume: 8, issue:3, pages: 491 - 500
Publisher: IEEE
 
» A Comparison of Smart Grid Technologies and Progresses in Europe and the U.S.
Abstract:
This paper discusses historical and technical events in the U.S. and Europe over the last few years that are aimed at modernizing the electric power grid. The U.S. federal government has ratified the “smart grid initiative” as the official policy for modernizing the electricity grid including unprecedented provisions for timely information and control options to consumers and deployment of “smart” technologies. European countries are unified in researching and developing related technologies through various structures supported by the European Union. This paper presents the development of smart grids and an analysis of the methodologies, milestones, and expected evolutions of grid technologies that will transform society in the near future.
Autors: Simoes, M. G.;Roche, R.;Kyriakides, E.;Suryanarayanan, S.;Blunier, B.;McBee, K. D.;Nguyen, P. H.;Ribeiro, P. F.;Miraoui, A.;
Appeared in: IEEE Transactions on Industry Applications
Publication date: Aug 2012, volume: 48, issue:4, pages: 1154 - 1162
Publisher: IEEE
 
» A Comparison of Snow Depth on Sea Ice Retrievals Using Airborne Altimeters and an AMSR-E Simulator
Abstract:
A comparison of snow depths on sea ice was made using airborne altimeters and an Advanced Microwave Scanning Radiometer for the Earth Observing System (AMSR-E) simulator. The data were collected during the March 2006 National Aeronautics and Space Administration (NASA) Arctic field campaign utilizing the NASA P-3B aircraft. The campaign consisted of an initial series of coordinated surface and aircraft measurements over Elson Lagoon, Alaska and adjacent seas followed by a series of large-scale (100 km 50 km) coordinated aircraft and AMSR-E snow depth measurements over portions of the Chukchi and Beaufort seas. This paper focuses on the latter part of the campaign. The P-3B aircraft carried the University of Colorado Polarimetric Scanning Radiometer (PSR-A), the NASA Wallops Airborne Topographic Mapper (ATM) lidar altimeter, and the University of Kansas Delay-Doppler (D2P) radar altimeter. The PSR-A was used as an AMSR-E simulator, whereas the ATM and D2P altimeters were used in combination to provide an independent estimate of snow depth. Results of a comparison between the altimeter-derived snow depths and the equivalent AMSR-E snow depths using PSR-A brightness temperatures calibrated relative to AMSR-E are presented. Data collected over a frozen coastal polynya were used to intercalibrate the ATM and D2P altimeters before estimating an altimeter snow depth. Results show that the mean difference between the PSR and altimeter snow depths is 2.4 cm (PSR minus altimeter) with a standard deviation of 7.7 cm. The RMS difference is 8.0 cm. The overall correlation between the two snow depth data sets is 0.59.
Autors: Cavalieri, D. J.;Markus, T.;Ivanoff, A.;Miller, J. A.;Brucker, L.;Sturm, M.;Maslanik, J. A.;Heinrichs, J. F.;Gasiewski, A. J.;Leuschen, C.;Krabill, W.;Sonntag, J.;
Appeared in: IEEE Transactions on Geoscience and Remote Sensing
Publication date: Aug 2012, volume: 50, issue:8, pages: 3027 - 3040
Publisher: IEEE
 
» A complete SPICE subcircuit-based model library for organic photodiodes
Abstract:


Autors:

Graphical abstract

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Appeared in: Solid-State Electronics
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A comprehensive integration infrastructure for embedded system design
Abstract:


Autors:
Appeared in: Microprocessors and Microsystems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Computational Model for Predicting Protein Interactions Based on Multidomain Collaboration
Abstract:
Recently, several domain-based computational models for predicting protein-protein interactions (PPIs) have been proposed. The conventional methods usually infer domain or domain combination (DC) interactions from already known interacting sets of proteins, and then predict PPIs using the information. However, the majority of these models often have limitations in providing detailed information on which domain pair (single domain interaction) or DC pair (multidomain interaction) will actually interact for the predicted protein interaction. Therefore, a more comprehensive and concrete computational model for the prediction of PPIs is needed. We developed a computational model to predict PPIs using the information of intraprotein domain cohesion and interprotein DC coupling interaction. A method of identifying the primary interacting DC pair was also incorporated into the model in order to infer actual participants in a predicted interaction. Our method made an apparent improvement in the PPI prediction accuracy, and the primary interacting DC pair identification was valid specifically in predicting multidomain protein interactions. In this paper, we demonstrate that 1) the intraprotein domain cohesion is meaningful in improving the accuracy of domain-based PPI prediction, 2) a prediction model incorporating the intradomain cohesion enables us to identify the primary interacting DC pair, and 3) a hybrid approach using the intra/interdomain interaction information can lead to a more accurate prediction.
Autors: Jang, Woo-Hyuk;Jung, Suk-Hoon;Han, Dong-Soo;
Appeared in: IEEE/ACM Transactions on Computational Biology and Bioinformatics
Publication date: Aug 2012, volume: 9, issue:4, pages: 1081 - 1090
Publisher: IEEE
 
» A computationally efficient TLM thermal model in the beam displacement modulation regime
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Construction of Codebooks Associated With Binary Sequences
Abstract:
An codebook is a set of unit-norm code vectors in a -dimensional vector space. For its applications, it is desired that the maximum magnitude of inner products between a pair of distinct code vectors should be as small as possible, meeting the Welch bound equality strictly or asymptotically. In this paper, an codebook is constructed from a partial matrix with , where each code vector is equivalent to a column of the matrix. To obtain the matrix, rows are selected from a matrix , associated with a binary sequence of length and Hamming weight , where a set of the selected row indices is equivalent to the index set of nonzero entries of the binary sequence. It is then discovered that the maximum magnitude of inner products between a pair of distinct code vectors is determined by the maximum magnitude of -transform of the binary sequence. Thus, constructing a codebook with small magnitude of inner products is equivalent to finding a binary sequence where the maximum magnitude of its $ {bm{Phi }}$-transform is as small as possible. From the discovery, new classes of codebooks with nontrivial bounds on the maximum inner products are constructed from Fourier and Hadamard matrices associated with binary sequences.
Autors: Yu, N. Y.;
Appeared in: IEEE Transactions on Information Theory
Publication date: Aug 2012, volume: 58, issue:8, pages: 5522 - 5533
Publisher: IEEE
 
» A Contact-Resistive Random-Access-Memory-Based True Random Number Generator
Abstract:
A new type of true random number generator, based on the random telegraph noise of a contact-resistive random access memory device, is proposed in this letter. The random-number generator consists of only a simple bias circuit plus a comparator, leading to small circuit area and low power consumption. By realizing this generator by the 65-nm complementary metal–oxide–semiconductor logic process, the occupied area can be as low as 45 , demonstrating substantial saving in the circuit area.
Autors: Huang, C.-Y.;Shen, W. C.;Tseng, Y.-H.;King, Y.-C.;Lin, C.-J.;
Appeared in: IEEE Electron Device Letters
Publication date: Aug 2012, volume: 33, issue:8, pages: 1108 - 1110
Publisher: IEEE
 
» A coordinated voltage/reactive power control method for multi-TSO power systems
Abstract:


Autors:

Highlights

Appeared in: International Journal of Electrical Power & Energy Systems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A coupled mathematical model for simultaneous microwave and convective drying of wheat seeds
Abstract:


Autors:

Highlights

Appeared in: Biosystems Engineering
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Cross-Layer Design for Perceptual Optimization Of H.264/SVC with Unequal Error Protection
Abstract:
Delivering high perceptual quality video over wireless channels is challenging due to the changing channel quality and the variations in the importance of one source packet to the next for the end-user's perceptual experience. Leveraging perceptual metrics in concert with link adaptation to maximize perceptual quality and satisfy real-time delay constraints is largely unexplored. We introduce an APP/MAC/PHY cross-layer architecture that enables optimizing perceptual quality for delay-constrained scalable video transmission. We propose an online QoS-to-QoE mapping technique to quantify the loss visibility of packets from each video layer using the ACK history and perceptual metrics. At the PHY layer, we develop a link adaptation technique that uses the QoS-to-QoE mapping to provide perceptually-optimized unequal error protection per layer according to packet loss visibility. At the APP layer, the source rate is adapted by selecting the set of temporal and quality layers to be transmitted based on the channel statistics, source rates, and playback buffer state. The proposed cross-layer optimization framework allows the channel to adapt at a faster time scale than the video codec. Furthermore, it provides a tradeoff between playback buffer occupancy and perceptual quality. We show that the proposed architecture prevents playback buffer starvation, provides immunity against short-term channel fluctuations, regulates the buffer size, and achieves a 30% increase in video capacity versus throughput-optimal link adaptation.
Autors: Abdel Khalek, Amin;Caramanis, Constantine;Heath, Jr., Robert W.;
Appeared in: IEEE Journal on Selected Areas in Communications
Publication date: Aug 2012, volume: 30, issue:7, pages: 1157 - 1171
Publisher: IEEE
 
» A CURE for Noisy Magnetic Resonance Images: Chi-Square Unbiased Risk Estimation
Abstract:
In this paper, we derive an unbiased expression for the expected mean-squared error associated with continuously differentiable estimators of the noncentrality parameter of a chi-square random variable. We then consider the task of denoising squared-magnitude magnetic resonance (MR) image data, which are well modeled as independent noncentral chi-square random variables on two degrees of freedom. We consider two broad classes of linearly parameterized shrinkage estimators that can be optimized using our risk estimate, one in the general context of undecimated filterbank transforms, and the other in the specific case of the unnormalized Haar wavelet transform. The resultant algorithms are computationally tractable and improve upon most state-of-the-art methods for both simulated and actual MR image data.
Autors: Luisier, F.;Blu, T.;Wolfe, P. J.;
Appeared in: IEEE Transactions on Image Processing
Publication date: Aug 2012, volume: 21, issue:8, pages: 3454 - 3466
Publisher: IEEE
 
» A Current Source Converter-Based Active Power Filter for Mitigation of Harmonics at the Interface of Distribution and Transmission Systems
Abstract:
A medium-power current source converter (CSC)-based shunt active power filter (APF) system is designed and implemented to suppress the amplification of low-order harmonics at the medium-voltage (MV) interface bus between the distribution and transmission systems, owing to the presence of large shunt capacitor banks installed only for reactive power compensation. Four CSC-based APF modules designed at 1.0 kV are operated in parallel and connected to the 31.5-kV MV bus via a specially designed coupling transformer. In each APF module, a specially designed LC-type input filter eliminates the switching ripples, and active damping method embedded into the control software suppresses harmonic frequencies around the corner frequency of the input filter. The resulting system can operate at relatively high frequencies in the range from 2.0 to 3.0 kHz, depending upon which selected harmonics among 5th, 7th, 11th, and 13th are to be eliminated. Furthermore, in order to reduce the installed capacity of CSCs, selective harmonic amplification method is applied to the APF system described in the paper. MV APF system has been built as a mobile system for temporary connection to a problematic MV interface bus until a permanent solution is found for that location in the distribution system.
Autors: Terciyanli, A.;Avci, T.;Yilmaz, İ.;Ermis, C.;Kose, K. N.;Acik, A.;Kalaycioglu, A. S.;Akkaya, Y.;Cadirci, I.;Ermis, M.;
Appeared in: IEEE Transactions on Industry Applications
Publication date: Aug 2012, volume: 48, issue:4, pages: 1374 - 1386
Publisher: IEEE
 
» A cyber-physical experimentation environment for the security analysis of networked industrial control systems
Abstract:


Autors:

Graphical abstract

image

Appeared in: Computers & Electrical Engineering
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A DEA–Tobit Analysis to Understand the Role of Experience and Task Factors in the Efficiency of Software Engineers
Abstract:
This study employs the data-envelopment analysis (DEA)-Tobit regression approach to analyze data from a leading software engineering organization to gain insights regarding the role of various types of technical experience and task factors in the efficiency of personnel assigned to software tasks. “Efficiency” follows a holistic-view definition as the quality and productivity achieved from the overall personnel experience, and it is evaluated with DEA. Then, a Tobit regression model is employed to determine the effect that various types of technical experience and task factors have on the DEA efficiency scores. Although the DEA–Tobit technique has been applied to various areas within the management science and operations research fields, it has not yet been presented as a general evaluation tool within the software-engineering field to understand drivers of software quality and productivity. We demonstrate how DEA–Tobit fills a gap not addressed by commonly applied methods in the literature.
Autors: Otero, L. D.;Centeno, G.;Otero, C. E.;Reeves, K.;
Appeared in: IEEE Transactions on Engineering Management
Publication date: Aug 2012, volume: 59, issue:3, pages: 391 - 400
Publisher: IEEE
 
» A decision support system for design of mass production machining lines composed of stations with rotary or mobile table
Abstract:


Autors:

Highlights

Appeared in: Robotics and Computer-Integrated Manufacturing
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Decision Support System-Fertigation Simulator (DSS-FS) for design and optimization of sprinkler and drip irrigation systems
Abstract:


Autors:

Highlights

Appeared in: Computers and Electronics in Agriculture
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A DEM-based analysis of the influence of aggregate structure on suspension shear yield stress
Abstract:


Autors:

Graphical abstract

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Appeared in: Advanced Powder Technology
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A demand side management based simulation platform incorporating heuristic optimization for management of household appliances
Abstract:


Autors:

Highlights

Appeared in: International Journal of Electrical Power & Energy Systems
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A design automation system for CMOS analog integrated circuits using New Hybrid Shuffled Frog Leaping Algorithm
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A design for robust wide metal tracks
Abstract:


Autors:
Appeared in: Microelectronics Reliability
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A design of IFIR prototype filter for Cosine Modulated Filterbank and Transmultiplexer
Abstract:


Autors:
Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A device to measure dynamic front wheel reaction to safeguard rearward overturning of agricultural tractors
Abstract:


Autors:

Highlights

Appeared in: Computers and Electronics in Agriculture
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Difference-Fractional FOM Decision Method for Down-Selection of Hypersonic Compression System Configurations
Abstract:


Autors:
Appeared in: Aerospace Science and Technology
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A differential smoothing technique for the extraction of MOSFET threshold voltage using extrapolation in the linear region
Abstract:


Autors:

Highlights

Appeared in: Solid-State Electronics
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A diffusion and curvature dependent surface elastic model with application to stress analysis of anode in lithium ion battery
Abstract:


Autors:
Appeared in: International Journal of Engineering Science
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Digital Dual-State-Variable Predictive Controller for High Switching Frequency Buck Converter With Improved DPWM
Abstract:
This paper presents a novel digital controller for the high-switching-frequency buck converter based on the principle of predictive control. Compared with a traditional current-mode predictive controller, the prediction of the inductor current and the output voltage are performed at the same time by adding a control variable to the DPWM signal that can dynamically adjust the time of voltage jump. It accelerates the convergence rate during transient states, while inherently preserving the rejection of power and reference perturbations. The analysis of controller's operation illustrates the dual-state-variable predictive attributes that lead to the digital implementation. To further enhance the power efficiency of the controller, an 1-1 MASH DPWM with a feasible dither generation module is proposed to restrain the idle-tone effects without deteriorating the closed-loop stability as well as to preserve reasonable cost in silicon area. Experimental results verify closed-loop operations at switching frequency up to 4 MHz only limited by the discrete buck converter. The converter is well regulated over a large output range with excellent dynamic performances.
Autors: Li, B.;Lin-Shi, X.;Allard, B.;Retif, J.-M.;
Appeared in: IEEE Transactions on Industrial Informatics
Publication date: Aug 2012, volume: 8, issue:3, pages: 472 - 481
Publisher: IEEE
 
» A diketopyrrolopyrrole containing molecular semiconductor: Synthesis, characterization and solution-processed 1D-microwire based electronic devices
Abstract:


Autors:

Graphical abstract

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Appeared in: Organic Electronics
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Direct Visual Servoing Scheme for Automatic Nanopositioning
Abstract:
This paper demonstrates an accurate nanopositioning scheme based on a direct visual servoing process. This technique uses only the pure image signal (photometric information) to design the visual servoing control law. With respect to traditional visual servoing approaches that use geometric visual features (points, lines ...), the visual features used in the control law is the pixel intensity. The proposed approach has been tested in term of accuracy and robustness in several experimental conditions. The obtained results have demonstrated a good behavior of the control law and very good positioning accuracy. The obtained accuracies are 89 nm, 14 nm, and 0.001° in the x-, y -, and θ-axes of a positioning platform, respectively.
Autors: Tamadazte, B.;Le-Fort Piat, N.;Marchand, E.;
Appeared in: IEEE/ASME Transactions on Mechatronics
Publication date: Aug 2012, volume: 17, issue:4, pages: 728 - 736
Publisher: IEEE
 
» A Distributed Bulk-Oxide Trap Model for InGaAs MOS Devices
Abstract:
This paper presents a distributed circuit model for bulk-oxide traps based on tunneling between the semiconductor surface and trap states in the gate dielectric film. The model is analytically solved at dc. It is shown that the distributed bulk-oxide trap model correctly depicts the frequency dispersion in the capacitance– and conductance–voltage data of –InGaAs MOS devices that do not fit the conventional interface state model. The slope degradation or stretch-out of the measured capacitance–voltage curve near flatband can be also explained by the distributed bulk-oxide trap model.
Autors: Yuan, Y.;Yu, B.;Ahn, J.;McIntyre, P. C.;Asbeck, P. M.;Rodwell, M. J. W.;Taur, Y.;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Aug 2012, volume: 59, issue:8, pages: 2100 - 2106
Publisher: IEEE
 
» A distributed simplex algorithm for degenerate linear programs and multi-agent assignments
Abstract:


Autors:
Appeared in: Automatica
Publication date: Aug 2012
Publisher: Elsevier B.V.
 
» A Dither-Less All Digital PLL for Cellular Transmitters
Abstract:
An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is achieved both in-band and out-of-band exploiting a 2-dimensional Vernier time-to-digital converter and a dither-less digitally controlled oscillator. These building blocks heavily rely on digital calibration techniques to precisely and efficiently implement two-point modulation and spur cancellation in the presence of implementation impairments. The presented prototype shows an in-band phase noise of 108 dBc/Hz, an out-of-band phase noise of 160 dBc/Hz @20 MHz and in-band fractional spurs below 50 dBc. These results are obtained for an output carrier of 1.8 GHz, a reference clock of 26 MHz, with a power consumption of 41.6 mW.
Autors: Vercesi, L.;Fanori, L.;De Bernardinis, F.;Liscidini, A.;Castello, R.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Aug 2012, volume: 47, issue:8, pages: 1908 - 1920
Publisher: IEEE
 
» A Dual-Band 2.45/6 GHz CMOS LNA Utilizing a Dual-Resonant Transformer-Based Matching Network
Abstract:
This paper analyzes and presents design equations for a new transformer-based matching network capable of simultaneously matching two different frequencies. This network is then used to realize a dual-band low-noise amplifier that is fabricated in a 0.13 CMOS process and is capable of operating at 2.45 GHz and 6 GHz. The measured and noise figure for 2.45 GHz (6 GHz) is 9.4 dB (18.9 dB) and 2.8 dB (3.8 dB), respectively. The IIP3 is measured to be and at 2.45 GHz and 6 GHz, respectively. The power consumption of the system (excluding the buffer) is 2.79 mW from a 1.2 V supply and the total area is .
Autors: Neihart, N. M.;Brown, J.;Yu, X.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1743 - 1751
Publisher: IEEE
 
» A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration
Abstract:
A fully integrated dual-channel reconfigurable GNSS receiver supporting Compass/GPS/GLONASS/Galileo systems is implemented in 65 nm CMOS. The receiver incorporates two independent channels to receive dual-frequency signals simultaneously. GNSS signals located at the 1.2 GHz or 1.6 GHz bands are supported, with their bandwidths programmable among 2.2 MHz, 4.2 MHz, 8 MHz, 10 MHz, and 18 MHz. By implementing a flexible frequency plan with a low/zero-IF architecture and reconfigurable analog baseband circuits, only one frequency synthesizer is required to provide the local oscillator (LO) frequency for two channels, thereby avoiding any LO crosstalk. Analog baseband circuits employ operational amplifiers that are capable of power scaling, in order to minimize power consumption across different operating modes. An I/Q mismatch calibration module placed prior to the complex-IF bandpass filter is implemented to improve the image rejection ratio. The receiver achieves a minimum 1.88 dB noise figure, an average 50 dB image rejection ratio, and a 64 dB dynamic range with 1 dB steps of gain-adjustment, with a total power consumption of 31–44 mW. Finally, experimental verification combining both the receiver and a digital baseband shows a positioning result comparable to commercial chips.
Autors: Qi, N.;Xu, Y.;Chi, B.;Xu, Y.;Yu, X.;Zhang, X.;Xu, N.;Chiang, P.;Rhee, W.;Wang, Z.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Aug 2012, volume: 59, issue:8, pages: 1720 - 1732
Publisher: IEEE
 

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