Pages: 01234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950


Electrical and Electronics Engineering publications abstract of: 06-2012 sorted by title, page: 0
» "It's the Net, Stupid"
Abstract:
Devices on the Internet of all kinds benefit both from their connectivity and their ability to interact with large-scale computational resources that form part of the Internet ecosystem. Internet-based systems can manage networked devices, record and analyze their activities, and improve our ability to visualize the operation of large-scale aggregations of Internet-enabled systems
Autors: Cerf, Vinton G.;
Appeared in: IEEE Internet Computing
Publication date: Jun 2012, volume: 16, issue:3, pages: 96 - 96
Publisher: IEEE
 
» "That the tabernacle may be one whole" [From the Editor's Bench]
Abstract:
The tabernacle, the Jewish nation's central point of worship while in the desert and for many years after, was designed in a modular fashion and was meant to be assembled and disassembled on a regular basis. Its component parts were works of beauty and were built by the best craftsmen of their day. In the description of the assembly of the tabernacle, we are told, "And thou shalt make fifty clasps of gold, and couple the curtains one to another with the clasps, that the tabernacle may be one whole" (Exodus, 26:6, The Tanach, Jewish Publication Society translation, 1917). The tabernacle was modular in design but was designed so that when fully assembled, it formed a coherent whole.
Autors: Engelberg, S.;
Appeared in: IEEE Instrumentation & Measurement Magazine
Publication date: Jun 2012, volume: 15, issue:3, pages: 4 - 4
Publisher: IEEE
 
» “The Whole Is More Than the Sum of Its Parts”—Aristotle [President's Column]
Abstract:
Autors: Kolias, N.;
Appeared in: IEEE Microwave Magazine
Publication date: Jun 2012, volume: 13, issue:4, pages: 22 - 60
Publisher: IEEE
 
» 'Fingerprinting for food stamps' row triggers North American privacy debate
Abstract:


Autors:
Appeared in: Biometric Technology Today
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 0.8V PLL-based automatic frequency tuning system for current-mode filters
Abstract:


Autors:
Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 1-50-MHz VHF electromagnetic sensor-interface power-attenuation detector circuit
Abstract:


Autors:
Appeared in: AEU - International Journal of Electronics and Communications
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 1-D Electromagnetic and Thermal-Hydraulic Analysis of the Superconducting Proposal for the CS Magnets of FAST
Abstract:
FAST (Fusion Advanced Studies Torus), the Italian proposal of a Satellite Facility to ITER, has been the object of an intense re-design activity aimed at verifying the feasibility of a superconducting solution for its magnet system. One of the most difficult and critical obstacles is represented by the central solenoid (CS) magnet, due to the rapid variation of the current and magnetic field (up to 40 T/s) foreseen so far in the reference scenario. The associated losses induced in the CS magnets should be dissipated by the flow of helium that cools the conductors. Nonetheless, even the losses depend on the conductor design, therefore, not only the thermal-hydraulics of the Cable-in-Conduit Conductors (CICCs) but also the strand properties, should be considered to identify the best design capable to sustain the transient in the CS magnets, keeping the scenario originally foreseen for the resistive configuration of the machine unaltered. The present paper discusses the electromagnetic and thermal-hydraulic behavior of the CICC design envisaged for the FAST CS magnet in the H-mode scenario, and identifies the possible strategies to make a superconducting solution sustainable.
Autors: Polli, G. M.;Muzzi, L.;Pompeo, N.;della Corte, A.;Di Zenobio, A.;Turtu, S.;Crisanti, F.;Cucchiaro, A.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4902704 - 4902704
Publisher: IEEE
 
» 1-G HTS Split Coil Magnet for Research Purposes
Abstract:
A practical split coil magnet using Bi-2223 HTS tapes has been developed and tested. The design parameter is the maximal magnetic field at the aperture of a coil. 1-G Bi-2223 tape was used for magnet's winding produced by Sumitomo Electric Industry Co. The maximum magnetic field in the magnet is determined by the dependence of 1-G tape's critical current on magnetic field normal to the HTS surface of a tape. Reduction of the normal component of the magnetic field to the HTS tape was achieved by using the iron plates. The finite element modeling has been used to design the magnet configurations. The simulation results are in good agreement with the measurement data. The maximum magnetic field at the aperture of the magnet reached 0.75 T at 77.4 K with 1 T of maximum field on winding. The split coil is used to test anisotropy of critical currents of HTS tapes in our standard HTS wires characterization test program. The details of split coil design and magnet test results are presented.
Autors: Fetisov, S. S.;Zubko, V. V.;Radchenko, I. P.;Mukhanov, S. V.;Vysotsky, V. S.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 3900404 - 3900404
Publisher: IEEE
 
» 1.3 to 1.55 All-Optical Wavelength Conversion for VCSEL-to-VCSEL Inversion and Logic
Abstract:
We demonstrate all-optical wavelength conversion from the O to the C band using a 1550-nm commercial vertical-cavity surface-emitting laser (VCSEL) subject to external optical injection at 1300 nm. For the first time to our knowledge, we show that this configuration can also be used to develop all-optical inverters and cross-band NAND and NOR gates based on VCSEL devices, and investigate their potential speed of operation.
Autors: Mazzucato, S.;Schires, K.;Hurtado, A.;Adams, M. J.;Henning, I. D.;Balkan, N.;
Appeared in: IEEE Photonics Journal
Publication date: Jun 2012, volume: 4, issue:3, pages: 817 - 824
Publisher: IEEE
 
» 1/f noise suppression of giant magnetoresistive sensors with vertical motion flux modulation
Abstract:
The 1/f resistance noise is one of the main noise sources of giant magnetoresistive sensors, which will cause intrinsic detection limit at low frequency. To suppress this noise, a vertical motion flux modulation (VMFM) scheme with high efficiency and simple structures is proposed. And the electrical coupling effect is investigated with an equivalent circuit model. We found that the electrical coupling disturbance can be suppressed by improving the symmetry of VMFM sensors. The modulation efficiency of VMFM sensors has reached 18.8%, which is higher than most prototype sensors with other flux modulation schemes.
Autors: Hu, Jiafei;Pan, Mengchun;Tian, Wugang;Chen, Dixiang;Zhao, Jianqiang;Luo, Feilu;
Appeared in: Applied Physics Letters
Publication date: Jun 2012, volume: 100, issue:24, pages: 244102 - 244102-4
Publisher: IEEE
 
» 100 Years of Superconductivity and 50 Years of Superconducting Magnets
Abstract:
This review celebrates the centenary of Kamerlingh Onnes' discovery of superconductivity and also the 50th anniversary of the first conference to discuss superconducting magnets. Our growing understanding of superconductivity and its relationship with magnetic fields is outlined, together with the technical high field superconductors, which first made magnets possible. Engineering problems in utilizing these new materials and the applications which they made possible are described. Just 75 years after Kamerlingh Onnes' discovery, high temperature superconductivity HTS was discovered, opening up a new range of fields and temperatures for magnets. The difficulties of making these new materials into practical magnet conductors are outlined. Some applications of HTS are described and speculations are offered about those areas where it is most likely to succeed in future.
Autors: Wilson, M. N.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 3800212 - 3800212
Publisher: IEEE
 
» 11.72- Active-Area Wafer-Interconnected p-i-n Diode Pulsed at 64 kA Dissipates 382 J and Exhibits an Action of 1.7
Abstract:
SiC device area is currently limited by material and processing defects. To meet the large current handling requirements of modern power conditioning systems, paralleling of a large number of devices is required. This can increase cost and complexity through dicing, soldering, inclusion of ballast resistors, and forming multiple wire bonds. Furthermore, paralleling numerous discrete devices increases package volume/weight and reduces power density. To overcome these complexities, p-i-n diodes were designed, fabricated at a yield of 83%, and interconnected on a 3-in 4H-SiC wafer to form an 11.72- active-area full-wafer diode. The full-wafer diode exhibited a breakdown voltage of 1790 V at an extremely low leakage current density of less than 0.002 . At a pulsed current density of 5.5 and a rise time of , the peak current through the wafer-interconnected diode was 64.3 kA with a forward-voltage drop of 10.3 V. The dissipated energy was 382 J, and the calculated action exceeded 1.7 . Preliminary efforts on high-voltage diode interconnection have produced quarter-wafer-interconnected p-i-n diodes with breakdown voltages of 4 and 4.5 kV and active areas of 3.1 and 2.2 , respectively.
Autors: Snook, M.;Hearne, H.;McNutt, T.;Veliadis, V.;El-Hinnawy, N.;Nechay, B.;Woodruff, S.;Stahlbush, R. E.;Howell, R. S.;Giorgi, D.;White, J.;Davis, S.;
Appeared in: IEEE Electron Device Letters
Publication date: Jun 2012, volume: 33, issue:6, pages: 764 - 766
Publisher: IEEE
 
» 12-W -Band MMIC HPA and Driver Amplifiers in InGaP-GaAs HBT Technology for Space SAR T/R Modules
Abstract:
The chip-set for the transmitting power lineup of satellite SAR antenna T/R modules has been designed and implemented exploiting a 2- GaInP-GaAs heterojunction bipolar transistor (HBT) technology suitable for space applications. The HBT technology features an integrated emitter ballast resistor that enables high-power density operation without suffering thermal runaway phenomena. Two monolithic microwave integrated circuit (MMIC) driver amplifiers and a MMIC HPA are described: the drivers exhibit small-signal gains exceeding 21 dB and P1 dB output power of about 28 and 29 dBm, respectively, in a 2-GHz bandwidth and CW condition. The HPA delivers more than 40-dBm power at about 2.5-dB gain compression and power-added efficiency (PAE) exceeding 36% in a 700-MHz bandwidth in pulsed operation. Its peak performance at the center of the band are 40.9-dBm output power and 45% PAE. These performance are obtained within tight de-rating conditions for space applications.
Autors: Florian, C.;Paganelli, R. P.;Lonac, J. A.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jun 2012, volume: 60, issue:6, pages: 1805 - 1816
Publisher: IEEE
 
» 12-W -Band MMIC HPA and Driver Amplifiers in InGaP-GaAs HBT Technology for Space SAR T/R Modules
Abstract:
The chip-set for the transmitting power lineup of satellite SAR antenna T/R modules has been designed and implemented exploiting a 2- μm GaInP-GaAs heterojunction bipolar transistor (HBT) technology suitable for space applications. The HBT technology features an integrated emitter ballast resistor that enables high-power density operation without suffering thermal runaway phenomena. Two monolithic microwave integrated circuit (MMIC) driver amplifiers and a MMIC HPA are described: the drivers exhibit small-signal gains exceeding 21 dB and P1 dB output power of about 28 and 29 dBm, respectively, in a 2-GHz bandwidth and CW condition. The HPA delivers more than 40-dBm power at about 2.5-dB gain compression and power-added efficiency (PAE) exceeding 36% in a 700-MHz bandwidth in pulsed operation. Its peak performance at the center of the band are 40.9-dBm output power and 45% PAE. These performance are obtained within tight de-rating conditions for space applications.
Autors: Florian, C.;Paganelli, R.P.;Lonac, J.A.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jun 2012, volume: 60, issue:6, pages: 1805 - 1816
Publisher: IEEE
 
» 13 kA Superconducting Busbars Manufacturing Process
Abstract:
In the LHC, the superconducting Main Bending magnets and Quadrupole magnets are series-connected electrically in different excitation circuits by means of superconducting busbars, carrying a maximum current of 13 kA. These superconducting busbars consist of a superconducting Rutherford cable thermally and electrically coupled to a copper section all along the length. The function of the copper section is essentially to provide an alternative path for the magnet current in case of resistive transition. The production of these components was originally outsourced. The decision to import the technology at CERN led to a global re-engineering of the standard process. Although based on the procedures adopted during the LHC construction, a few modifications and improvements have been implemented, profiting of the experience gained in the last few years. This document details the manufacturing process of the 13 kA busbars as it is actually performed at CERN, emphasizing the new solutions adopted during the first months of production.
Autors: Principe, R.;Fessia, P.;Fornasiere, E.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4801604 - 4801604
Publisher: IEEE
 
» 14 Society Members Elevated to IEEE Fellow Grade in 2012 [People]
Abstract:
Autors: Olstein, K.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Jun 2012, volume: 4, issue:2, pages: 61 - 61
Publisher: IEEE
 
» 140-GHz Planar Broadband LTCC SIW Slot Antenna Array
Abstract:
A planar slot antenna array operating at 140-GHz band is presented and implemented using a low-temperature co-fired ceramic (LTCC) process. The array comprises a substrate integrated waveguide (SIW) feeding network and slot radiators with a dielectric loading. Considerations associated with the 140-GHz design and the effects of the dielectric loading on antenna performance are investigated. Measured results show that the boresight gain of a 4 4 antenna array including a transition from SIW to a waveguide is 16.3 dBi at 140 GHz and higher than 13.8 dBi over the operating bandwidth of 130–152 GHz. Therefore, the LTCC process offers one more option of planar broadband antenna array designs operating at upper millimeter wave bands.
Autors: Xu, J.;Chen, Z. N.;Qing, X.;Hong, W.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Jun 2012, volume: 60, issue:6, pages: 3025 - 3028
Publisher: IEEE
 
» 19-Gb/s adaptively modulated optical OFDM transmission by separated I/Q baseband delivery using 1GHz RSOAs
Abstract:


Autors:

Highlights

Appeared in: Optical Fiber Technology
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 2-D sizing of sodium oxalate crystals by automated optical image analysis
Abstract:


Autors:

Graphical abstract

image

Appeared in: Advanced Powder Technology
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 2011 EuroSimE international conference on thermal, mechanical and multi-physics simulation and experiments in micro-electronics and micro-systems
Abstract:


Autors:
Appeared in: Microelectronics Reliability
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 2012 IEEE Field Award Winners Ronald Rohrer, C.Y. Lu, and Behzad Razavi Feted at ISSCC [People]
Abstract:
Autors: Olstein, K.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Jun 2012, volume: 4, issue:2, pages: 59 - 60
Publisher: IEEE
 
» 25 Gbit/s QPSK Hybrid Fiber-Wireless Transmission in the W-Band (75–110 GHz) With Remote Antenna Unit for In-Building Wireless Networks
Abstract:
In this paper, we demonstrate a photonic up-converted 25 Gbit/s fiber-wireless quadrature phase shift-keying (QPSK) data transmission link at the W-band (75-110 GHz). By launching two free-running lasers spaced at 87.5 GHz into a standard single-mode fiber (SSMF) at the central office, a W-band radio-over-fiber (RoF) signal is generated and distributed to the remote antenna unit (RAU). One laser carries 12.5 Gbaud optical baseband QPSK data, and the other acts as a carrier frequency generating laser. The two signals are heterodyne mixed at a photodetector in the RAU, and the baseband QPSK signal is transparently up-converted to the W-band. After the wireless transmission, the received signal is first down-converted to an intermediate frequency (IF) at 13.5 GHz at an electrical balanced mixer before being sampled and converted to the digital domain. A digital-signal-processing (DSP)-based receiver is employed for offline digital down-conversion and signal demodulation. We successfully demonstrate a 25 Gbit/s QPSK wireless data transmission link over a 22.8 km SSMF plus up to 2.13 m air distance with a bit-error-rate performance below the 2 × 10-3 forward error correction (FEC) limit. The proposed system may have the potential for the integration of the in-building wireless networks with the fiber access networks, e.g., fiber-to-the-building (FTTB).
Autors: Xiaodan Pang;Caballero, A.;Dogadaev, A.;Arlunno, V.;Deng, L.;Borkowski, R.;Pedersen, J.S.;Zibar, D.;Xianbin Yu;Tafur Monroy, I.;
Appeared in: IEEE Photonics Journal
Publication date: Jun 2012, volume: 4, issue:3, pages: 691 - 698
Publisher: IEEE
 
» 250 Mbit/s over 100 m SI-POF with RCLED source using integrated post-equaliser
Abstract:
A high-speed transmission over step-index plastic optical fibre (SIPOF) using a resonant cavity light emitting diode (RCLED) is described. The integrated optical receiver is realised in 0.6 μm BiCMOS technology with an integrated large-area Si photodiode. The design consists of a TIA, equaliser and post-amplifier stage followed by a 50 Ω output driver. The integrated equaliser can be adapted via an external control voltage to different SI-POF lengths and RCLED limited bandwidths. A data rate of 250 Mbit/s can be transmitted over a 50 m-long SI-POF with a sensitivity of -22dBm at BER of 10-9 and over a 100 m-long SI-POF with a sensitivity of -24 dBm at a BER of 10-6.
Autors: Atef, M.;Swoboda, R.;Zimmermann, H.;
Appeared in: Electronics Letters
Publication date: Jun 2012, volume: 48, issue:12, pages: 718 - 720
Publisher: IEEE
 
» 2D Analytical Magnetic Optimizations for Accelerator Dipole Block Designs
Abstract:
A new magnetic design method, which optimizes the position of the conductors in the cross-section of a racetrack-shaped magnet, has been set up. This method is based on the computation of analytical formulas of field, harmonics and forces. The conductors are modeled with rectangles, which is particularly well adapted to a block design. A first equation is used to calculate the contribution of the rectangles, as a function of their four spatial coordinates. All the block contributions are then added up to give the entire equation as a function of all the rectangles coordinates. Finally a non-linear optimization, using the analytical formulas, computes these coordinates to fulfill the magnet specifications. The objective can be either to maximize the central field, or to minimize a criterion, for instance the conductor volume, the harmonics, the electromagnetic forces. Various kinds of constraints can also be imposed: zeroed harmonics, blocks position and number, central field Two magnets designs are proposed as practical examples: a 13 T magnet and a 20 T graded magnet.
Autors: Rochepault, E.;Vedrine, P.;Bouillault, F.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4900804 - 4900804
Publisher: IEEE
 
» 2D Finite Rate of Innovation Reconstruction Method for Step Edge and Polygon Signals in the Presence of Noise
Abstract:
The finite rate of innovation (FRI) principle is developed for sampling a class of non-bandlimited signals that have a finite number of degrees of freedom per unit of time, i.e., signals with FRI. This sampling scheme is later extended to three classes of sampling kernels with compact support and applied to the step edge reconstruction problem by treating the image row by row. In this paper, we regard step edges as 2D FRI signals and reconstruct them block by block. The step edge parameters are obtained from the 2D moments of a given image block. Experimentally, our technique can reconstruct the edge more precisely and track the Cramér–Rao bounds (CRBs) closely with a signal-to-noise ratio (SNR) larger than 4 dB on synthetic step edge images. Experiments on real images show that our proposed method can reconstruct the step edges under practical conditions, i.e., in the presence of various types of noise and using a real sampling kernel. The results on locating the corners of data matrix barcodes using our method also outperform some state-of-the-art barcode decoders.
Autors: Chen, C.;Marziliano, P.;Kot, A. C.;
Appeared in: IEEE Transactions on Signal Processing
Publication date: Jun 2012, volume: 60, issue:6, pages: 2851 - 2859
Publisher: IEEE
 
» 2D Thermal Analysis of the Superconducting Proposal for the TF Magnets of FAST
Abstract:
The design of FAST (Fusion Advanced Studies Torus), the Italian proposal of a Satellite Facility to ITER, is currently under review in order to verify the feasibility of a superconducting version of its magnet system. In a previous study, the 1D analysis of the thermal-hydraulics of the TF cable in conduit conductors (CICCs) have been investigated with respect to one of the most critical operating scenarios (the H-mode reference scenario). In that case the heat coming from the casing to the winding pack due to the nuclear heat from the plasma has not been modeled, nonetheless, based on the experience on other superconducting tokamak machines, the necessity for a proper shield and case cooling system has been recognized. In the present paper the effect of the heat coming from the casing is quantified through a 2D analysis of the TF cross section. The contribution of the casing is further employed as an input for a successive 1D thermal-hydraulic analysis of the CICCs.
Autors: Polli, G. M.;Roccella, S.;della Corte, A.;Di Zenobio, A.;Crisanti, F.;Cucchiaro, A.;Villari, R.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4902804 - 4902804
Publisher: IEEE
 
» 3,4 methylenedioxymethylamphetamine detection using a microcantilever-based biosensor
Abstract:


Autors:

Highlights

Appeared in: Sensors and Actuators A: Physical
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 3,4-Methylenedioxymethylamphetamine detection using a microcantilever-based biosensor
Abstract:


Autors:

Highlights

Appeared in: Sensors and Actuators A: Physical
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 3-D Discrete Shearlet Transform and Video Processing
Abstract:
In this paper, we introduce a digital implementation of the 3-D shearlet transform and illustrate its application to problems of video denoising and enhancement. The shearlet representation is a multiscale pyramid of well-localized waveforms defined at various locations and orientations, which was introduced to overcome the limitations of traditional multiscale systems in dealing with multidimensional data. While the shearlet approach shares the general philosophy of curvelets and surfacelets, it is based on a very different mathematical framework, which is derived from the theory of affine systems and uses shearing matrices rather than rotations. This allows a natural transition from the continuous setting to the digital setting and a more flexible mathematical structure. The 3-D digital shearlet transform algorithm presented in this paper consists in a cascade of a multiscale decomposition and a directional filtering stage. The filters employed in this decomposition are implemented as finite-length filters, and this ensures that the transform is local and numerically efficient. To illustrate its performance, the 3-D discrete shearlet transform is applied to problems of video denoising and enhancement, and compared against other state-of-the-art multiscale techniques, including curvelets and surfacelets.
Autors: Negi, P. S.;Labate, D.;
Appeared in: IEEE Transactions on Image Processing
Publication date: Jun 2012, volume: 21, issue:6, pages: 2944 - 2954
Publisher: IEEE
 
» 3D force sensor for biomechanical applications
Abstract:


Autors:

Highlights

Appeared in: Sensors and Actuators A: Physical
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 3D IC floorplanning: Automating optimization settings and exploring new thermal-aware management techniques
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 3D model based tracking for omnidirectional vision: A new spherical approach
Abstract:


Autors:

Highlights

Appeared in: Robotics and Autonomous Systems
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 3D thermal-aware floorplanner using a MILP approximation
Abstract:


Autors:
Appeared in: Microprocessors and Microsystems
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» 4C Code Simulation and Benchmark of ITER TF Magnet Cool-Down From 300 K to 80 K
Abstract:
We apply the 4C code, recently validated against different types of transients, to the simulation of the first stage of the cool-down of an ITER Toroidal Field (TF) magnet, from 300 K to 80 K. For a given scenario (inlet temperature, pressure and total mass flow rate evolution), we compute the evolution of the maximum temperature difference across the magnet. These results are compared both with the allowable and with the previously published results of another code, thus providing a benchmark for 4C. The differences between the models implemented in the two codes, whenever present, are highlighted, and their effects are analyzed by suitable sensitivity studies.
Autors: Bonifetto, R.;Buonora, F.;Savoldi Richard, L.;Zanino, R.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4902604 - 4902604
Publisher: IEEE
 
» 5 mHz highpass filter with -80 dB total harmonic distortions
Abstract:
A fully integrated 5 mHz highpass filter for electrophysiological signal acquisitions is described. Unlike the traditional Gm-C or pseudo-resistor architectures, the proposed continuous-time filter employs the current steering technique, which helps decrease the capacitance area and reduce the total harmonic distortion (THD) simultaneously. This design was fabricated in 0.18 μm CMOS technology. Experimental results indicate that it achieves 23 dB frequency band at 5 mHz, power consumption of 15 μW and input referred noise of 3.8 μmVrms. The 280 dB THD was measured at 1 Hz 0.2 Vp-p sine wave input.
Autors: Li, H.;Zhang, J.;Wang, L.;
Appeared in: Electronics Letters
Publication date: Jun 2012, volume: 48, issue:12, pages: 698 - 699
Publisher: IEEE
 
» 5.65 GHz High-Efficiency GaN HEMT Power Amplifier With Harmonics Treatment up to Fourth Order
Abstract:
A high-efficiency GaN HEMT power amplifier with harmonics treatment up to the fourth order has been developed at the 5.8 GHz band. The harmonics treatment was applied by considering the influence of feedback and shunt capacitance in the GaN HEMT, to reduce the average power consumption in a GaN HEMT including parasitic elements. The fabricated GaN HEMT amplifier delivered a maximum power-added efficiency of 79% and a maximum drain efficiency of 90% at 5.65 GHz, and the saturated output power was 33.3 dBm. This value represents state-of-the-art C-band performance efficiency.
Autors: Kamiyama, M.;Ishikawa, R.;Honjo, K.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jun 2012, volume: 22, issue:6, pages: 315 - 317
Publisher: IEEE
 
» 9 T NbTi Cryogen Free HTS Test Stand
Abstract:
A 9 T conduction cooled superconducting magnet with 50 mm room temperature chamber is developed and tested. The system design allows to fill the chamber with liquid nitrogen. The system is based on a commercial two-stage 4 K Gifford-McMahon cryocooler with cooling power of 1.5 W at 4.2 K. The cool down time of the magnet from room temperature to 3.5 K is 18 hours. A pair of coated conductor based current leads is employed to reduce heat leak to the magnet. The main purpose of the magnet is critical current measurements for HTS wires. Using the magnetic system the angular dependence for short sample of coated conductor (SCS4050 from Superpower) and critical current of a small layer wound coil made of the same conductor were measured at 77 K in external magnetic field up to 4 T. The n-values for short sample are also presented. The measured critical current of the HTS coil in external magnetic field is up to 1.5 times lower than calculated one.
Autors: Demikhov, T.;Kostrov, E.;Lysenko, V.;Demikhov, E.;Piskunov, N.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 9501004 - 9501004
Publisher: IEEE
 
» -Band and -Band Power Amplifiers in 45-nm CMOS SOI
Abstract:
The performance of high-efficiency millimeter-wave (mm-wave) power amplifiers (PAs) implemented in a 45-nm silicon-on-insulator (SOI) process is presented. Multistage class-AB designs are investigated for - and -bands and a push–pull amplifier is investigated at -band. The -band, class-AB PA achieves a saturated output power of 15 dBm and power-added efficiency (PAE) of 27% from a 2-V supply. The -band, class-AB PA achieves a saturated output power of 12.4 dBm and PAE of 14.2% from a 2-V supply. The performance demonstrates the high efficiency possible for mm-wave PAs in a SOI process.
Autors: Kim, J.;Dabag, H.;Asbeck, P.;Buckwalter, J. F.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jun 2012, volume: 60, issue:6, pages: 1870 - 1877
Publisher: IEEE
 
» Shift in Single-Layer Graphene Field-Effect Transistors and Its Correlation With Raman Inspection
Abstract:
Raman measurement is carried out to understand shift in single-layer graphene field-effect transistors (GFETs). The G (2D) peak shift in Raman spectra is correlated to the corresponding during stress and recovery phases. A blue (red) shift of G and 2D peaks is seen during stress (recovery) phase, indicating the corresponding trapping (detrapping) effects in the graphene device. It is interesting to note that, after forming gas annealing , the defects can be generated in graphene (evidenced by D peak of Raman spectra), leading to the increased for both negative bias temperature instability and positive bias temperature instability in single-layer GFETs.
Autors: Liu, W. J.;Sun, X. W.;Tran, X. A.;Fang, Z.;Wang, Z. R.;Wang, F.;Wu, L.;Zhang, J. F.;Wei, J.;Zhu, H. L.;Yu, H. Y.;
Appeared in: IEEE Transactions on Device and Materials Reliability
Publication date: Jun 2012, volume: 12, issue:2, pages: 478 - 481
Publisher: IEEE
 
» Doping by Rare-Earth Metals and Borides
Abstract:
This study refers to Rare-Earth elements ( , Sm, Gd) doping of bulk materials. The synthesis of doped has been performed by Reactive Liquid Mg Infiltration process (Mg-RLI): the RE additives, in the form either of pure metallic powder or of borides powder, have been mixed with the starting boron powder. The RE dopants could operate through two different doping mechanisms: the substitution of Mg ions in the crystal lattice or the growth of intergrain boride phases of nanometric size that modify the grain boundaries of the polycrystals. The structure of the resulting RE-doped has been characterized by X-ray diffraction and SEM/EDS analysis. The effects of this kind of doping on the high magnetic field properties of have been measured by magnetization loops.
Autors: Saglietti, L.;Perini, E.;Figini Albisetti, A.;Ripamonti, G.;Schiavone, C.;Giunchi, G.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 6200504 - 6200504
Publisher: IEEE
 
» Cable-in-Conduit Conductor Fabrication for the Series-Connected Hybrid Magnets
Abstract:
The outsert coils of the Series-Connected Hybrid magnets for the National High Magnetic Field Laboratory and Helmholtz Zentrum Berlin each contain approximately 4000 kg of cable-in-conduit conductor (CICC). There are three different sizes of CICC that grades the amount of superconductor. Significant progress has been made in all aspects of the CICC fabrication. The strand, consisting of high RRP , and conduit, composed of 316 LN with critical chemistry modifications, have been manufactured and quality control measurements made. The additional service to create the ten lengths of superconducting and three lengths of prototype, multi-stage twisted Cu cable is also complete. Jacketing of the cables has successfully been carried out at a new facility (subset of ICAS) for the insertion and compaction of fusion technology CICC using a weld and pull method. Fabrication processes and quality controls have been developed through a collaborative effort between the NHMFL, HZB, Criotec Impianti, and ENEA Superconductivity Division.
Autors: Dixon, I. R.;Affinito, L.;Bird, M. D.;della Corte, A.;Hoffmann, M.;Painter, T. A.;Polli, G. M.;Roveta, G.;Roveta, M.;Smeibidl, P.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4301004 - 4301004
Publisher: IEEE
 
» -Band and -Band Power Amplifiers in 45-nm CMOS SOI
Abstract:
The performance of high-efficiency millimeter-wave (mm-wave) power amplifiers (PAs) implemented in a 45-nm silicon-on-insulator (SOI) process is presented. Multistage class-AB designs are investigated for Q- and W-bands and a push-pull amplifier is investigated at Q-band. The Q-band, class-AB PA achieves a saturated output power of 15 dBm and power-added efficiency (PAE) of 27% from a 2-V supply. The W-band, class-AB PA achieves a saturated output power of 12.4 dBm and PAE of 14.2% from a 2-V supply. The performance demonstrates the high efficiency possible for mm-wave PAs in a SOI process.
Autors: Joohwa Kim;Dabag, H.;Asbeck, P.;Buckwalter, J.F.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jun 2012, volume: 60, issue:6, pages: 1870 - 1877
Publisher: IEEE
 
» Shift in Single-Layer Graphene Field-Effect Transistors and Its Correlation With Raman Inspection
Abstract:
Raman measurement is carried out to understand shift in single-layer graphene field-effect transistors (GFETs). The G (2D) peak shift in Raman spectra is correlated to the corresponding during stress and recovery phases. A blue (red) shift of G and 2D peaks is seen during stress (recovery) phase, indicating the corresponding trapping (detrapping) effects in the graphene device. It is interesting to note that, after forming gas annealing , the defects can be generated in graphene (evidenced by D peak of Raman spectra), leading to the increased for both negative bias temperature instability and positive bias temperature instability in single-layer GFETs.
Autors: Liu, W. J.;Sun, X. W.;Tran, X. A.;Fang, Z.;Wang, Z. R.;Wang, F.;Wu, L.;Zhang, J. F.;Wei, J.;Zhu, H. L.;Yu, H. Y.;
Appeared in: IEEE Transactions on Device and Materials Reliability
Publication date: Jun 2012, volume: 12, issue:2, pages: 478 - 481
Publisher: IEEE
 
» ??An 18 b 12.5 MS/s ADC with 93 dB SNR?? Deemed Best 2010 JSSC Paper [People]
Abstract:
Autors: Hurrell, C.P.;
Appeared in: IEEE Solid-State Circuits Magazine
Publication date: Jun 2012, volume: 4, issue:2, pages: 56 - 59
Publisher: IEEE
 
» A “Sequentially Drilled” Joint Congruence (SeDJoCo) Transformation With Applications in Blind Source Separation and Multiuser MIMO Systems
Abstract:
We consider a particular form of the classical approximate joint diagonalization (AJD) problem, which we call a “sequentially drilled” joint congruence (SeDJoCo) transformation. The problem consists of a set of symmetric real-valued (or Hermitian-symmetric complex-valued) target-matrices. The number of matrices in the set equals their dimension, and the joint diagonality criterion requires that in each transformed (“diagonalized”) target-matrix, all off-diagonal elements on one specific row and column (corresponding to the matrix-index in the set) be exactly zeros, yet does not care about the other (diagonal or off-diagonal) elements. The motivation for this form arises in (at least) two different contexts: maximum likelihood blind (or semiblind) source separation and coordinated beamforming for multiple-input multiple-output (MIMO) broadcast channels. We prove that SeDJoCo always has a solution when the target-matrices are positive-definite . We also propose two possible iterative solution algorithms, based on defining and optimizing two different criteria functions, using Newton's method for the first function and successive Jacobi-like transformations for the second. The algorithms' convergence behavior and the attainable performance in the two contexts above are demonstrated in simulation experiments.
Autors: Yeredor, A.;Song, B.;Roemer, F.;Haardt, M.;
Appeared in: IEEE Transactions on Signal Processing
Publication date: Jun 2012, volume: 60, issue:6, pages: 2744 - 2757
Publisher: IEEE
 
» A 0.18- Monolithic Li-Ion Battery Charger for Wireless Devices Based on Partial Current Sensing and Adaptive Reference Voltage
Abstract:
An Li-ion battery charger based on a charge-control buck regulator operating at 2.2 MHz is implemented in 180 nm CMOS technology. The novelty of the proposed charge-control converter consists of regulating the average output current by only sensing a portion of the inductor current and using an adaptive reference voltage. By adopting this approach, the charger average output current is set to a constant value of 900 mA regardless of the battery voltage variation. In constant-voltage (CV) mode, a feedback loop is established in addition to the preexisting current control loop, preserving the smoothness of the output voltage at the transition from constant-current (CC) to CV mode. A small-signal model has been developed to analyze the system stability and subharmonic oscillations at low current levels. Transistor-level simulations of the proposed switching charger are presented. The output voltage ranges from 2.1 to 4.2 V, and the power efficiency at 900 mA has been measured to be 86% for an input voltage of 10 V . The accuracy of the output current using the proposed sensing technique is 9.4% at 10 V.
Autors: Pagano, R.;Baker, M.;Radke, R. E.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jun 2012, volume: 47, issue:6, pages: 1355 - 1368
Publisher: IEEE
 
» A 0.236 mm , 3.99 mW Fully Integrated 90 nm CMOS L1/L5 GPS Frequency Synthesizer Using a Regulated Ring VCO
Abstract:
A broad-band frequency synthesizer for L1/L5 dual-band GPS RF receiver is designed using a four-stage differential ring voltage controlled oscillator (VCO) with an on-chip regulator to compensate for variation by supply and temperature. Also, a pole-zero scalable loop filter is proposed to tune the loop bandwidth while keeping damping factor against wide variations of VCO gain. The proposed frequency synthesizer fabricated on a 90 nm CMOS process occupies 0.236 mm and consumes 3.99 mW at 1.2 V. The measured phase noise is less than dBc/Hz for all bands.
Autors: Hwang, I.-C.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jun 2012, volume: 22, issue:6, pages: 324 - 326
Publisher: IEEE
 
» A 0.236 mm , 3.99 mW Fully Integrated 90 nm CMOS L1/L5 GPS Frequency Synthesizer Using a Regulated Ring VCO
Abstract:
A broad-band frequency synthesizer for L1/L5 dual-band GPS RF receiver is designed using a four-stage differential ring voltage controlled oscillator (VCO) with an on-chip regulator to compensate for variation by supply and temperature. Also, a pole-zero scalable loop filter is proposed to tune the loop bandwidth while keeping damping factor against wide variations of VCO gain. The proposed frequency synthesizer fabricated on a 90 nm CMOS process occupies 0.236 mm and consumes 3.99 mW at 1.2 V. The measured phase noise is less than dBc/Hz for all bands.
Autors: Hwang, I.-C.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jun 2012, volume: 22, issue:6, pages: 324 - 326
Publisher: IEEE
 
» A 1-mW 1.13–1.9 GHz CMOS LC VCO Using Shunt-Connected Switched-Coupled Inductors
Abstract:
A low-power wideband LC VCO has been designed and implemented in a 90-nm CMOS technology. Wide tuning range, low phase noise and low power consumption are achieved thanks to the adopted LC tank, which makes use of shunt-connected switched-coupled inductors and a proper arrangement of varactors. The shunt-connected switched-coupled inductors provide coarse tuning and phase noise optimization without using amplitude calibration loop or trimming of the bias current. The proposed varactors configuration employs accumulation mode thin and thick MOS devices, which has been differently biased to obtain tuning range maximization along with minimization of the amplitude-to-phase noise conversion. The LC-tank topology and inductor layout have been properly designed to attain a die area comparable to a single-inductor VCO, taking advantage of the inductors mutual coupling. The VCO exhibits a phase noise at 1-MHz offset frequency lower than over the entire tuning range and achieves at 1.2 GHz. It provides a tuning range of 51% from 1.13 GHz to 1.9 GHz with a tuning voltage ranging from 0 to 1.2 V. Despite a very low current consumption, which is 0.88 mA from a 1.2-V supply, the proposed VCO has the outstanding PFTN figure-of-merit of 10. The VCO core die area is 0.5 .
Autors: Italia, A.;Ippolito, C. M.;Palmisano, G.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jun 2012, volume: 59, issue:6, pages: 1145 - 1155
Publisher: IEEE
 
» A 1-V 5-GHz Self-Bias Folded-Switch Mixer in 90-nm CMOS for WLAN Receiver
Abstract:
A 5 GHz double balanced mixer (DBM) is implemented in standard 90 nm CMOS low-power technology. A novel low-voltage self-bias current reuse technique is proposed in the RF transconductance stage to obtain better third-order intermodulation intercept point (IIP ) and conversion gain (CG) when considering the process variations. The DBM achieves a CG of 12 dB, a noise figure (NF) of 10.6 dB and port-to-port isolations of better than 50 dB. The input second-order (IIP ) and IIP are 48 dBm and 4 dBm, respectively. Two I/Q DBMs are then integrated with a differential low-noise amplifier (DLNA) and a poly-phase filter, to from a direct-conversion receiver (DCR). The DCR achieves a CG of 26 dB with an NF of 2.7 dB at 21 mW power consumption from a 1 V supply voltage. The port-to-port isolations are better than 50 dB. The IIP and the IIP of the DCR are 33 dBm and dBm, respectively.
Autors: Chiou, H.-K.;Lin, K.-C.;Chen, W.-H.;Juang, Y.-Z.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jun 2012, volume: 59, issue:6, pages: 1215 - 1227
Publisher: IEEE
 
» A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation
Abstract:
A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%–86% at 50 –10 mA output current range.
Autors: Zhang, X.;Pu, Y.;Ishida, K.;Ryu, Y.;Okuma, Y.;Chen, P.-H.;Watanabe, K.;Sakurai, T.;Takamiya, M.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Jun 2012, volume: 59, issue:6, pages: 361 - 365
Publisher: IEEE
 
» A 1.0-ns/1.0-V Delay-Locked Loop With Racing Mode and Countered CAS Latency Controller for DRAM Interfaces
Abstract:
The digital delay-locked loop (DLL) with racing mode and the countered column address strobe (CAS) latency controller are proposed in this paper. The dual-DLL architecture with racing operation is adopted to achieve low power consumption, low jitter, fast locking, wide range of locking, and stuck-free control. The merged dual coarse delay line (MDCDL) reduces the dynamic power consumption of a variable delay line by 30% by sharing a part of the delay line path in DLL. In addition, jitter is reduced by 45 ps in the 1066-DDR3 operating mode by MDCDL. The proposed DLL utilizes an or-and functioned duty cycle corrector (or-and DCC), which consumes 15% of DLL's power, 0.915 pJ/Hz at and . The countered CAS latency controller (CCLC) saves IDD3N current because it does not need a DLL clock and does not need to be activated for IDD3N (active non-power down) state. The DLL clock is enabled and CCLC is activated only when the read command is issued. This operation condition saves the IDD3N current by 60% with the proposed DLL. The proposed DLL is employed in 128 M 8 DDR3 SDRAM and 64 M 16 DDR3 SDRAM. The former and the latter are fabricated by 5 nm and by 4 nm DRAM process technology, respectively. Experimental results show that 10% duty error of the external clock can be corrected to within- 2% duty error in less than 512 cycles of locking time under 1.5 ns of tCK. The proposed DLL and CCLC can operate above 1.0-GHz operating frequency at 1.2 V in 5 nm DDR3 SDRAM and at 1.0 V in 4 nm DDR3 SDRAM, respectively. The proposed DLL fabricated with 4 nm technology consumes 6.1 pJ/Hz at 1.575 V.
Autors: Lee, H.-W.;Choi, H.;Shin, B.-J.;Kim, K.-H.;Kim, K.-W.;Kim, J.;Kim, K.-H.;Jung, J.-H.;Kim, J.-H.;Park, E.-Y.;Kim, J.-S.;Kim, J.-H.;Cho, J.-H.;Rye, N.;Chun, J.-H.;Kim, Y.;Kim, C.;Choi, Y.-J.;Chung, B.-T.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jun 2012, volume: 47, issue:6, pages: 1436 - 1447
Publisher: IEEE
 
» A 1.92-Megapixel CMOS Image Sensor With Column-Parallel Low-Power and Area-Efficient SA-ADCs
Abstract:
This paper presents a CMOS image sensor with 10-bit column-parallel successive approximation analog-to-digital converters (SA-ADCs). The SA-ADC in each column integrates the binary-weighted references instead of using an internal digital-to-analog converter (DAC) to reduce the area. The area of the column 10-bit SA-ADC is . The area of the capacitor array in the SA-ADC is reduced to only 2.8% compared with that of a conventional binary-weighted capacitor DAC. In order to reduce the power consumption, the SA-ADC uses the switched power technique. The constant analog-to-digital conversion time and the switched power technique increase the power saving rate as the frame rate decreases. The proposed image sensor has been fabricated using a 0.13- CMOS process. The measured power consumption of the proposed SA-ADC is reduced to 85% and 58% of that in the SA-ADC without the switched power technique at the frame frequencies of 15 and 150 frames/s, respectively.
Autors: Shin, M.-S.;Kim, J.-B.;Kim, M.-K.;Jo, Y-R.;Kwon, O.-K.;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jun 2012, volume: 59, issue:6, pages: 1693 - 1700
Publisher: IEEE
 
» A 10-b 320-MS/s Stage-Gain-Error Self-Calibration Pipeline ADC
Abstract:
A 10-b 320-MS/s pipeline analog-to-digital converter (ADC) with low dc gain opamps, as low as 30.6 dB based on simulations, in its multiplying digital-to-analog converters (MDACs) is presented. A foreground self-calibration technique is proposed to reduce stage gain error by adjusting feedback factor with a calibration capacitor array. The prototype in 90-nm low-power CMOS technology achieves conversion rate of 320 MS/s with peak SFDR and SNDR of 66.7 and 54.2 dB, respectively. The total power dissipation is 42 mW, and it occupies an active chip area of 0.21 including the calibration circuit. It results in a figure-of-merit (FOM) of 442 fJ/conversion-step. Only 168 clock cycles are used, and no external precise reference sources are needed for the calibration.
Autors: Tseng, C.-J.;Chen, H.-W.;Shen, W.-T.;Cheng, W.-C.;Chen, H.-S.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jun 2012, volume: 47, issue:6, pages: 1334 - 1343
Publisher: IEEE
 
» A 10-bit CMOS DAC With Current Interpolated Gamma Correction for LCD Source Drivers
Abstract:
This paper presents a compact 10-bit digital-to-analog converter (DAC) for LCD source drivers. The cyclic DAC architecture is used to reduce the area of LCD column drivers when compared to the use of conventional resistor-string DACs. The current interpolation technique is proposed to perform gamma correction after D/A conversion. The gamma correction circuit is shared by four DAC channels using the interleave technique. A prototype 10-bit DAC with gamma correction function is implemented in 0.35 CMOS technology and its average die size per channel is 0.053 , which is smaller than those of the R-DACs with gamma correction function. The settling time of the 10-bit DAC is 1 , and the maximum INL and DNL are 2.13 least significant bit (LSB) and 1.30 LSB, respectively.
Autors: Liu, P.-J.;Chen, Y.-J. E.;
Appeared in: IEEE Transactions on Circuits and Systems for Video Technology
Publication date: Jun 2012, volume: 22, issue:6, pages: 958 - 965
Publisher: IEEE
 
» A 100 W 5.1-Channel Digital Class-D Audio Amplifier With Single-Chip Design
Abstract:
A 100 W, 5.1-channel, single-chip, digital-input class-D audio amplifier with a low-voltage (LV) digital circuit and high-voltage (HV) switching power stage is designed for moderate-performance and cost-effective speaker systems. The LV portion, including multi-channel audio processors, delta-sigma modulators (DSMs), and pulse-width modulation (PWM) generators, is implemented with a standard CMOS digital cell-library. A dual-loop resonator is proposed to increase the stable input range of the DSM so that the low-distortion output power of the class-D amplifier can be increased. For the HV portion, distortion caused by parasitic resistances of the power stage is analyzed to obtain a better design. A multi-phase PWM switching technique is proposed to prevent the multi-channel output stages from simultaneously switching, and thus the supply bouncing can be reduced. An over-current protection circuit with high supply noise immunity is also presented. Fabricated with 0.35/3-μm 3.3/18-V 1P3M CMOS technology, the 5.1-channel amplifier achieves a total root-mean-square (RMS) output power of 100 W, a distortion of less than 0.7%, and a power efficiency of 88% with a total chip area of 48.9 mm .
Autors: Liu, J.-M.;Chien, S.-H.;Kuo, T.-H.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jun 2012, volume: 47, issue:6, pages: 1344 - 1354
Publisher: IEEE
 
» A 1500 fps Highly Sensitive 256 256 CMOS Imaging Sensor With In-Pixel Calibration
Abstract:
High-speed CMOS imaging sensors (CIS) normally have low sensitivity because of the large integration capacitance. They also have high noise because pixel circuits cannot implement correlated double sampling (CDS) to remove the pixel reset noise. For applications, such as micro-computed tomography (micro-CT), this is a major limitation. In this work, we developed a technique to achieve high sensitivity and low noise for high-speed CIS. To maximize the sensitivity, we designed a new capacitive transimpedance amplifier (CTIA) pixel with a tiny metal–oxide–metal capacitor. The pixel circuit also implements CDS. As a result, the temporal noise is greatly reduced, and the sensitivity improves dramatically. To compensate the mismatch of small integration capacitors across the pixel array, an on-chip calibration scheme with in-pixel circuits is developed. Fully differential column circuits are designed to suppress the power supply injection in the large array of high-speed column circuits. A successive-approximation analog-to-digital (SAR ADC) is designed to achieve 10-bit resolution and to fit in the 15- column pitch. For testing modes, column circuits are configured into a two-step ADC to provide 13-bit dynamic range. The 256 256 CIS design is fabricated in a 0.18- CMOS process. The imager samples up to 1500 fps. The pixel integration capacitor is 0.7 fF, which enables sensitivity under the white illumination. The CIS temporal noise is . This sensitivity and noise performances are much better than previous high-speed CIS benchmark des- gns. Running at 1500 fps, the CIS can capture recognizable images with illumination down to 1 lux. The on-chip calibration suppresses the fixed-pattern noise lower than 0.52%. The prototype chip consumes 390 mW of power.
Autors: Xu, R.;Liu, B.;Yuan, J.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jun 2012, volume: 47, issue:6, pages: 1408 - 1418
Publisher: IEEE
 
» A 1V, 69-73GHz CMOS power amplifier based on improved Wilkinson power combiner
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A 20Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A 24W Ku band GaN based power amplifier with 9.1dB linear gain
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A 3-DOF parallel manufacturing module and its kinematic optimization
Abstract:


Autors:

Highlights

Appeared in: Robotics and Computer-Integrated Manufacturing
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A 35 kA Disc-Shaped Thyristor DC Switch for Batteries Power Supply of Flat-Top Pulsed Magnetic Field
Abstract:
A 35 kA thyristor DC switch which consists of 8 paralleled high power thyristors installed in a disc-shaped aluminum bus to get a symmetrical structure is developed in order to meet the requirement of the DC power supply using lead-acid batteries in pulsed magnetic field with maximum flat-top current 35 kA, pulse width 1 s. This thyristor DC switch will be turned on at the beginning of experiment, and turned off by forced commutation technology which uses charged capacitors to output inverse current to extinguish the current of thyristor switch at the end. Every branch of 8 thyristors is in series with a stainless steel resistor 1.4 and a fast-fuse to achieve parallel current sharing and overload protection of the thyristors.
Autors: Ding, T.;Wang, J.;Ding, H.;Li, L.;Liu, B.;Pan, Y.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 5400404 - 5400404
Publisher: IEEE
 
» A 5-Gb/s Automatic Gain Control Amplifier With Temperature Compensation
Abstract:
This paper presents an automatic gain control (AGC) amplifier with temperature compensation for high-speed applications. The proposed AGC consists of a folded Gilbert variable gain amplifier (VGA), a dc offset canceller, inductorless post amplifiers, a linear open-loop peak detector (PD), an integrator, a symmetrical exponential voltage generator, and a compensation block for temperature stability. The novel temperature compensation scheme ensures the AGC stability and accuracy over 20 C–200 C by predicting the integrator biasing voltage based on the crucial blocks duplication technique. The proposed linear open loop PD combined with the linear-in-dB VGA manages the dB-linear error of less than 0.3 dB for the received signal strength indication (RSSI). The AGC chip is fabricated using a 0.13- m SiGe BiCMOS technology. Consuming a power of 72 mW from a 1.2-V supply voltage, the fabricated circuit exhibits a voltage gain of 40 dB and a 3-dB bandwidth of 7.5 GHz. With a 2 1 pseudo-random bit sequence at 5-Gb/s, the measured peak-to-peak jitter is less than 40 across the 20 C–200 C temperature range. The low linear-in-dB error and the wide operating temperature range achieving the high-speed data input signal indicat- the suitability of the proposed techniques for high-speed AGC amplifiers.
Autors: Liu, C.;Yan, Y.-P.;Goh, W.-L.;Xiong, Y.-Z.;Zhang, L.-J.;Madihian, M.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jun 2012, volume: 47, issue:6, pages: 1323 - 1333
Publisher: IEEE
 
» A 55-kW Three-Phase Inverter Based on Hybrid-Switch Soft-Switching Modules for High-Temperature Hybrid Electric Vehicle Drive Application
Abstract:
This paper presents a 55-kW three-phase inverter based on soft-switching modules for hybrid electric vehicle drives at high-temperature conditions. The main switch of the module is composed of the hybrid switch, which is composed of parallel IGBT and MOSFET. Highly integrated soft-switching modules have been employed to achieve switching loss as well as conduction loss reduction. The operation principle of the proposed inverter is analyzed in detail. Experimental evaluations of the inverter have been conducted through both inductive load and motor-dynamometer load at coolant temperatures ranging from 25 to 90 . Efficiency measurement using power meter showed that the peak efficiency is around 99%, and it drops slightly at lower speed and higher temperature conditions. To ensure measurement fidelity, a double-chamber differential calorimeter system was designed and calibrated for the inverter testing. Through long-hour testing, the measured efficiencies consistently showed 99% and higher. The soft-switching inverter has been operated reliably and demonstrated high efficiency at different temperature and test conditions.
Autors: Sun, P.;Lai, J.-S.;Liu, C.;Yu, W.;
Appeared in: IEEE Transactions on Industry Applications
Publication date: Jun 2012, volume: 48, issue:3, pages: 962 - 969
Publisher: IEEE
 
» A 5MSps 13.25?W 8-bit SAR ADC with single-ended or differential input
Abstract:


Autors:
Appeared in: Microelectronics Journal
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A 70-mW ISDB-T Tuner for VHF and UHF Bands
Abstract:
This brief presents a highly integrated low-Intermediate Frequency receiver for use in UHF/VHF channel 7 and Channel 8 Integrated Services Digital Broadcasting-Terrestrial (ISDB-T) systems (90–220 MHz). It features an ultralow power consumption of 68 mW (55 mW in attenuator mode) with a noise figure of 3 dB. The device fully complies with the ISDB-T standard and is implemented in 0.13- CMOS technology with fully integrated low-noise amplifier/matching networks, a voltage-controlled oscillator, a phase-locked loop/loop filter, a crystal oscillator, baseband filters, and Variable Gain Amplifier. The tuner only requires a prefiltering RF surface acoustic wave filter to notch out cellular frequencies and a biasing inductor to implement a fully compliant ISDB-T tuner. The full characterization of the tuner and the comparison with previous implementation are presented. The chip area is 2.1 mm 2.1 mm.
Autors: Sivasubramaniam, J.;Elwan, H.;Ismail, A.;Youssoufian, E.;Le, D.;Omar, M.;Emira, A.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Jun 2012, volume: 59, issue:6, pages: 321 - 325
Publisher: IEEE
 
» A 9 mW, Q-Band Direct-Conversion I/Q Modulator in SiGe BiCMOS Process
Abstract:
This letter demonstrates a low-power, -band, direct-conversion I/Q modulator. The modulator consumes 9 mW power from a 1 V supply and delivers RF power at 39 GHz. The modulator exhibits an EVM of 5.3% for 16QAM at 3 Msymbols/s. The circuit is fabricated in 0.12 SiGe BiCMOS process and occupies an area of 1.5 .
Autors: Gupta, A. K.;Kim, J.;Asbeck, P.;Buckwalter, J. F.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jun 2012, volume: 22, issue:6, pages: 327 - 329
Publisher: IEEE
 
» A Bayesian approach to sparse dynamic network identification
Abstract:


Autors:
Appeared in: Automatica
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A Bias-Varied Low-Power K-band VCO in 90 nm CMOS Technology
Abstract:
This letter presents a novel bias-varied low-power K-band voltage controlled oscillator (VCO) in a standard 90 nm CMOS technology. This circuit exhibits low power consumption of and a 12.2% tuning range with low phase noise characteristic. These performances are realized by combination of the transformer-feedback and the switchable active circuit block, which can control the dc power at different frequencies and improve the phase noise.
Autors: Liu, S.-L.;Tian, X.-C.;Hao, Y.;Chin, A.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jun 2012, volume: 22, issue:6, pages: 321 - 323
Publisher: IEEE
 
» A Bidirectional High-Power-Quality Grid Interface With a Novel Bidirectional Noninverted Buck–Boost Converter for PHEVs
Abstract:
Plug-in hybrid electric vehicles (PHEVs) will play a vital role in future sustainable transportation systems due to their potential in terms of energy security, decreased environmental impact, improved fuel economy, and better performance. Moreover, new regulations have been established to improve the collective gas mileage, cut greenhouse gas emissions, and reduce dependence on foreign oil. This paper primarily focuses on two major thrust areas of PHEVs. First, it introduces a grid-friendly bidirectional alternating current/direct current ac/dc–dc/ac rectifier/inverter for facilitating vehicle-to-grid (V2G) integration of PHEVs. Second, it presents an integrated bidirectional noninverted buck–boost converter that interfaces the energy storage device of the PHEV to the dc link in both grid-connected and driving modes. The proposed bidirectional converter has minimal grid-level disruptions in terms of power factor and total harmonic distortion, with less switching noise. The integrated bidirectional dc/dc converter assists the grid interface converter to track the charge/discharge power of the PHEV battery. In addition, while driving, the dc/dc converter provides a regulated dc link voltage to the motor drive and captures the braking energy during regenerative braking.
Autors: Onar, O. C.;Kobayashi, J.;Erb, D. C.;Khaligh, A.;
Appeared in: IEEE Transactions on Vehicular Technology
Publication date: Jun 2012, volume: 61, issue:5, pages: 2018 - 2032
Publisher: IEEE
 
» A Bionic Artificial Heart Blood Pump Driven by Permanent Magnet Located Outside Human Body
Abstract:
In this paper, a bionic artificial heart blood pump driven by permanent magnet is proposed. This permanent magnet driving device of the blood pump can solve the problems of the blood pump power supply from the body's external to the internal and the heat generated by the energy conversion components inside the body. In addition, the blood pump can overcome some shortcomings of the existing pneumatic or electric diaphragm blood pump, for example, the short life of the pump is caused by the fact that the blood bag made of flexible material is periodically pressured and repeatedly folded.
Autors: Xia, D.;
Appeared in: IEEE Transactions on Applied Superconductivity
Publication date: Jun 2012, volume: 22, issue:3, pages: 4401304 - 4401304
Publisher: IEEE
 
» A bivariate model for retinal image identification in lambs
Abstract:


Autors:

Highlights

Appeared in: Computers and Electronics in Agriculture
Publication date: Jun 2012
Publisher: Elsevier B.V.
 
» A bottleneck Steiner tree based multi-objective location model and intelligent optimization of emergency logistics systems
Abstract:


Autors:

Highlights

Appeared in: Robotics and Computer-Integrated Manufacturing
Publication date: Jun 2012
Publisher: Elsevier B.V.
 

Publication archives by date

  2017:   January     February     March     April     May     June     July     August     September     October     November     December    

  2016:   January     February     March     April     May     June     July     August     September     October     November     December    

  2015:   January     February     March     April     May     June     July     August     September     October     November     December    

  2014:   January     February     March     April     May     June     July     August     September     October     November     December    

  2013:   January     February     March     April     May     June     July     August     September     October     November     December    

  2012:   January     February     March     April     May     June     July     August     September     October     November     December    

  2011:   January     February     March     April     May     June     July     August     September     October     November     December    

  2010:   January     February     March     April     May     June     July     August     September     October     November     December    

  2009:   January     February     March     April     May     June     July     August     September     October     November     December    

 
0-C     D-L     M-R     S-Z