Electrical and Electronics Engineering publications abstract of: 05-2015 sorted by title, page: 0

» 0.1- Atomic Layer Deposition Al2O3 Passivated InAlN/GaN High Electron-Mobility Transistors for E-Band Power Amplifiers
Abstract:
High-performance 0.1-μm InAlN/GaN high electron-mobility transistors (HEMTs) have been successfully developed for power amplifiers operating at E-band (targeting 71-76 and 81-86-GHz bands). High maximum drain current of 1.75 A/mm and maximum extrinsic transconductance of 0.8 S/mm have been achieved for depletion-mode devices. Enhancement-mode HEMTs have also shown maximum drain current of 1.5 A/mm and maximum extrinsic transconductance of 1 S/mm. The selection of atomic layer deposition aluminum oxide (Al2O3) for device passivation enables a two-terminal breakdown voltage of ~25 V, excellent subthreshold characteristics as well as the pulsed-IV featuring little current collapse for both types of HEMTs. When biased at a drain voltage of 10 V, a first-pass two-stage power amplifier design based on 0.1-μm depletion-mode devices has demonstrated an output power of 1.43 W with 12.7% power-added efficiency at 86 GHz, a level of performance that has been attained previously only by state-of-the-art counterparts based on AlGaN/GaN HEMTs at a much higher drain bias and compression level.
Autors: Dong Xu;Chu, K.K.;Diaz, J.A.;Ashman, M.;Komiak, J.J.;Pleasant, L.M.;Creamer, C.;Nichols, K.;Duh, K.H.G.;Smith, P.M.;Chao, P.C.;Dong, L.;Ye, P.D.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 442 - 444
Publisher: IEEE
 
» 0.1- Atomic Layer Deposition Al2O3 Passivated InAlN/GaN High Electron-Mobility Transistors for E-Band Power Amplifiers
Abstract:
High-performance 0.1- InAlN/GaN high electron-mobility transistors (HEMTs) have been successfully developed for power amplifiers operating at E-band (targeting 71–76 and 81–86-GHz bands). High maximum drain current of 1.75 A/mm and maximum extrinsic transconductance of 0.8 S/mm have been achieved for depletion-mode devices. Enhancement-mode HEMTs have also shown maximum drain current of 1.5 A/mm and maximum extrinsic transconductance of 1 S/mm. The selection of atomic layer deposition aluminum oxide (Al2O3) for device passivation enables a two-terminal breakdown voltage of V, excellent subthreshold characteristics as well as the pulsed-IV featuring little current collapse for both types of HEMTs. When biased at a drain voltage of 10 V, a first-pass two-stage power amplifier design based on 0.1- depletion-mode devices has demonstrated an output power of 1.43 W with 12.7% power-added efficiency at 86 GHz, a level of performance that has been attained previously only by state-of-the-art counterparts based on AlGaN/GaN HEMTs at a much higher drain bias and compression level.
Autors: Xu, D.;Chu, K.K.;Diaz, J.A.;Ashman, M.;Komiak, J.J.;Pleasant, L.M.;Creamer, C.;Nichols, K.;Duh, K.H.G.;Smith, P.M.;Chao, P.C.;Dong, L.;Ye, P.D.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 442 - 444
Publisher: IEEE
 
» 1/ Noise Characteristics of MoS2 Thin-Film Transistors: Comparison of Single and Multilayer Structures
Abstract:
We report on the transport and low-frequency noise measurements of MoS2 thin-film transistors (TFTs) with thin (2-3 atomic layers) and thick (15-18 atomic layers) channels. The back-gated transistors made with the relatively thick MoS2 channels have advantages of the higher electron mobility and lower noise level. The normalized noise spectral density of the low-frequency 1/f noise in thick MoS2 transistors is of the same level as that in graphene. The MoS2 transistors with the atomically thin channels have substantially higher noise levels. It was established that, unlike in graphene devices, the noise characteristics of MoS2 transistors with thick channels (15-18 atomic planes) could be described by the McWhorter model. Our results indicate that the channel thickness optimization is crucial for practical applications of MoS2 TFTs.
Autors: Rumyantsev, S.L.;Chenglong Jiang;Samnakay, R.;Shur, M.S.;Balandin, A.A.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 517 - 519
Publisher: IEEE
 
» 1/ Noise Characteristics of MoS2 Thin-Film Transistors: Comparison of Single and Multilayer Structures
Abstract:
We report on the transport and low-frequency noise measurements of MoS2 thin-film transistors (TFTs) with thin (2–3 atomic layers) and thick (15–18 atomic layers) channels. The back-gated transistors made with the relatively thick MoS2 channels have advantages of the higher electron mobility and lower noise level. The normalized noise spectral density of the low-frequency 1/ noise in thick MoS2 transistors is of the same level as that in graphene. The MoS2 transistors with the atomically thin channels have substantially higher noise levels. It was established that, unlike in graphene devices, the noise characteristics of MoS2 transistors with thick channels (15–18 atomic planes) could be described by the McWhorter model. Our results indicate that the channel thickness optimization is crucial for practical applications of MoS2 TFTs.
Autors: Rumyantsev, S.L.;Jiang, C.;Samnakay, R.;Shur, M.S.;Balandin, A.A.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 517 - 519
Publisher: IEEE
 
» 20-Gb/s Polar RZ 4-PAM Transmission Over 20-km SSMF Using RSOA and Direct Detection
Abstract:
We demonstrate 20-Gb/s upstream transmission in the wavelength-division-multiplexed passive optical network based on reflective semiconductor optical amplifiers (RSOAs) and direct-detection receivers by using the polar return-to-zero (RZ) four-level pulse amplitude modulation (4-PAM) format. In order to compensate for the limited modulation bandwidth of the RSOA, an optical delay interferometer is used together with an electrical equalizer at the receiver. We successfully transmit the 20-Gb/s polar RZ 4-PAM signal over the 20-km long loopback link without using optical dispersion compensator. We also show that the proposed polar RZ 4-PAM format provides superior performances to the conventional RZ 4-PAM format due to the up–down symmetry of its waveform.
Autors: Shim, H.K.;Kim, H.;Chung, Y.C.;
Appeared in: IEEE Photonics Technology Letters
Publication date: May 2015, volume: 27, issue:10, pages: 1116 - 1119
Publisher: IEEE
 
» 2014 IAS Petroleum and Chemical Industry Conference [Conference News]
Abstract:
Reports on activities and events at the 2014 IAS Petroleum and Chemical Industry Conference.
Autors: McFarland, K.;
Appeared in: IEEE Industry Applications Magazine
Publication date: May 2015, volume: 21, issue:3, pages: 85 - 86
Publisher: IEEE
 
» 2014 Student Congress at Tunisia [Chapter News]
Abstract:
Reports on activities and events at the 2014 Student Congress in Tunisia.
Autors: Magyar, P.;
Appeared in: IEEE Industry Applications Magazine
Publication date: May 2015, volume: 21, issue:3, pages: 91 - 93
Publisher: IEEE
 
» 22.8 GHz Substrate Integrated Waveguide Analog Frequency Divide-by-3 Circuit
Abstract:
A 22.8 GHz analog frequency divide-by-3 circuit is presented based on an injection locked oscillator. Substrate integrated waveguide (SIW) technology is used to implement the input and output sections of the frequency divider circuit. The input SIW section at the gate of the active device permits the introduction of the injection signal at the third harmonic frequency of the oscillator, while the output section is designed to maximize the DC-RF conversion efficiency of the oscillator circuit. A prototype is fabricated presenting a measured DC-RF efficiency of 38.5% at 7.603 GHz output frequency with 3.7 dBm output power. An injection locking bandwidth of 301.4 MHz was obtained for a 1.5 dBm input injection signal at 22.8 GHz.
Autors: Georgiadis, A.;Collado, A.;Niotaki, K.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: May 2015, volume: 25, issue:5, pages: 304 - 306
Publisher: IEEE
 
» 3-D FEM Analysis of a Novel Magnetic Levitation System
Abstract:
This paper deals with the 3-D finite element method (FEM) analysis of a novel magnetic levitation (maglev) train driven by an air-cored tubular linear induction motor. This new maglev system originates from electromagnetic launcher (EML) technology, especially linear induction launcher (LIL) type. Some 2-D magnetic analyses based on current sheet model or transmission line approach for the LIL type launchers are available in the literature, but this paper provides an alternative way to analyze LIL type of EMLs using 3-D FEM. The analysis examines the variation of propulsion, levitation, and guidance forces induced in the moving part. It is expected that the possible results of this magnetic analysis will lead to some new and important design considerations for the novel maglev system.
Autors: Hasirci, U.;Balikci, A.;Zabar, Z.;Birenbaum, L.;
Appeared in: IEEE Transactions on Plasma Science
Publication date: May 2015, volume: 43, issue:5, pages: 1261 - 1265
Publisher: IEEE
 
» 3-D imaging using row???column-addressed arrays with integrated apodization - part i: apodization design and line element beamforming
Abstract:
This paper investigates the effect of transducerintegrated apodization in row???column-addressed arrays and presents a beamforming approach specific for such arrays. Row???column addressing 2-D arrays greatly reduces the number of active channels needed to acquire a 3-D volume. A disadvantage of row???column-addressed arrays is an apparent ghost effect in the point spread function caused by edge waves. This paper investigates the origin of the edge waves and the effect of introducing an integrated apodization to reduce the ghost echoes. The performance of a λ/2-pitch 5-MHz 128 + 128 row???column-addressed array with different apodizations is simulated. A Hann apodization is shown to decrease imaging performance away from the center axis of the array because of a decrease in main lobe amplitude. Instead, a static roll-off apodization region located at the ends of the line elements is proposed. In simulations, the peak ghost echo intensity of a scatterer at (x,y, z) = (8, 3, 30) mm was decreased by 43 dB by integrating roll-off apodization into the array. The main lobe was unaffected by the apodization. Simulations of a 3-mm-diameter anechoic blood vessel at 30 mm depth showed that applying the transducer-integrated apodization increased the apparent diameter of the vessel from 2.0 mm to 2.4 mm, corresponding to an increase from 67% to 80% of the true vessel diameter. The line element beamforming approach is shown to be essential for achieving correct time-of-flight calculations, and hence avoid geometrical distortions. In Part II of this work, experimental results from a capacitive micromachined ultrasonic transducer with integrated roll-off apodization are given to validate the effect of integrating apodization into the line elements.
Autors: Rasmussen, M.F.;Christiansen, T.L.;Thomsen, E.V.;Jensen, J.A.;
Appeared in: IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control
Publication date: May 2015, volume: 62, issue:5, pages: 947 - 958
Publisher: IEEE
 
» 3D Reasoning from Blocks to Stability
Abstract:
Objects occupy physical space and obey physical laws. To truly understand a scene, we must reason about the space that objects in it occupy, and how each objects is supported stably by each other. In other words, we seek to understand which objects would, if moved, cause other objects to fall. This 3D volumetric reasoning is important for many scene understanding tasks, ranging from segmentation of objects to perception of a rich 3D, physically well-founded, interpretations of the scene. In this paper, we propose a new algorithm to parse a single RGB-D image with 3D block units while jointly reasoning about the segments, volumes, supporting relationships, and object stability. Our algorithm is based on the intuition that a good 3D representation of the scene is one that fits the depth data well, and is a stable, self-supporting arrangement of objects (i.e., one that does not topple). We design an energy function for representing the quality of the block representation based on these properties. Our algorithm fits 3D blocks to the depth values corresponding to image segments, and iteratively optimizes the energy function. Our proposed algorithm is the first to consider stability of objects in complex arrangements for reasoning about the underlying structure of the scene. Experimental results show that our stability-reasoning framework improves RGB-D segmentation and scene volumetric representation.
Autors: Zhaoyin Jia;Gallagher, A.C.;Saxena, A.;Tsuhan Chen;
Appeared in: IEEE Transactions on Pattern Analysis and Machine Intelligence
Publication date: May 2015, volume: 37, issue:5, pages: 905 - 918
Publisher: IEEE
 
» 4-D spatiotemporal analysis of ultrasound contrast agent dispersion for prostate cancer localization: a feasibility study
Abstract:
Currently, nonradical treatment for prostate cancer is hampered by the lack of reliable diagnostics. Contrastultrasound dispersion imaging (CUDI) has recently shown great potential as a prostate cancer imaging technique. CUDI estimates the local dispersion of intravenously injected contrast agents, imaged by transrectal dynamic contrast-enhanced ultrasound (DCE-US), to detect angiogenic processes related to tumor growth. The best CUDI results have so far been obtained by similarity analysis of the contrast kinetics in neighboring pixels. To date, CUDI has been investigated in 2-D only. In this paper, an implementation of 3-D CUDI based on spatiotemporal similarity analysis of 4-D DCE-US is described. Different from 2-D methods, 3-D CUDI permits analysis of the entire prostate using a single injection of contrast agent. To perform 3-D CUDI, a new strategy was designed to estimate the similarity in the contrast kinetics at each voxel, and data processing steps were adjusted to the characteristics of 4-D DCE-US images. The technical feasibility of 4-D DCE-US in 3-D CUDI was assessed and confirmed. Additionally, in a preliminary validation in two patients, dispersion maps by 3-D CUDI were quantitatively compared with those by 2-D CUDI and with 12-core systematic biopsies with promising results.
Autors: Schalk, S.G.;Demi, L.;Smeenge, M.;Mills, D.M.;Wallace, K.D.;de la Rosette, J.J.M.C.H.;Wijkstra, H.;Mischi, M.;
Appeared in: IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control
Publication date: May 2015, volume: 62, issue:5, pages: 839 - 851
Publisher: IEEE
 
» 40 Years with the Ungerboeck Model: A Look at its Potentialities [Lecture Notes]
Abstract:
It has been about 40 years since Gottfried Ungerboeck published his paper [1] on an alternative maximum-likelihood (ML) detector for intersymbol interference (ISI) channels. The ISI model used by Ungerboeck is commonly referred to as the Ungerboeck model. Ungerboeck?s ML detector has equivalent performance compared to Forney?s detector, which was published two years earlier in [2], but received lesser considerations. Perhaps the best example of this is the fact that a BCJR algorithm [3] operating on the Ungerboeck model was derived as late as 2005 [4]. However, the Ungerboeck model has many strong aspects and has therefore been rediscovered over the last few decades.
Autors: Rusek, F.;Colavolpe, G.;Sundberg, C.;
Appeared in: IEEE Signal Processing Magazine
Publication date: May 2015, volume: 32, issue:3, pages: 156 - 161
Publisher: IEEE
 
» Ab-Initio Simulation of van der Waals MoTe2–SnS2 Heterotunneling FETs for Low-Power Electronics
Abstract:
Band-to-band tunneling field-effect transistors (TFETs) made of a vertical heterojunction of single-layer MoTe2 and SnS2 are investigated by means of 3-D, full-band, atomistic quantum-transport simulations relying on a first-principles basis. At a supply voltage V and OFF-current , on-state currents are reported for both n- and p-type logic switches. Our findings indicate that metal-dichalcogenide heterojunction TFETs represent a viable option in low-power electronics.
Autors: Szabo, A.;Koester, S.J.;Luisier, M.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 514 - 516
Publisher: IEEE
 
» In Situ Measurement of Strain and Temperature for Railgun Launcher Diagnostics
Abstract:
The challenging physical environment associated with electromagnetic launchers (EMLs) makes reliable in situ measurements of physical parameters particularly difficult. The resulting lack of data hinders the validation of simulation codes that are used to support the design of new EMLs. As a result, there have been substantial efforts to develop new instrumentation that is compatible with the harsh environment of an EML. This paper will describe recent developments from Georgia Tech and U.S. Navy research to improve instrumentation capabilities for temperature and strain.
Autors: Hoffman, R.B.;Haran, T.L.;James, J.C.;Vaughan, R.B.;Lamb, C.W.;Meraz, N.;
Appeared in: IEEE Transactions on Plasma Science
Publication date: May 2015, volume: 43, issue:5, pages: 1302 - 1309
Publisher: IEEE
 
» A 0.1–6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS
Abstract:
A 4.8-mm –6.0-GHz dual-path software-defined radio transmitter supporting intraband carrier aggregation (CA) in 65-nm CMOS is presented. A simple approach is proposed to support intraband CA signals with only one I-Q baseband path. By utilizing the power-scalable and feedforward compensation techniques, the power of the wideband analog baseband is minimized. The transmitter consists of a high gain-range main path and a low-power subpath to cooperatively cover different standards over 0.1–6.0 GHz with more flexibility. The reconfigurable power amplifier (PA) driver achieves wideband frequency coverage with efficiency-enhanced on-chip transformers and improved switched-capacitor arrays. This transmitter achieves <−50-dBc image rejection ratio and <−40-dBc local oscillating signal leakage after the calibration. System verifications have demonstrated −31/−51-dBc ACLR1/ACLR2 (adjacent channel leakage ratio) at 3-dBm output power for 2.3-GHz LTE20 in the main path and 1.7% error vector magnitude (EVM) at 1.5-dBm output for 1.8-GHz WCDMA in the subpath. Both paths enable SAW-less FDD operations with −153 or −156 dBc/Hz carrier-to-noise ratio at 200-MHz frequency offset. Finally, the dual CA signals with 55-MHz frequency spacing are verified, showing the EVM of 1.2% and 0.8%, respectively, and exhibiting the intraband CA capability.
Autors: Yin, Y.;Chi, B.;Sun, Z.;Zhang, X.;Wang, Z.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 944 - 957
Publisher: IEEE
 
» A 0.22 ps rms Integrated Noise 15 MHz Bandwidth Fourth-Order ΔΣ Time-to-Digital Converter Using Time-Domain Error-Feedback Filter
Abstract:
In this paper, a fourth-order ΔΣ time-to-digital converter (TDC) is proposed to achieve high resolution and wide signal bandwidth. The proposed TDC is based on a 1–3 multi-stage-noise-shaping (MASH) architecture, where the first-stage is a gated-ring oscillator based TDC (GRO-TDC) and the second-stage is a single-loop third-order ΔΣ TDC based on a time-domain error-feedback filter using time registers, time adders and time amplifiers. Implemented in 65 nm CMOS process, the prototype TDC achieves 0.22 ps rms of integrated noise within 15 MHz signal bandwidth at 300 MS/s while consuming lower than 6.24 mW. The proposed TDC occupies an active die area of only 0.03 mm 2 .
Autors: Yu, W.;Kim, K.;Cho, S.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1251 - 1262
Publisher: IEEE
 
» A 0.25-V 28-nW 58-dB Dynamic Range Asynchronous Delta Sigma Modulator in 130-nm Digital CMOS Process
Abstract:
In this paper, we present a single-bit clock-less asynchronous delta–sigma modulator (ADSM) operating at just 0.25 V power supply. Several circuit approaches were employed to enable such low-voltage operation and maintain high performance. One approach involved utilizing bulk-driven transistors in subthreshold region with transconductance-enhancement topology. Another approach was to employ distributed transistor layout structure to mitigate the effect of low output impedance due to halo drain implants employed in today’s digital CMOS process. The ADSM achieved a characteristic center frequency of 630 Hz. It had an effective signal-to-noise-plus-distortion ratio (SNDR) of 58 dB or effective number of bits (ENOB) 9 b and just 28-nW power dissipation. A detailed analytical model capturing the effect of nonidealities of the individual circuit components is also presented for the first time with a close agreement with experimental results.
Autors: Ferreira, L.H.C.;Sonkusale, S.R.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 926 - 934
Publisher: IEEE
 
» A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist
Abstract:
This brief presents a two-port disturb-free 9T subthreshold static random access memory (SRAM) cell with independent single-ended read bitline and write bitline (WBL) and cross-point data-aware write structure to facilitate robust subthreshold operation and bit-interleaving architecture for enhanced soft error immunity. The design employs a variation-tolerant line-up write-assist scheme where the timing of area-efficient boosted write wordline and negative WBL are aligned and triggered/initiated by the same low-going global WBL to maximize the write-ability enhancement. A 72-kb test chip is implemented in United Microelectronics Corp. 40-nm low-power (40LP) CMOS. Full functionality is achieved for V ranging from 1.5 to 0.32 V without redundancy. The measured maximum operation frequency is 260 MHz (450 kHz) at 1.1 V (0.32 V) and 25 °C. At 0.325 V and 25 °C, the chip operates at 600 kHz with 5.78 W total power and 4.69 W leakage power, offering frequency improvement compared with 300 kHz of our previous 72-kb 9T subthreshold SRAM design in the same 40LP technology. The energy efficiency (power/frequency/IO) at 0.325 V and 25 °C is 0.267 pJ/bit, a 23.7% improvement over the 0.350 pJ/bit of our previous design.
Autors: Lu, C.;Chuang, C.;Jou, S.;Tu, M.;Wu, Y.;Huang, C.;Kan, P.;Huang, H.;Lee, K.;Kao, Y.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 958 - 962
Publisher: IEEE
 
» A 1.4–2.3-GHz Tunable Diplexer Based on Reconfigurable Matching Networks
Abstract:
An idea for implementing reconfigurable matching networks to realize a tunable diplexer is investigated and demonstrated. The reconfigurable matching networks ensure that the rejection band impedance of every filter is transformed to an open circuit over a wide range of frequencies, allowing two tunable filters to be connected together to form a tunable diplexer without affecting each other. The tunable diplexer is built using Schottky diodes and combline resonators on Duroid substrates, and can operate from 1.4 to 2.3 GHz with a closest frequency separation of 110 MHz. Measurements show virtually no difference in the frequency response between a standalone filter and a filter placed in the tunable diplexer. The work shows that a wideband tunable diplexer can therefore be realized using tunable bandpass filters and reconfigurable matching networks.
Autors: Ko, C.H.;Rebeiz, G.M.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: May 2015, volume: 63, issue:5, pages: 1595 - 1602
Publisher: IEEE
 
» A 1.8 dB NF Blocker-Filtering Noise-Canceling Wideband Receiver With Shared TIA in 40 nm CMOS
Abstract:
This paper presents a high-performance two-path wideband receiver (RX) for 4G LTE applications. The RX uses an extra GM stage after the LNA to improve the noise figure (NF). Furthermore, different RF and baseband blocker rejection techniques are proposed to significantly improve the linearity of the RX. The blockers are first rejected after the LNA stage through an N-path filter. Then, a novel base-band blocker filtering (BBBF) technique improves IIP3 by 7 dB. A dual-mixer architecture is also employed to attenuate blockers both before and after the mixer stage. The N-path filter noise is sensed out-of-phase by the RX main path and cancelled at the inputs of the shared TIA. The RX achieves 1.8 dB NF with 50 dB gain at 2 GHz in 40 nm CMOS technology. The RX out-of-band IIP3 is +5 dBm, which is improved by 20 dB employing the proposed techniques, while consuming 36 mW.
Autors: Hedayati, H.;Lau, W.-F.A.;Kim, N.;Aparin, V.;Entesari, K.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1148 - 1164
Publisher: IEEE
 
» A 25 dBm Outphasing Power Amplifier With Cross-Bridge Combiners
Abstract:
In this paper, we present a 25 dBm Class-D outphasing power amplifier (PA) with cross-bridge combiners. The Class-D PA is designed in a standard 45 nm process while the combiner is implemented on board using lumped elements for flexibilities in testing. Comparing with conventional non-isolated combiners, the elements of the cross-bridge combiner are carefully chosen so that additional resonance network is formed to reduce out-of-phase current, thereby increasing backoff efficiency of the outphasing PA. The Class-D outphasing PA with the proposed combiner is manufactured and measured at both 900 MHz and 2.4 GHz. It achieves 55% peak power-added efficiency (PAE) at 900 MHz and 45% at 2.4 GHz for a single tone input. For a 10 MHz LTE signal with 6 dB PAR, the PAE is 32% at 900 MHz with −39 dBc adjacent channel power ratio (ACPR) and 22% at 2.4 GHz with −33 dBc ACPR. With digital predistortion (DPD), the linearity of the PA at 2.4 GHz is improved further to reach −53 dBc, −50 dBc, −42 dBc ACPR for 10 MHz, 20 MHz, and 2-carrier 20 MHz LTE signals.
Autors: Ding, L.;Hur, J.;Banerjee, A.;Hezar, R.;Haroun, B.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1107 - 1116
Publisher: IEEE
 
» A 3-D Millimeter-Wave Filtering Antenna With High Selectivity and Low Cross-Polarization
Abstract:
A three-dimensional (3-D) filtering antenna with features of high selectivity and low cross-polarization is proposed and experimentally verified in this communication. Thanks to the vertically 3-D integration, the high selectivity at either frequency sides of the filtering antenna is achieved by a novel cross-coupling scheme between in-band and out-of-band modes in a single cavity located in the lower substrate, while the low cross-polarization in the far-field is realized due to the symmetric feed and radiators on a cavity-backed dual-slot antenna at the upper substrate. In our design, the cavity-backed dual-slot antenna performs not only a radiator but also the last resonator of the bandpass filter (BPF). A prototype is demonstrated at Ka-band with a center frequency of 31.495 GHz and fractional bandwidth of 1.56%. Two radiation nulls [transmission zeros (TZs)] at either frequency band edges can be observed and a cross-polarization level lower than is obtained.
Autors: Chu, H.;Jin, C.;Chen, J.;Guo, Y.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: May 2015, volume: 63, issue:5, pages: 2375 - 2380
Publisher: IEEE
 
» A 47.6–71.0-GHz 65-nm CMOS VCO Based on Magnetically Coupled -Type LC Network
Abstract:
A wide tuning range millimeter-wave voltage-controlled oscillator (VCO) based on a magnetically coupled -type LC network in 65-nm CMOS is proposed. By configuring the switched negative-resistance unit, the VCO can oscillate at the even mode or the odd mode of the magnetically coupled -type LC network, thus the tuning range is widened without introducing the switch loss into the resonator. The proposed VCO achieves a measured continuous tuning range of 39%, from 47.6 to 71.0 GHz. The measured phase noise for a 47.6-GHz carrier at the even mode and 56.2-GHz carrier at the odd mode are and at 10-MHz offset with a corresponding of and , respectively. The measured phase noise in the whole frequency tuning range varies from to at 10-MHz offset, while the corresponding figure-of-merit (FOM) and vary from to and to 190.6 dB, respectively. The VCO core consumes 8.9–10.4-mA current from - .0-V power supply and 320 230 die area.
Autors: Jia, H.;Chi, B.;Kuang, L.;Wang, Z.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: May 2015, volume: 63, issue:5, pages: 1645 - 1657
Publisher: IEEE
 
» A 52 GHz Frequency Synthesizer Featuring a 2nd Harmonic Extraction Technique That Preserves VCO Performance
Abstract:
This paper introduces a 2nd harmonic extraction technique and its implementation in a 46.4–58.1 GHz frequency synthesizer. The frequency doubling approach is based on tapping second harmonic signals at the VCO supply and tail nodes and amplifying them to provide a differential output. Since the amplifiers do not load the VCO outputs, the proposed technique does not affect either the tuning range or the frequency of the VCO. Moreover, a novel noise bypass technique is utilized to ensure that the amplifiers do not degrade the VCO phase noise. As a result, the frequency synthesizer achieves 22.4% tuning range (46.4–58.1 GHz) and phase noise below –118 dBc/Hz while consuming 66 mW from a 1 V supply. The stacked common gate amplifier can also be utilized for voltage regulation, providing a relatively constant FOM performance over a 2X power dissipation range. The synthesizer occupies 0.6 mm 1 mm in IBM 32 nm SOI CMOS.
Autors: Sadhu, B.;Ferriss, M.;Valdes-Garcia, A.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1214 - 1223
Publisher: IEEE
 
» A 600 V High-Voltage IC Technique With a New Self-Shielding Structure for High Noise Tolerance and Die Shrink
Abstract:
A novel 600 V high-voltage IC (HVIC) featuring a high noise tolerance is proposed. The purpose of the proposed HVIC is to achieve the high noise tolerance without an increase of the fabrication cost. The basic device concept is to arrange a P− separation layer around the high-side control part, which is called a new self-shielding structure, to reduce a hole current injection under the condition of negative transient voltage noise. By applying the new self-shielding structure in the HVIC, more than higher noise tolerance (−95 V/ ) and 20% die shrink can be obtained compared with a conventional HVIC, without additional fabrication process. This means the noise tolerance of the fabricated HVIC with proposed structure is high enough to be applied to over 600 V/50-A class power conversion applications. In this paper, the new self-shielding concept of the proposed 600 V-class HVIC is presented with the simulation and experimental results.
Autors: Yamaji, M.;Jonishi, A.;Tanaka, T.;Sumida, H.;Hashimoto, Y.;
Appeared in: IEEE Transactions on Electron Devices
Publication date: May 2015, volume: 62, issue:5, pages: 1524 - 1529
Publisher: IEEE
 
» A 71 dB 150 Variable-Gain Amplifier in 0.18 CMOS Technology
Abstract:
This letter presents a simple approach for ultra-low-power and high-frequency variable gain amplifier (VGA) design, which requires no additional circuitry to generate the exponential-like function. Thus, the power consumption and chip area of the designed VGA can be drastically reduced without deterioration of other performance. The inverse exponential-like dB-linear characteristic is achieved by utilizing a pair of complementary transistors as the load. The p-MOS transistor is self-biased in the saturation region, while the n-MOS transistor is biased in the sub-threshold region. To prove the concept, a five-cell VGA is fabricated in a standard 0.18 CMOS technology. The measurements show that the power consumption of the VGA is less than 150 and achieves a total gain range of 71 dB, out of which 45 dB is dB-linear with less than 1 dB gain error, as well as bandwidth of more than 50 MHz. The output is better than 0 dBm and the minimum input-referred noise is 7.5 .
Autors: Liu, H.;Zhu, X.;Boon, C.C.;Yi, X.;Kong, L.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: May 2015, volume: 25, issue:5, pages: 334 - 336
Publisher: IEEE
 
» A 80 mW 40 Gb/s Transmitter With Automatic Serializing Time Window Search and 2-tap Pre-Emphasis in 65 nm CMOS Technology
Abstract:
This paper presents a 40 Gb/s (38.4-to-46.4 Gb/s) half rate SerDes transmitter with automatic serializing time window search and 2-tap pre-emphasis. By implementing a serializing time window search loop, the serializing timing is guaranteed and circuits running at the highest speed such as latches for retiming and clock tree buffers for delay matching are eliminated. A divider-less sub-harmonically injection-locked PLL (SILPLL) with auto-adjust injection timing is employed to provide low jitter clock source. A power-efficient 2-tap feed-forward equalizer (FFE) based on open loop 1-UI delay generation is implemented as the transmitter equalizer. Fabricated in 65 nm CMOS technology, the transmitter running at 40 Gb/s consumes 80 mW power under 1.2 V supply. The PLL RMS jitter is 98 fs integrating from 100 Hz to 100 MHz and the total jitter of 40 Gb/s eye diagram is 6.7 ps for 1e-12 BER.
Autors: Huang, K.;Wang, Z.;Zheng, X.;Zhang, C.;Wang, Z.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: May 2015, volume: 62, issue:5, pages: 1441 - 1450
Publisher: IEEE
 
» A 9.2–12.7 GHz Wideband Fractional-N Subsampling PLL in 28 nm CMOS With 280 fs RMS Jitter
Abstract:
This paper describes a fractional-N subsampling PLL in 28 nm CMOS. Fractional phase lock is made possible with almost no penalty in phase noise performance thanks to the use of a 10 bit, 0.55 ps/LSB digital-to-time converter (DTC) circuit operating on the sampling clock. The performance limitations of a practical DTC implementation are considered, and techniques for minimizing these limitations are presented. For example, background calibration guarantees appropriate DTC gain, reducing spurs. Operating at 10 GHz the system achieves −38 dBc of integrated phase noise (280 fs RMS jitter) when a worst case fractional spur of −43 dBc is present. In-band phase noise is at the level of −104 dBc/Hz. The class-B VCO can be tuned from 9.2 GHz to 12.7 GHz (32%). The total power consumption of the synthesizer, including the VCO, is 13 mW from 0.9 V and 1.8 V supplies.
Autors: Raczkowski, K.;Markulic, N.;Hershberg, B.;Craninckx, J.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1203 - 1213
Publisher: IEEE
 
» A -Hopping Reconfigurable RGB LED Driver With Automatic Detection and Predictive Peak Current Control
Abstract:
A cost-effective single-converter reconfigurable CMOS LED driver is proposed to accurately and adaptively bias RGB color LEDs. An automatic detection technique is developed to precisely detect the voltage difference between the red and green/blue LEDs regardless of the PVT variations. The fast -hopping technique is also implemented to instantaneously adjust the output voltage level, achieving 198 ns/V -hopping speed on 0.35 µm CMOS. This is at least one order faster than the state-of-the-arts. Predictive peak current control and burst-mode operation are employed for fast inductor current modulation and robust operation. The switching frequency is stabilized around 1 MHz by an adaptive off-timer for switching noise spectrum control. The proposed driver consumes 8.6 times less headroom power than its fixed-output counterparts. The performance has been verified by measurement results of a 0.35 µm CMOS prototype.
Autors: Zhang, Y.;Chen, H.;Ma, D.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1287 - 1298
Publisher: IEEE
 
» A biometric method based on the matching of dilated and skeletonized IR images of the veins map of the dorsum of the hand
Abstract:
This work proposes a biometric identification system that works together with a palm vein reader sensor and a hand-clenching support, designed to perform the capture the back of the hand. Several processing steps were performed: extraction of the region of interest, binarization, dilation, noise filtering, skeletonization, as well as extraction and verification of patterns based on the measurment of coincidence of vertical and horizontal displacements of skeletonized and dilated images. The proposed method achieved the following results: processing time post capture of 1.8 seconds, FRR of 0.47% and FAR of 0,00%, with a referential database of 50 people from a total of 1500 random captures.
Autors: Alejo, Willy;Rodriguez, Daniel;Kemper, Guillermo;
Appeared in: IEEE Latin America Transactions
Publication date: May 2015, volume: 13, issue:5, pages: 1438 - 1445
Publisher: IEEE
 
» A Broadband 4.5–15.5-GHz SiGe Power Amplifier With 25.5-dBm Peak Saturated Output Power and 28.7% Maximum PAE
Abstract:
This paper presents the design of a broadband power amplifier (PA) in 130-nm SiGe BiCMOS technology. First, a single-stage broadband single-cell PA covering the 4.5–18-GHz frequency band is introduced. In this frequency range, this single cell achieves a measured gain, saturated output power , output 1-dB compression point , and power-added efficiency (PAE) in the range from 12.8 to 15.7 dB, 18.8 to 23.7 dBm, 16.7 to 19.5 dBm, and 11.4 to 31.9%, respectively. Its peak saturated output power and maximum PAE are both obtained at 8.5 GHz. Second, to increase the output power, a PA consisting of two parallel broadband cells with a power combination is presented. This PA operates in the 4.5–15.5-GHz frequency range with measured gain, , and PAE in the range from 11 to 16.6 dB, 21.3 to 25.5 dBm, 18.7 to 21.7 dBm, and 11.9 to 28.7%, respectively. It achieves its peak saturated output power of 25.5 dBm at 8.5 GHz and its maximum PAE of 28.7% with an associated output power of 23.6 dBm at 6.5 GHz. Each of those two PAs achieves better performances than the state-of-the-art in broadband SiGe technology when comparing the output power level and efficiency.
Autors: Kerherve, E.;Demirel, N.;Ghiotto, A.;Larie, A.;Deltimple, N.;Pham, J.-M.;Mancuso, Y.;Garrec, P.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: May 2015, volume: 63, issue:5, pages: 1621 - 1632
Publisher: IEEE
 
» A Broadband High-Gain Bi-Layer LPDA for UHF Conformal Load-Bearing Antenna Structures (CLASs) Applications
Abstract:
A broadband high-gain bi-layer log-periodic dipole array (LPDA) is introduced for conformal load bearing antenna structures (CLASs) applications. Under the proposed scheme, the two layers of the LPDA are printed on two separate thin dielectric substrates which are substantially separated from each other. A meander line geometry is adapted to achieve size reduction for the array. The fabricated and tested array easily exceeds more than an octave of gain, pattern, and VSWR bandwidth.
Autors: Bishop, N.A.;Miller, J.;Zeppettella, D.;Baron, W.;Tuss, J.;Ali, M.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: May 2015, volume: 63, issue:5, pages: 2359 - 2364
Publisher: IEEE
 
» A Buffer-Aided Successive Opportunistic Relay Selection Scheme With Power Adaptation and Inter-Relay Interference Cancellation for Cooperative Diversity Systems
Abstract:
In this paper, we present a relay selection scheme which combines the spectral efficiency of successive opportunistic relaying with the robustness of single-link relay selection. More specifically, we propose a scheme that minimizes the total energy expenditure per time slot under an inter-relay interference cancellation scheme. The new relay selection policy is analyzed in terms of outage probability and diversity by modeling the evolution of relay buffers as a Markov Chain. We construct the state transition matrix of the Markov Chain and obtain its stationary distribution, which in turn, yields the outage probability. The proposed scheme outperforms relevant state-of-the-art relay selection schemes in terms of throughput, diversity, energy efficiency and average delay, as demonstrated via representative numerical examples.
Autors: Nomikos, N.;Charalambous, T.;Krikidis, I.;Skoutas, D.N.;Vouyioukas, D.;Johansson, M.;
Appeared in: IEEE Transactions on Communications
Publication date: May 2015, volume: 63, issue:5, pages: 1623 - 1634
Publisher: IEEE
 
» A Case Where Interference Does Not Affect the Channel Dispersion
Abstract:
In 1975, Carleial presented a special case of an interference channel, called the very strong interference regime, in which the interference does not reduce the capacity of the constituent point-to-point Gaussian channels. In this paper, we show that in the strictly very strong interference regime, the dispersions are similarly unaffected. More precisely, in this paper, we characterize the second-order coding rates of the Gaussian interference channel in the strictly very strong interference regime. In other words, we characterize the speed of convergence of rates of optimal block codes toward a boundary point of the (rectangular) capacity region. These second-order coding rates are expressed in terms of the average probability of error and variances of appropriately defined information densities which coincide with the dispersion of the (single-user) Gaussian channel. This allows us to conclude that the dispersions are unaffected by interference in this channel model.
Autors: Le, S.;Tan, V.Y.F.;Motani, M.;
Appeared in: IEEE Transactions on Information Theory
Publication date: May 2015, volume: 61, issue:5, pages: 2439 - 2453
Publisher: IEEE
 
» A Characterization of the Number of Subsequences Obtained via the Deletion Channel
Abstract:
Motivated by the study of deletion channels, this paper presents improved bounds on the number of subsequences obtained from a binary string of length under deletions. It is known that the number of subsequences in this setting strongly depends on the number of runs in the string ; where a run is a maximal substring of the same character. Our improved bounds are obtained by a structural analysis of the family of -run strings , an analysis in which we identify the extremal strings with respect to the number of subsequences. Specifically, for every , we present -run strings with the minimum (respectively maximum) number of subsequences under any deletions; we perform an exact analysis of the number of subsequences of these extremal strings; and show that this number can be calculated in polynomial time.
Autors: Liron, Y.;Langberg, M.;
Appeared in: IEEE Transactions on Information Theory
Publication date: May 2015, volume: 61, issue:5, pages: 2300 - 2312
Publisher: IEEE
 
» A Circuit Model of Hysteresis and Creep
Abstract:
A circuit architecture that models hysteretic phenomena is proposed. The model is flexible enough to reproduce both rate-independent hysteresis and thermal relaxation effects (creep), commonly observed in many real-world physical systems such as piezoelectric actuators. By suitably tuning the nonlinear characteristics of the resistive elements of the network, the well-known time dependence of the creep relaxation dynamics can be accurately reproduced. An identification procedure is proposed, and two test cases are discussed.
Autors: Biggio, M.;Oliveri, A.;Stellino, F.;Parodi, M.;Storace, M.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: May 2015, volume: 62, issue:5, pages: 501 - 505
Publisher: IEEE
 
» A Class of SEC-DED-DAEC Codes Derived From Orthogonal Latin Square Codes
Abstract:
Radiation-induced soft errors are a major reliability concern for memories. To ensure that memory contents are not corrupted, single error correction double error detection (SEC-DED) codes are commonly used, however, in advanced technology nodes, soft errors frequently affect more than one memory bit. Since SEC-DED codes cannot correct multiple errors, they are often combined with interleaving. Interleaving, however, impacts memory design and performance and cannot always be used in small memories. This limitation has spurred interest in codes that can correct adjacent bit errors. In particular, several SEC-DED double adjacent error correction (SEC-DED-DAEC) codes have recently been proposed. Implementing DAEC has a cost as it impacts the decoder complexity and delay. Another issue is that most of the new SEC-DED-DAEC codes miscorrect some double nonadjacent bit errors. In this brief, a new class of SEC-DED-DAEC codes is derived from orthogonal latin squares codes. The new codes significantly reduce the decoding complexity and delay. In addition, the codes do not miscorrect any double nonadjacent bit errors. The main disadvantage of the new codes is that they require a larger number of parity check bits. Therefore, they can be useful when decoding delay or complexity is critical or when miscorrection of double nonadjacent bit errors is not acceptable. The proposed codes have been implemented in Hardware Description Language and compared with some of the existing SEC-DED-DAEC codes. The results confirm the reduction in decoder delay.
Autors: Reviriego, P.;Pontarelli, S.;Evans, A.;Maestro, J.A.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 968 - 972
Publisher: IEEE
 
» A Cloud Visitation Platform to Facilitate Cloud Federation and Fog Computing
Abstract:
Evolving from hybrid clouds to true cloud federations and, ultimately, fog computing will require that cloud platforms allow for--and embrace--local hardware awareness.
Autors: Zhanikeev, Marat;
Appeared in: Computer
Publication date: May 2015, volume: 48, issue:5, pages: 80 - 83
Publisher: IEEE
 
» A CMOS Current-Mode Magnetic Hall Sensor With Integrated Front-End
Abstract:
A Hall magnetic sensor working in the current domain and its electronic interface are presented. The paper describes the physical sensor design and implementation in a standard CMOS technology, the transistor level design of its high sensitive front-end together with the sensor experimental characterization. The current-mode Hall sensor and the analog readout circuit have been fabricated using a 0.18- CMOS technology. The sensor uses the current spinning technique to compensate for the offset and provides a differential current as an output signal. The measured sensor power consumption and residual offset are 120 and 50 , respectively.
Autors: Heidari, H.;Bonizzoni, E.;Gatti, U.;Maloberti, F.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: May 2015, volume: 62, issue:5, pages: 1270 - 1278
Publisher: IEEE
 
» A CMOS Current-Steering D/A Converter With Full-Swing Output Voltage and a Quaternary Driver
Abstract:
This brief describes a CMOS current-steering digital-to-analog converter (D/A converter, DAC) with a full-swing output signal. Generally, a normal current-steering DAC cannot have a full-swing output signal because conventional DACs have an inevitable voltage drop at the output current cell. In order to improve the drawbacks, we propose a new scheme of quaternary driver and an output current cell composed of both nMOS and pMOS. First, the nMOS operates from the power supply to the half of the power supply. Second, the pMOS operates independently from the half of the power supply to the ground voltage. Then, the final output voltage is obtained through a multiplexer that is driven by a quaternary driver that selects the optimized current cell. A 6-bit 1-GS/s current-steering DAC has been fabricated with Dongbu 0.11-μm 1-poly 6-metal (1P6M) CMOS technology to verify the performance of the proposed full-swing DAC. The effective chip area is 0.46 mm2, and power consumption is about 19.1 mW. The measured results reveal that the DAC has a full-swing output signal.
Autors: Park, G.;Song, M.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: May 2015, volume: 62, issue:5, pages: 441 - 445
Publisher: IEEE
 
» A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT
Abstract:
We present an efficient combined single-path delay commutator-feedback (SDC-SDF) radix-2 pipelined fast Fourier transform architecture, which includes SDC stages, and 1 SDF stage. The SDC processing engine is proposed to achieve 100% hardware resource utilization by sharing the common arithmetic resource in the time-multiplexed approach, including both adders and multipliers. Thus, the required number of complex multipliers is reduced to , compared with for the other radix-2 SDC/SDF architectures. In addition, the proposed architecture requires roughly minimum number of complex adders and complex delay memory .
Autors: Wang, Z.;Liu, X.;He, B.;Yu, F.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 973 - 977
Publisher: IEEE
 
» A Comment on “Power Cost Reduction in Distributed Data Centers: A Two Time Scale Approach for Delay Tolerant Workloads”
Abstract:
This comment points out several mathematical errors in the proof of Therorem 3, and gives the correct expression of B3.
Autors: Weiwei Fang;Yuan Yao;Longbo Huang;Sharma, A.B.;Golubchik, L.;Neely, M.J.;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: May 2015, volume: 26, issue:5, pages: 1495 - 1496
Publisher: IEEE
 
» A Compact 77% Fractional Bandwidth CMOS Band-Pass Distributed Amplifier With Mirror-Symmetric Norton Transforms
Abstract:
This paper presents the design of a high fractional-bandwidth millimeter-wave band-pass distributed amplifier (BPDA) implemented in a 40 nm (LP) CMOS process. A high-order load impedance with multiple resonant elements is often used to realize wideband amplifiers. However, these implementations require the use of numerous inductors which occupy a prohibitively large amount of silicon area. A mirror-symmetric Norton transformation technique which reduces inductor component values for a wideband amplifier, allowing an area-efficient layout, is described in this paper. The BPDA consumes 34 mW while providing a power-gain of 7 dB from 24-to-54 GHz with less than 2 dB in-band gain-variation. The BPDA has a measured 77% fractional bandwidth, a +11 dBm in-band IIP3, and an in-band noise-figure less than 6.2 dB, while occupying an area of 0.15 mm .
Autors: Bhagavatula, V.;Taghivand, M.;Rudell, J.C.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1085 - 1093
Publisher: IEEE
 
» A Compact Dual-Band Printed Yagi-Uda Antenna for GNSS and CMMB Applications
Abstract:
A printed Yagi-Uda antenna with a meandered driven dipole and a concave parabolic reflector is proposed for dual-band operations of L1-band Global Navigation Satellite System (GNSS) and S-band China Mobile Multimedia Broadcasting (CMMB). The antenna is designed and fabricated on a thin dielectric substrate, and measured at 1580 MHz in the low band (L1-band) and 2645 MHz in the high band (S-band), respectively, with directivities of 6.7 and 4.9 dBi, front-to-back ratios of 13.1 and 10.3 dB, cross-polarization levels of and , bandwidths of 4.0% and 6.5%, and antenna efficiencies of (91.2%) and (80.2%), which are better than in terms of the three-dimensional (3-D) average gain. The occupied area of this dual-band antenna is the same as that of the previously proposed single-band one. With these properties, the proposed antenna is promising for combo applications of L1-band GNSS and S-band CMMB.
Autors: Huang, H.;Lu, J.;Hsu, P.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: May 2015, volume: 63, issue:5, pages: 2342 - 2348
Publisher: IEEE
 
» A Compact Microstrip Phase Shifter Employing Reconfigurable Defected Microstrip Structure (RDMS) for Phased Array Antennas
Abstract:
A compact phase shifter using reconfigurable defected microstrip structure (RDMS) is proposed for phased array antennas. A complete phase shifter design scheme that serves as an engineering guidance is described. Stepwise phase shifters that have phase-shifting ranges of 90° and 180° with a step size of 45° are designed, fabricated, and tested. The experimental results demonstrate that the size, maximum insertion loss of the phase shifters, and the quantity of the lumped elements are reduced by 80%–90%, 25%–30%, and 50%, respectively, compared to our previous work. Subsequently, a four-element phased array is built employing such RDMS-based phase shifters, realizing a size reduction of 55% in the array size. The measurement results show that the phased array antenna is able to switch its main beam between , 0°, and 15° in the H-plane, with the average realized gain around 10 dBi.
Autors: Ding, C.;Guo, Y.J.;Qin, P.;Yang, Y.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: May 2015, volume: 63, issue:5, pages: 1985 - 1996
Publisher: IEEE
 
» A Comparative Analysis of Adaptive Digital Predistortion Algorithms for Multiple Antenna Transmitters
Abstract:
This paper presents a comparative study of adaptive algorithms for digital predistortion (DPD) in multiple antenna transmitters. Crossover predistorter (CO-DPD) and crosstalk canceling predistorter (CTC-DPD) were proposed to overcome the deleterious effect of RF crosstalk before the power amplifiers (PA) on digital predistortion (DPD) in multiple antenna transmitters. This paper discusses the linearization performance and computational complexity of least mean square (LMS) and recursive least squares (RLS) adaptive algorithms for CO-DPD and CTC-DPD. The adaptive predistortion algorithms for a single antenna transmitter can be extended for CO-DPD, by incorporating the DPD coefficients of more than one branch in to one filter coefficient vector of the adaptive algorithm. The adaptive CTC-DPD involves predistorters for each transmitter running in parallel with the adaptive algorithms that track the coupling between the transmitters. The computational complexity of CTC-DPD is considerably lower compared to CO-DPD, as it has lesser predistorter branches. It is estimated that the number of computations needed per sample duration, for the real-time operation of the adaptive CTC-DPD is 47% lesser compared to CO-DPD for a two-antenna transmitter, when a 9th order memory polynomial with 3 memory taps was used. The linearization performances of these adaptive predistortion techniques for two and four antenna transmitters are evaluated through simulations using QPSK, 16-QAM, UMTS, and LTE signals. It is observed that CTC-DPD performs approximately identical to CO-DPD in all the examined cases. In the presence of frequency selective crosstalk, an extension of CTC-DPD which can pre-cancel such crosstalk, performs considerably better than CO-DPD, which cannot model the frequency selectivity of the crosstalk.
Autors: Suryasarman, P.M.;Springer, A.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: May 2015, volume: 62, issue:5, pages: 1412 - 1420
Publisher: IEEE
 
» A Comparative Performance Analysis of Interweave and Underlay Multi-Antenna Cognitive Radio Networks
Abstract:
In this paper, an analytical performance study for multi-antenna Cognitive Radio (CR) systems is presented. The two most popular CR approaches, namely, the interweave and underlay system designs, are considered and based on the derived analytical framework, a throughput-based comparison of these two system designs is presented. The system parameters are selected such that a quality of service (QoS) constraint on primary communication, is satisfied. Closed form expressions for the outage probability at the Primary User (PU), as well as expressions for the ergodic rate of the Secondary User (SU) are derived, for both system designs. The derived expressions are functions of key design parameters, such as the sensing time and the detection threshold in the case of interweave CR, and the maximum allowable interference power received by the PU, in the case of underlay CR. Based on the derived expressions, for interweave CR, the sensing parameters, i.e., sensing time and energy detection threshold, are optimized such as to maximize the secondary system rate. By comparing the throughput performance for both system designs, the existence of specific regimes (in terms of primary activity, number of transmit and receive antennas as well as the outage probability of the PU), where one CR approach outperforms the other, is highlighted.
Autors: Filippou, M.C.;Gesbert, D.;Ropokis, G.A.;
Appeared in: IEEE Transactions on Wireless Communications
Publication date: May 2015, volume: 14, issue:5, pages: 2911 - 2925
Publisher: IEEE
 
» A Comprehensive Study of Transistors Based on Conductive Polymer Matrix Composites
Abstract:
A comprehensive study is conducted on the electron transport in conductive polymer matrix composites (CPMCs), employing the nonequilibrium Green’s function formalism. This paper provides a microscopic insight into the electron tunneling through the potential barriers existing between conducting sites. It is shown that Wentzel–Kramers–Brillouin approximation as well as other models with simple barrier shapes, which are widely used in literature, can lead to inaccurate results in comparison with the quantum mechanical approach using a hyperbolic barrier. In this paper, unlike most previous ones, percolation-related effects are disregarded for further focus on electron transport through the polymer potential barriers. It is assumed that a tunneling-conductive channel exists between the electrodes. This can be created either by applying electric field alignment or using a filler volume fraction higher than the percolation threshold. A two electrode resistive device is studied and the results indicate that a conductor–insulator transition occurs at a barrier thickness of nm and the barrier thickness should be larger than several angstroms. Next, a novel tunneling field-effect structure based on CPMCs is introduced and its characteristics are comprehensively investigated. This device features a remarkably simple structure, an extremely high channel to gate coupling, a large transconductance, and a high current level. Besides, it has the advantage of being based on polymers. This ensures favorable physical properties, ease of fabrication, and low-cost processing techniques.
Autors: Azar, N.S.;Pourfath, M.;
Appeared in: IEEE Transactions on Electron Devices
Publication date: May 2015, volume: 62, issue:5, pages: 1584 - 1589
Publisher: IEEE
 
» A Controllable Local Peak-Shaving Strategy for Effective Utilization of PEV Battery Capacity for Distribution Network Support
Abstract:
Plug-in electric vehicles (PEVs) have a potential amount of battery energy storage capacity, which is not fully utilized in regular day-to-day travels. The utilization of spare PEV battery capacity for grid support applications using vehicle-to-grid concept is becoming popular. Depending on the stress on the grid during peak load periods, a small amount of peak-shaving support from the PEVs in a feeder can be useful in terms of grid support. However, as the PEV batteries have limited capacity and the capacity usage is also constrained by travel requirements, a strategy is proposed in this paper for an effective utilization of the available PEV battery capacity for peak shaving. A controllable discharging pattern is developed to most utilize the limited PEV battery capacity when peak shaving is most valuable based on the demand pattern. To ensure an effective use of the available PEV battery capacity for travel, which is the main usage of the PEVs, and for grid support application, dynamic adjustments in PEV discharging rates are made. The effectiveness of the proposed strategy is tested using a real distribution system in Australia and based on practical PEV data.
Autors: Alam, M.J.E.;Muttaqi, K.M.;Sutanto, D.;
Appeared in: IEEE Transactions on Industry Applications
Publication date: May 2015, volume: 51, issue:3, pages: 2030 - 2037
Publisher: IEEE
 
» A Convex Model of Risk-Based Unit Commitment for Day-Ahead Market Clearing Considering Wind Power Uncertainty
Abstract:
The integration of wind power requires the power system to be sufficiently flexible to accommodate its forecast errors. In the market clearing process, the scheduling of flexibility relies on the manner in which the wind power uncertainty is addressed in the unit commitment (UC) model. This paper presents a novel risk-based day-ahead unit commitment (RUC) model that considers the risks of the loss of load, wind curtailment and branch overflow caused by wind power uncertainty. These risks are formulated in detail using the probabilistic distributions of wind power probabilistic forecast and are considered in both the objective functions and the constraints. The RUC model is shown to be convex and is transformed into a mixed integer linear programming (MILP) problem using relaxation and piecewise linearization. The proposed RUC model is tested using a three-bus system and an IEEE RTS79 system with wind power integration. The results show that the model can dynamically schedule the spinning reserves and hold the transmission capacity margins according to the uncertainty of the wind power. A comparison between the results of the RUC, a deterministic UC and two scenario-based UC models shows that the risk modeling facilitates a strategic market clearing procedure with a reasonable computational expense.
Autors: Zhang, N.;Kang, C.;Xia, Q.;Ding, Y.;Huang, Y.;Sun, R.;Huang, J.;Bai, J.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1582 - 1592
Publisher: IEEE
 
» A Cooperative Bargaining Solution for Priority-Based Data-Rate Tuning in a Wireless Body Area Network
Abstract:
In this paper, we propose a cooperative game theoretic approach for data-rate tuning among sensors in a Wireless Body Area Network (WBAN). In a WBAN, the body sensor nodes implanted on a human body typically communicate through a capacity-constrained single channel. This is a serious concern because most applications in WBANs involve real-time data streaming and providing useful notifications and efficient feedback to the patients or other users according to their health conditions. To increase the Quality of Service (QoS), we need an efficient data-rate tuning mechanism, which tunes the data-rate of a sensor based on the criticality of health parameter measured through it. Our approach considers the unique features typical of WBAN applications, and provides a generalized solution for the problem. We propose a cooperative game theoretic approach, based on the Nash Bargaining Solution (NBS), which does not only provide priority-based tuning, but also maintains the fairness axioms of game theory. The proposed approach yields 10% average increase in data-rates for the sensor nodes that have critical physiological data to transmit. We also validate the approach through real system implementation with the help of real sensor devices such as heart rate sensor, and pulse oximeter.
Autors: Misra, S.;Moulik, S.;Chao, H.;
Appeared in: IEEE Transactions on Wireless Communications
Publication date: May 2015, volume: 14, issue:5, pages: 2769 - 2777
Publisher: IEEE
 
» A Cost–Benefit Analysis of Electric Loaders to Reduce Diesel Emissions in Underground Hard Rock Mines
Abstract:
With recent developments in understanding the adverse health effects of diesel particulate matter (DPM) and growing emphasis on sustainability, zero-emission electric vehicles are becoming an increasingly common option in underground mining systems. As exposure regulations become stricter and with potential savings in the cost of ventilation, fuel, and consumables, there is also rising economic incentive to consider alternatives to diesel machinery. As a result, the diesel–electric debate is fundamental to any underground mining company's triple bottom line. A cost–benefit analysis for electric load haul dump units (eLHDs) was conducted in the context of Western Australian underground hard rock mines. This included a review of the issues affecting the diesel–electric debate and the development of a parametric life-cycle-cost model. The results indicate that eLHDs are not yet a universal solution to all underground mining systems. eLHDs can offer lower operating costs and do contribute many qualitative benefits, particularly with respect to reduced exposure to DPM. However, they also have several drawbacks, primarily associated with trailing cable management. Nevertheless, with a suitable mine design, eLHDs are a viable option and could provide a pathway for zero-emission electric machinery in the Australian mining industry. Preamble —Western Australia is one of the world's leading mineral provinces. In the 2012–2013 financial year, Western Australia's mineral and petroleum sales totaled A$102 billion, representing some 42 of Australia's total merchandise exports. As such, changes to the Western Australian mining industry has national and international economic implications.
Autors: Jacobs, W.;Hodkiewicz, M.R.;Braunl, T.;
Appeared in: IEEE Transactions on Industry Applications
Publication date: May 2015, volume: 51, issue:3, pages: 2565 - 2573
Publisher: IEEE
 
» A Cross-Layer Watermarking-Based Mechanism for Data Aggregation Integrity in Heterogeneous WSNs
Abstract:
Ensuring data aggregation integrity introduces new challenges for data aggregation security protocols in heterogeneous wireless sensor networks. In this paper, we propose an efficient watermarking based security strategy to ensure data aggregation integrity in heterogeneous WSNs. The proposed security scheme suggests a new fragile watermarking technique based on a dynamic embedding mechanism and a cross-layer approach. Compared to the existing heterogeneous security solutions, our system respects the resources limitations of the homogenous sensor nodes and optimizes the data aggregation process on the heterogeneous aggregation nodes. The proposal is evaluated using simulation.
Autors: Boubiche, D.E.;Boubiche, S.;Bilami, A.;
Appeared in: IEEE Communications Letters
Publication date: May 2015, volume: 19, issue:5, pages: 823 - 826
Publisher: IEEE
 
» A Decision-Making Tool for Datacenter Migration
Abstract:
Cloud Computing adoption by companies has been steadily growing in recent years. In spite of this, migration to Cloud Computing, or to any other sort of IT solution, must be very carefully weighed and not depend only on ???trends???. Bearing this in mind, we proposed and tested a decision-making tool that comprises: (i) a questionnaire to probe a company real IT needs and (ii) a software routine that implements a state-machine algorithm. The questionnaire was sent to the IT managers of twenty companies and, after receiving and inputting the answers to the state-machine based routine, it has been found 52% of the companies were not using the best choice of datacenter.
Autors: Morais Melo, Marcelo;Mello Fagotto, Eric Alberto;
Appeared in: IEEE Latin America Transactions
Publication date: May 2015, volume: 13, issue:5, pages: 1446 - 1452
Publisher: IEEE
 
» A Decomposition Approach for Solving Seasonal Transmission Switching
Abstract:
Economic transmission switching has been proposed as a new control paradigm to improve the economics of electric power systems. In practice, the transmission switching operation itself is a disruptive action to the system. Frequently switching lines into or out of service can create undesirable effects on the security and reliability of power systems and may require new investments in the automation and control systems. In this paper, we formulate an economic seasonal transmission switching model where transmission switching occurs once at the beginning of a time period (season) and then the transmission topology remains unchanged during that period. The proposed seasonal transmission switching model is a large-scale mixed integer programming problem. The objective of the optimization model is to minimize the total energy generation cost over the season subject to loads and N-1 reliability requirements. We develop a novel decomposition method that decomposes the seasonal problem into one-hour problems which are then solved efficiently. We demonstrate our model and the decomposition approach on the 14-bus, 39-bus, and 118-bus power systems and show potential cost savings in each case.
Autors: Jabarnejad, M.;Wang, J.;Valenzuela, J.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1203 - 1211
Publisher: IEEE
 
» A Decomposition-Based Practical Approach to Transient Stability-Constrained Unit Commitment
Abstract:
Traditional security-constrained unit commitment (SCUC) considers only static security criteria, which may however not ensure the ability of the system to survive dynamic transition before reaching a viable operating equilibrium following a large disturbance, such as transient stability. This paper proposes a tractable mathematical model for transient stability-constrained unit commitment (TSCUC) and a practical solution approach. The problem is modeled without explicit differential-algebraic equations, reducing the problem size to one very similar to a conventional SCUC. The whole problem is decomposed into a master problem for UC and a range of subproblems for steady-state security evaluation and transient stability assessment (TSA). Additional constraints including Benders cut and so-named stabilization cut are generated for eliminating the security/stability violations. The extended equal-area criterion (EEAC) is used for fast TSA and analytically deriving the stabilization cut, wherein multiple contingencies having common instability mode can be simultaneously stabilized by one cut. The proposed approach is demonstrated on the New England 10-machine system and the IEEE 50-machine system, reporting very high computational efficiency and high-quality solutions.
Autors: Xu, Y.;Dong, Z.Y.;Zhang, R.;Xue, Y.;Hill, D.J.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1455 - 1464
Publisher: IEEE
 
» A Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-Tier Applications
Abstract:
High Efficiency Video Coding (HEVC) is the latest video coding standard that specifies video resolutions up to 8K ultra-high definition (UHD) at 120 frames/s to support the next decade of video applications. This results in high-throughput requirements for the context-adaptive binary arithmetic coding (CABAC) entropy decoder, which was already a well-known bottleneck in H.264/AVC. To address the throughput challenges, several modifications were made to CABAC during the standardization of HEVC. This paper leverages these improvements in the design of a high-throughput HEVC CABAC decoder. It also supports the high-level parallel processing tools introduced by HEVC, including tile and wavefront parallel processing. The proposed design uses a deeply pipelined architecture to achieve a high clock rate. Additional techniques such as the state prefetch logic, latched-based context memory, and separate finite state machines are applied to minimize stall cycles, while multibypass-bin decoding is used to further increase the throughput. The design is implemented in an International Business Machines 45-nm silicon on insulator process. After place and route, its operating frequency reaches 1.6 GHz. The corresponding throughputs achieve up to 1696 and 2314 Mbin/s under common and theoretical worst-case test conditions, respectively. The results show that the design is sufficient to decode in real-time high-tier video bitstreams at level 6.2 (8K UHD at 120 frames/s), or main-tier bitstreams at level 5.1 (4K UHD at 60 frames/s) for applications requiring subframe latency, such as video conferencing.
Autors: Chen, Y.;Sze, V.;
Appeared in: IEEE Transactions on Circuits and Systems for Video Technology
Publication date: May 2015, volume: 25, issue:5, pages: 856 - 868
Publisher: IEEE
 
» A Detailed Governor-Turbine Model for Heavy-Duty Gas Turbines With a Careful Scrutiny of Governor Features
Abstract:
Due to substantial use of gas turbines and their highly dynamic behavior, they have a profound impact on electrical grid. Although the control philosophies of various turbines are almost the same, there are some nuances in governor systems. As long as these details affect system response in extremely dynamic phenomena such as load rejection, they should be included in models. In this paper, the governor system is subjected to careful scrutiny; tasks of controllers are classified schematically and some special features such as back-tracing and feed-forward are discussed. The turbine is also modeled and a function is developed to calculate turbine exhaust gas temperature. The proposed governor-turbine model is validated by test results and a comparative analysis shows that the back-tracing method prevents wind-up phenomenon and the feed-forward method improves stability and response time.
Autors: Balaghi Enalou, H.;Abbasi Soreshjani, E.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1435 - 1441
Publisher: IEEE
 
» A Detector-Based Approach for the Control of Markov Jump Linear Systems With Partial Information
Abstract:
In this paper, we study the -control for discrete-time Markov Jump Linear Systems (MJLS) with partial information. We consider the case in which we do not have access to the Markov jump parameter but, instead, there is a detector that emits signals which provides information on this parameter. A salient feature of our formulation is that it encompasses, for instance, the cases with perfect information, no information and cluster observations of the Markov parameter, which were previously analyzed in the Markov jump control literature. The goal is to derive a feedback linear control using the information provided by the detector in order to stochastically stabilize the closed loop system. We present two Lyapunov like equations for the stochastic stability of the system. In addition, we show that a Linear Matrix Inequalities (LMI) formulation can be obtained in order to design a stochastically stabilizing feedback control. In the sequel we deal with the control problem and we show that, again, an LMI optimization problem can be formulated in order to design a stochastically stabilizing feedback control with guaranteed -cost. We also present two special cases, one of them always satisfied for the limit case in which the detector provides perfect information on the Markov parameter, and the Bernoulli jump case, under which LMI conditions become necessary and sufficient for the stochastic stabilizability of the system and the LMI optimization problems provide the optimal cost. For the Bernoulli jump case we show that our formulation generalizes previous ones. The case with convex polytopic uncertainty o- the parameters of the system and on the transition probability matrix is also considered. The paper is concluded with some numerical examples.
Autors: Costa, O.L.d.V.;Fragoso, M.D.;Todorov, M.G.;
Appeared in: IEEE Transactions on Automatic Control
Publication date: May 2015, volume: 60, issue:5, pages: 1219 - 1234
Publisher: IEEE
 
» A Detector-Based Approach for the Control of Markov Jump Linear Systems With Partial Information
Abstract:
In this paper, we study the H2-control for discrete-time Markov Jump Linear Systems (MJLS) with partial information. We consider the case in which we do not have access to the Markov jump parameter but, instead, there is a detector that emits signals which provides information on this parameter. A salient feature of our formulation is that it encompasses, for instance, the cases with perfect information, no information and cluster observations of the Markov parameter, which were previously analyzed in the Markov jump control literature. The goal is to derive a feedback linear control using the information provided by the detector in order to stochastically stabilize the closed loop system. We present two Lyapunov like equations for the stochastic stability of the system. In addition, we show that a Linear Matrix Inequalities (LMI) formulation can be obtained in order to design a stochastically stabilizing feedback control. In the sequel we deal with the H2 control problem and we show that, again, an LMI optimization problem can be formulated in order to design a stochastically stabilizing feedback control with guaranteed H2-cost. We also present two special cases, one of them always satisfied for the limit case in which the detector provides perfect information on the Markov parameter, and the Bernoulli jump case, under which LMI conditions become necessary and sufficient for the stochastic stabilizability of the system and the LMI optimization problems provide the optimal H2 cost. For the Bernoulli jump case we show that our formulation generalizes previous ones. The case with convex polytopic uncertainty on the parameters of the system and on the transition probability matrix is also considered. The paper is concluded with some numerical examples.
Autors: Do Valle Costa, O.L.;Fragoso, M.D.;Garcia Todorov, M.;
Appeared in: IEEE Transactions on Automatic Control
Publication date: May 2015, volume: 60, issue:5, pages: 1219 - 1234
Publisher: IEEE
 
» A Differential 2R Crosspoint RRAM Array With Zero Standby Current
Abstract:
Memory power consumption dominates mobile system energy budgets in scaled technologies. Fast nonvolatile memory devices (NVMs) offer a tremendous opportunity to eliminate memory leakage current during standby mode. Resistive random access memory (RRAM) in a crosspoint structure is considered to be one of the most promising emerging NVMs. However, the absence of access transistors puts significant challenges on the write/read operation. In this brief, we propose a differential 2R crosspoint structure with array segmentation and sense-before-write techniques. A 64-KB RRAM device is constructed and simulated in a 28/32-nm CMOS predictive technology model and a Verilog-A RRAM model. This design offers an opportunity to use RRAM as a cache for increasing energy efficiency in mobile computing.
Autors: Chiu, P.;Nikolic, B.;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: May 2015, volume: 62, issue:5, pages: 461 - 465
Publisher: IEEE
 
» A Digital-Based Virtual Voltage Reference
Abstract:
A novel virtual reference concept is introduced in this paper to design accurate, mostly digital, software-defined, process-supply-and-temperature (PVT)-independent voltage references suitable to replace conventional analog reference circuits in present day, low voltage, aggressively scaled, mainly digital integrated systems. The operation and the performance of references based on the proposed approach are tested by computer simulations and experiments carried out on a proof-of-concept, microcontroller-based prototype, reporting a measured thermal drift of 16 in a range from to 100 and a line regulation of 0.15%/V. The advantages in terms of costs and performance of the proposed digital references in comparison with state-of-the-art analog solutions are finally discussed.
Autors: Crovetti, P.S.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: May 2015, volume: 62, issue:5, pages: 1315 - 1324
Publisher: IEEE
 
» A Direct Calculation of Shift Factors Under Network Islanding
Abstract:
The outage of transmission lines, especially of multiple lines, could cause power network islanding. Traditional line outage distribution factors cannot be directly used for the power flow calculation under network islanding. This letter proposes a direct and fast two-phase method for calculating shift factors under network islanding by leveraging existing shift factors of base case (pre-contingency) network.
Autors: Fu, Y.;Li, Z.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1550 - 1551
Publisher: IEEE
 
» A Dual-Band High-Gain Resonant Cavity Antenna with a Single Layer Superstrate
Abstract:
In this communication, we present a novel design of a dual-band high-gain resonant cavity antenna (RCA) with single polarization. First of all, the theory of dual-frequency operation of conventional RCA with single superstrate is discussed. Next, we designed a feed system, for dual-band operation with single polarization and directional patterns, two T-shape slots in nonradiating edges of the microstrip patch are introduced, which serves as the feed system of the designed dual-band high-gain RCA. Then, a full-wave analysis is performed to extract the impedance matching and radiation patterns of feed system and the complete RCA. At the last, measurement results are provided to compare with the modeling and simulations results which agree reasonably well.
Autors: Meng, F.;Sharma, S.K.;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: May 2015, volume: 63, issue:5, pages: 2320 - 2325
Publisher: IEEE
 
» A Dynamic Water-Filling Method for Real-Time HVAC Load Control Based on Model Predictive Control
Abstract:
Heating ventilation and air-conditioning (HVAC) system can be viewed as elastic load to provide demand response. Existing work usually used HVAC to do the load following or load shaping based on given control signals or objectives. However, optimal external control signals may not always be available. Without such control signals, how to make a tradeoff between the fluctuation of non-renewable power generation and the limited demand response potential of the elastic load, while still guaranteeing user comfort level, is still an open problem. To solve this problem, we first model the temperature evolution process of a room and propose an approach to estimate the key parameters of the model. Second, based on the model predictive control, a centralized and a distributed algorithm are proposed to minimize the fluctuation and maximize user comfort level. In addition, we propose a dynamic water level adjustment algorithm to make the demand response always available in two directions. Extensive simulations based on practical data sets show that the proposed algorithms can effectively reduce the load fluctuation.
Autors: Zhou, K.;Cai, L.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1405 - 1414
Publisher: IEEE
 
» A Fast CU Size Decision Algorithm for the HEVC Intra Encoder
Abstract:
Intra coding plays a crucial role in the High Efficiency Video Coding (HEVC) standard. It provides the higher coding efficiency than the previous standard, H.264/Advanced Video Coding. The block partitioning in HEVC supports quad-tree-based coding unit (CU) structure from size to . The new technique provides better performances on one hand, whereas on the other hand it also increases the coding complexity. In this paper, a novel fast algorithm is proposed for the CU size decision in intra coding. Both the global and local edge complexities in horizontal, vertical, 45° diagonal, and 135° diagonal directions are proposed and used to decide the partitioning of a CU. Coupled with handling its four sub-CUs in the same way, a CU is decided to be split, nonsplit, or undetermined for each depth. Compared with the reference software HM10.0, the encoding time is reduced by % on average, with % Bjontegaard Distortion-rate increasing and reasonable peak signal-to-noise ratio losses.
Autors: Min, B.;Cheung, R.C.C.;
Appeared in: IEEE Transactions on Circuits and Systems for Video Technology
Publication date: May 2015, volume: 25, issue:5, pages: 892 - 896
Publisher: IEEE
 
» A Fast Trilateral Filter-Based Adaptive Support Weight Method for Stereo Matching
Abstract:
Adaptive support weight (ASW) methods represent the state of the art in local stereo matching, while the bilateral filter-based ASW method achieves outstanding performance. However, this method fails to resolve the ambiguity induced by nearby pixels at different disparities but with similar colors. In this paper, we introduce a novel trilateral filter (TF)-based ASW method that remedies such ambiguities by considering the possible disparity discontinuities through color discontinuity boundaries, i.e., the boundary strength between two pixels, which is measured by a local energy model. We also present a recursive TF-based ASW method whose computational complexity is for the cost aggregation step, and for boundary detection, where denotes the input image size. This complexity is thus independent of the support window size. The recursive TF-based method is a nonlocal cost aggregation strategy. The experimental evaluation on the Middlebury benchmark shows that the proposed method, whose average error rate is 4.95%, outperforms other local methods in terms of accuracy. Equally, the average runtime of the proposed TF-based cost aggregation is roughly 260 ms on a 3.4-GHz Inter Core i7 CPU, which is comparable with state-of-the-art efficiency.
Autors: Chen, D.;Ardabilian, M.;Chen, L.;
Appeared in: IEEE Transactions on Circuits and Systems for Video Technology
Publication date: May 2015, volume: 25, issue:5, pages: 730 - 743
Publisher: IEEE
 
» A Fault-Tolerant Control Strategy for Six-Phase Transverse Flux Tubular PMLM Based on Synthetic Vector Method
Abstract:
The six-phase transverse flux tubular permanent magnet linear motor (PMLM) has many advantages compared with conventional linear motors. However, the reliability of its drive system can still be influenced by power converter or machine faults. This paper presents a fault-tolerant control strategy for six-phase transverse flux tubular PMLM based on synthetic vector method when the machine has a single-phase open-circuit fault. The operation of six-phase transverse flux tubular PMLM is described as well as its basic mathematical model. Then, the principles of synthetic vector method are introduced. Based on these theories, the fault-tolerant control strategy is derived in detail under the single-phase open-fault condition. In addition, a fault-tolerant dual three-phase four-leg inverter’s drive topology that can be applied under this faulted condition is proposed. Moreover, to implement the control algorithms proposed, a modified space vector modulation is presented. Both the finite-element simulation and MATLAB/Simulink simulation results illustrate the validity of the proposed fault-tolerant control as well as the associated control topology and space vector modulation.
Autors: Xu, Y.;Yan, H.;Zou, J.;
Appeared in: IEEE Transactions on Plasma Science
Publication date: May 2015, volume: 43, issue:5, pages: 1332 - 1338
Publisher: IEEE
 
» A Flexible Dispatch Margin for Wind Integration
Abstract:
Integrating wind power into power systems contributes to existing variability in system operations. Current methods to mitigate this variability and uncertainty focus on using conventional generator ramping capability. There is also the option of using wind power itself to mitigate the variability and uncertainty that it introduces into the system. This paper introduces the concept of a flexible dispatch margin as a means for wind to participate in mitigating net variability and net uncertainty. In providing a flexible dispatch margin, wind generators under-schedule in the hour-ahead energy market in order to have additional expected flexibility available for the real-time market. The implementation of the flexible dispatch margin is analyzed in a two-stage optimization model with recourse to the flexible dispatch margin, flexible demand and generator ramping. This modeling framework combines Monte Carlo simulations with AC OPF analysis, using the IEEE 39-bus test system. Results show that use of the flexible dispatch margin decreases the reliance on peaking generators to mitigate net variability and uncertainty, and also decreases the frequency of price spike events, particularly as wind penetration increases from 10% to 30%. The analysis emphasizes the importance of increasing flexible resource capability as power system variability and uncertainty increase.
Autors: Cardell, J.B.;Anderson, C.L.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1501 - 1510
Publisher: IEEE
 
» A Flexible Platform for Biofeedback-Driven Control and Personalization of Electrical Nerve Stimulation Therapy
Abstract:
Electrical vagus nerve stimulation is a treatment alternative for many epileptic and depressed patients whose symptoms are not well managed with pharmaceutical therapy. However, the fixed stimulus, open loop dosing mechanism limits its efficacy and precludes major advances in the quality of therapy. A real-time, responsive form of vagus nerve stimulation is needed to control nerve activation according to therapeutic need. This personalized approach to therapy will improve efficacy and reduce the number and severity of side effects. We present autonomous neural control, a responsive, biofeedback-driven approach that uses the degree of measured nerve activation to control stimulus delivery. We demonstrate autonomous neural control in rats, showing that it rapidly learns how to most efficiently activate any desired proportion of vagal A, B, and/or C fibers over time. This system will maximize efficacy by minimizing patient response variability and by minimizing therapeutic failures resulting from longitudinal decreases in nerve activation with increasing durations of treatment. The value of autonomous neural control equally applies to other applications of electrical nerve stimulation.
Autors: Ward, M.P.;Qing, K.Y.;Otto, K.J.;Worth, R.M.;John, S.W.M.;Irazoqui, P.P.;
Appeared in: IEEE Transactions on Neural Systems and Rehabilitation Engineering
Publication date: May 2015, volume: 23, issue:3, pages: 475 - 484
Publisher: IEEE
 
» A Flexible Waveform Conditioning Strategy of an Air-Core Pulsed Alternator
Abstract:
As a new type of pulsed power supply, an air-core pulsed alternator concentrates all the functions of energy storage, energy conversion, and power conditioning in one machine. It is also easy to condition the output voltage and current waveforms. These advantages make it a promising compact power supply system for the electrothermal-chemical gun (ETCG). However, the use of multiphase air-core pulsed alternators as the power supply of ETCGs may give rise to problems such as generating high voltage trigger pulse and providing proper voltage and current waveforms. According to the special requirements of ETCGs, a novel circuit topology and a flexible waveform conditioning strategy of an air-core pulsed alternator were proposed. In the initial stage of the discharge process, the two-phase armature windings are connected in series to generate a high voltage pulse to ignite the capillary. The series mode does not need a high-voltage capacitor and its charger to ignite the capillary, which makes the whole system more compact. After the capillary is ignited, the two-phase armature windings are connected in parallel. Adding conditioning inductors and controlling the trigger angles can make the voltage and current waveforms more flexible. The mathematical model of the two-phase air-core pulsed alternator was established to obtain the basic relationship of the variables. Based on the mathematical model and the circuit topology, the performances of the ETCG powered by the alternator using the flexible waveform conditioning strategy were analyzed. The results indicate that with the new strategy of the air-core pulsed alternator it is feasible to provide more flexibility in pulse conditioning than with the conventional strategy.
Autors: Li, X.;Wu, S.;Cui, S.;Zhao, X.;
Appeared in: IEEE Transactions on Plasma Science
Publication date: May 2015, volume: 43, issue:5, pages: 1398 - 1404
Publisher: IEEE
 
» A Forwarded Clock Receiver Based on Injection-Locked Oscillator With AC-Coupled Clock Multiplication Unit in m CMOS
Abstract:
This brief presents a forwarded clock receiver based on an injection-locked oscillator with a simple clock multiplication unit (CMU) to reduce the clock jitter and power consumption of the CMU. In addition, an optimal clock multiplication factor is considered to optimally multiply the clock frequency without serious degradation of the jitter correlation between data and clock. The proposed CMU employs ac coupling and a superposition technique to generate first-harmonic injection pulses. The measured power efficiency of the proposed receiver is 1.69 mW/Gb/s at a 7.4-Gb/s data rate in a 1.2 V 0.13-μm CMOS process.
Autors: Young-Ju Kim;Sang-Hye Chung;Lee-Sup Kim;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 988 - 992
Publisher: IEEE
 
» A Frequency Stable Vacuum-Sealed Tube High-Power Microwave Vircator Operated at 500 Hz
Abstract:
Operation of repetitive high-power microwave (HPM) sources is predominantly limited by thermal properties of anode and cathode materials. This letter presents a reflex-triode virtual cathode oscillator (vircator) capable of operating at 500 Hz at current densities between 100–200 A/cm for multiple burst durations of 1–2 s. Stable vircator operation under such a thermally punishing environment is facilitated by the use of a thin pyrolytic graphite anode. The results presented focus on two anode–cathode (A–K) gap spacings: 11 and 21 mm, which produce stable microwave radiation at 4.6 and 1.6 GHz, respectively. Characteristic voltage, current, and microwave waveforms in conjunction with short-time Fourier transforms, frequency spectrographs, and HPM power density data for 1000 and 500 pulses at 1.6 and 4.6 GHz, respectively, are presented.
Autors: Parson, J.M.;Lynn, C.F.;Scott, M.C.;Calico, S.E.;Dickens, J.C.;Neuber, v.A.;Mankowski, J.J.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 508 - 510
Publisher: IEEE
 
» A Fully Integrated Transformer-Coupled Power Detector With 5 GHz RF PA for WLAN 802.11ac in 40 nm CMOS
Abstract:
This paper introduces a fully integrated direct power detector that monitors both RF current and RF voltage to detect the RF output power of the on-chip RF PA realized in a standard 40 nm CMOS process. The RF current measurement is realized by a sense winding in the output transformer, while the RF voltage waveform measurement is performed by capacitive division of the RF output voltage. Since the RF current and the RF voltage are both acquired, this power detector accurately and continuously determines the real output power of the RF PA with a maximum inaccuracy of ±0.5 dB over a wide 32.5 dB dynamic range. This power detector was integrated together with a 5 GHz RF PA designed for the WLAN IEEE 802.11ac communication standard. The power detector is capable of performing a RF output power measurement even for an antenna impedance mismatch up to voltage standing wave ratio (VSWR) 2.8:1 with an accuracy of ±1 dB, which allows the power detector to be used in an automatic antenna-mismatch correction system to prevent performance degradation in the RF PA. Finally, since the proposed power detector can be completely incorporated inside the RF PA output transformer. It results in zero area overhead, proving a very cost effective design.
Autors: Francois, B.;Reynaert, P.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1237 - 1250
Publisher: IEEE
 
» A Fully Integrated Wideband FM Transceiver for Low Data Rate Autonomous Systems
Abstract:
A frequency-agile FM-UWB transceiver (Tx/Rx) with full on-chip calibration aimed at low data rate autonomous wireless sensing applications is described. The subcarrier VCO, 3-phase CCO, and frequency-tripling PA in the transmit path produce a wideband, double-FM output at 10.1 dBm-pk (FCC compliant). A tunable LNA, envelope detector, limiter, and FSK demodulator comprise the receiver. Digitally programmable matching networks at the PA output and LNA input facilitate independent tuning of Tx and Rx across the 3–5 GHz band. An on-chip SAR-FLL controlling 5 DACs (3 I-DACs and 2 C-DACs) performs a full Tx/Rx calibration in less than 2 ms. Designed for continuous operation at 100 kb/s, measured Rx sensitivity is 80.5 dBm (10 BER), and average Tx/Rx energy efficiency is 6 nJ/bit. Total dissipation for the 0.9 mm IC implemented in 90 nm RF-CMOS is 630 µW in Tx and 580 µW in Rx mode from a 1 V supply.
Autors: Saputra, N.;Long, J.R.;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: May 2015, volume: 50, issue:5, pages: 1165 - 1175
Publisher: IEEE
 
» A Fully Tunable Two-Pole Bandpass Filter
Abstract:
In this letter, a two-pole tunable combline filter that allows for operational agility of the center frequency, passband bandwidth, and locations of upper and lower transmission zeros is proposed. To increase the tunable range of constant absolute-bandwidth for all frequency tuning states, a novel T-type bandwidth-control network was devised between resonators to flexibly tune the coupling coefficient without limitations imposed by the available varactor capacitance. By use of tunable source-load coupling, two tunable transmission zeros were produced on both sides of the passband to significantly improve filter selectivity and to dynamically afford interference suppression. A second-order 1.7–2.7 GHz filter with 1 dB constant bandwidth tuning from 50 to 110 MHz and transmission zero locations tuning from 300 to 700 MHz with respect to the passband was developed and fabricated. Good agreement was obtained between the simulated and experimental results.
Autors: Chi, P.-L.;Yang, T.;Tsai, T.-Y.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: May 2015, volume: 25, issue:5, pages: 292 - 294
Publisher: IEEE
 
» A Fuzzy Fault Tree Framework of Construction Dispute Negotiation Failure
Abstract:
Reaching integrated agreement has been advocated to be the optimal outcome in dispute negotiation. When this is not achieved, the outcome is suboptimal and can be technically identified as a form of failure. This study introduces a fuzzy fault tree analysis (FFTA) approach to conceptualize the root causes of construction dispute negotiation failure. The FFTA framework also enables assessment of negotiation failure occurrence likelihood. Employing the proposed framework, an empirical study was conducted. The findings suggest that construction dispute negotiation failure is highly probable and the main causes are inadequate preparation, inappropriate behavior, and contract governance. These findings inform instigation of remedial and mitigation measures to address these root causes.
Autors: Yiu, T.W.;Cheung, S.O.;Lok, C.L.;
Appeared in: IEEE Transactions on Engineering Management
Publication date: May 2015, volume: 62, issue:2, pages: 171 - 183
Publisher: IEEE
 
» A GaN-Based Insulated-Gate Photoconductive Semiconductor Switch for Ultrashort High-Power Electric Pulses
Abstract:
For monolithic realization of a traditional photoconductive semiconductor switch (PCSS) incorporating a high-voltage pulsed bias, an insulated-gate photoconductive semiconductor switch (IGPCSS) structure is proposed. The insulated-gate cells in this structure can aid the laser-triggered area to dynamically obtain a much higher bias voltage than the dc withstand voltage of a traditional PCSS. The static and the dynamic characteristics of a GaN-based IGPCSS triggered by a subbandgap laser are analyzed, and the results show that its photoelectric-conversion efficiency is twice that of a dc-charged traditional GaN-based PCSS for same triggering conditions.
Autors: Wang, X.;Mazumder, S.K.;Shi, W.;
Appeared in: IEEE Electron Device Letters
Publication date: May 2015, volume: 36, issue:5, pages: 493 - 495
Publisher: IEEE
 
» A General Digital Predistortion Architecture Using Constrained Feedback Bandwidth for Wideband Power Amplifiers
Abstract:
Digital predistortion (DPD) is one of the most effective techniques to mitigate the distortions caused by power amplifier (PA) nonlinearity and memory effects. As the input signal bandwidth increases, the required bandwidth on the DPD feedback channel becomes even larger, i.e., normally five times the signal bandwidth. However, the DPD feedback bandwidth is often restricted by the nonideal electronic components, e.g., the anti-aliasing filter and associated circuits, which therefore introduce bandwidth mismatch between the PA model basis functions and the feedback signal, and thus degrade the linearization performances of the DPD. This paper presents a general DPD architecture for wideband PA systems with constrained feedback bandwidth. By using linear operations to cancel the bandwidth mismatch between the proposed model and the PA feedback signal, the full-band PA model parameters can be estimated with bandwidth-limited observations. This estimated PA model is subsequently used with the PA input signal to extract the DPD function by applying the direct learning algorithms. The proposed DPD architecture reduces the feedback bandwidth to less than two times that of the input signal, while it maintains its linearization performance, as in the full-band case. Experiments are performed on the 20- and 100-MHz long-term evolution advanced signals to demonstrate the effectiveness of the proposed PA behavior modeling and DPD linearization performances with limited feedback bandwidth.
Autors: Liu, Y.;Pan, W.;Shao, S.;Tang, Y.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: May 2015, volume: 63, issue:5, pages: 1544 - 1555
Publisher: IEEE
 
» A General Write Channel Model for Bit-Patterned Media Recording
Abstract:
In this paper, we propose a general write channel model for bit-patterned media recording by adding physically justifiable noise and feedback to the previously studied model. First, we study the noisy writing process by discussing several sources of errors causing some extra disturbances during the write process, in addition to data-dependent write synchronization errors that were studied before. Then, for this generalized model with various input and state distributions, we obtain information rate lower and upper bounds including the previous bounds as special cases. Second, a simplified feedback in the proposed channel is considered which stems from the special features of writing, and the behavior of this channel is analyzed in response to the feedback and compared mathematically and numerically with the situation, at which the feedback is ignored.
Autors: Naseri, S.;Hodtani, G.A.;
Appeared in: IEEE Transactions on Magnetics
Publication date: May 2015, volume: 51, issue:5, pages: 1 - 12
Publisher: IEEE
 
» A Generalized Gossip Algorithm on Convex Metric Spaces
Abstract:
A consensus problem consists of a group of dynamic agents who seek to agree upon certain quantities of interest. This problem can be generalized in the context of convex metric spaces that extend the standard notion of convexity. In this paper we introduce and analyze a randomized gossip algorithm for solving the generalized consensus problem on convex metric spaces, where the communication between agents is controlled by a set of Poisson counters. We study the convergence properties of the algorithm using stochastic calculus. In particular, we show that the distances between the states of the agents converge to zero with probability one and in the mean sense. In the special case of complete connectivity and uniform Poisson counters, we give upper bounds on the dynamics of the first and second moments of the distances between the states of the agents. In addition, we introduce instances of the generalized consensus algorithm for several examples of convex metric spaces together with numerical simulations.
Autors: Matei, I.;Somarakis, C.;Baras, J.S.;
Appeared in: IEEE Transactions on Automatic Control
Publication date: May 2015, volume: 60, issue:5, pages: 1175 - 1187
Publisher: IEEE
 
» A Graph-Based Method for Detecting Rare Events: Identifying Pathologic Cells
Abstract:
Detection of outliers and anomalous behavior is a well-known problem in the data mining and statistics fields. Although the problem of identifying single outliers has been extensively studied in the literature, little effort has been devoted to detecting small groups of outliers that are similar to each other but markedly different from the entire population. Many real-world scenarios have small groups of outliers--for example, a group of students who excel in a classroom or a group of spammers in an online social network. In this article, the authors propose a novel method to solve this challenging problem that lies at the frontiers of outlier detection and clustering of similar groups. The method transforms a multidimensional dataset into a graph, applies a network metric to detect clusters, and renders a representation for visual assessment to find rare events. The authors tested the proposed method to detect pathologic cells in the biomedical science domain. The results are promising and confirm the available ground truth provided by the domain experts.
Autors: Szekely, Eniko;Sallaberry, Arnaud;Zaidi, Faraz;Poncelet, Pascal;
Appeared in: IEEE Computer Graphics and Applications
Publication date: May 2015, volume: 35, issue:3, pages: 65 - 73
Publisher: IEEE
 
» A Hardware Efficient Implementation of a Digital Baseband Receiver for High-Capacity Millimeter-Wave Radios
Abstract:
This paper presents an implementation solution for a digital baseband receiver, which consists mainly of an analog symbol timing recovery (STR) block and a digital carrier recovery block. The STR is realized based on “one-sample-per-symbol” sampling, resulting in relaxed requirement on the A/D converter’s sampling speed. In this sense, the proposed implementation solution is hardware efficient. To functionally verify the solution, a proof-of-concept E-band link system is implemented and tested in the laboratory, which supports 5-Gbit/s data traffic using 16 quadrature amplitude modulation. The test results demonstrate that the proposed solution works for high-capacity millimeter-wave radios for point-to-point links, one of the targeted applications.
Autors: He, Z.;Chen, J.;Svensson, C.;Bao, L.;Rhodin, A.;Li, Y.;An, J.;Zirath, H.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: May 2015, volume: 63, issue:5, pages: 1683 - 1692
Publisher: IEEE
 
» A Heterogeneous Multicore Crypto-Processor With Flexible Long-Word-Length Computation
Abstract:
A domain specific multicore processor for public-key cryptography is proposed in this paper. This processor provides flexible and efficient computation for various forms of RSA and ECC algorithms, fulfilling low-latency or high-throughput requirements of different application scenarios. By using a heterogeneous multicore architecture, the proposed processor enables high speed parallel implementations of kernel arithmetics of public-key algorithms. A long-word-length modular multiplication can be partitioned into parallel tasks executed by the high performance multipliers distributed in multiple cores. Some dedicated communication mechanisms minimize inter-core data transferring latencies of the processor. The proposed processor is implemented under TSMC 65 nm LP CMOS technology. Experimental results show that our design outperforms previous works based on varied platforms in performance, for instance, it can complete a 1024-bit RSA encryption in 0.087 ms at 960 MHz. Moreover, we also study the area reduction techniques for proposed multicore processor from the perspectives of algorithm, architecture, and circuit.
Autors: Han, J.;Dou, R.;Zeng, L.;Wang, S.;Yu, Z.;Zeng, X.;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: May 2015, volume: 62, issue:5, pages: 1372 - 1381
Publisher: IEEE
 
» A Hierarchical Bayesian Network-Based Approach to Keyword Auction
Abstract:
Prosperity of the online keyword auctions greatly facilitates the penetration of search-engine marketing in various industries. However, the current operation rules of the search engine make it very difficult for those inexperienced advertisers to make sound bids without the support of powerful tools. Therefore, many studies have been conducted to help advertisers understand such dynamic, infinite, and opaque auction situation, and obtain as good as possible bidding result. This paper, focusing on predicting the return on investment (ROI) of a keyword portfolio, develops a hierarchical Bayesian network (BN) model to forecast keyword auctions’ performance. Few papers directly predict the ROI of a keyword portfolio. This approach effectively echoes advertisers’ expectation for a keyword auction by choosing the right keywords and bids to achieve the desired outcome. The building blocks of the prediction model, such as bid and rank, are organized in a tree-shaped structure with a set of joint conditional probabilities. To infer the posterior probabilities of the predictors, a Bayesian parameter-learning algorithm is conducted after validating the network's structural relationships. The empirical study demonstrates that the prediction model is appropriate and effective for keyword auctions. Moreover, the proposed hierarchical BN model shows a higher accuracy than the popular prediction approach—the back-propagation artificial neural network.
Autors: Hou, L.;
Appeared in: IEEE Transactions on Engineering Management
Publication date: May 2015, volume: 62, issue:2, pages: 217 - 225
Publisher: IEEE
 
» A High-Accuracy Metric for Predicting the Power De-Rating of RF Power Amplifiers
Abstract:
Cubic metric (CM) is being recognized as a better alternative to determine the power de-rating of radio frequency power amplifiers (PAs) than peak-to-average power ratio (PAPR). However, in this letter our analysis shows that actually the CM is still inaccurate to predict the required PA power de-rating that satisfies the out-of-band radiation (OBR) requirement of a communication system. Further, by investigating the effect of the third-order nonlinearity of PA on the OBR, we propose a novel metric. Compared with PAPR and CM, the proposed metric has a strong correlation with the OBR, and thus it provides much higher accuracy in determining the required power de-rating of PAs, which is verified by extensive experimental results.
Autors: Zhang, X.;Zhu, X.;Liu, Y.;Tang, Y.;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: May 2015, volume: 25, issue:5, pages: 346 - 348
Publisher: IEEE
 
» A Highly-Scalable Analog Equalizer Using a Tunable and Current-Reusable for 10-Gb/s I/O Links
Abstract:
A 0.0015-mm -mW single-branch analog equalizer is demonstrated in 65-nm CMOS for 10-Gb/s input/output links. Instead of using passive inductors that are untunable and unscalable with technologies, gain compensation here is optimized via a tunable and current-reusable active inductor (AI). This AI incorporates a positive-feedback impedance converter with only two MOSFETs and one MOS varactor. Together with the use of: 1) negative Miller capacitors to optimize the pole-zero composition and 2) tunable resistive source degeneration to adjust the low-frequency losses, the analog equalizer recovers an eye-opening rate of minimally 30% up to 10 Gb/s over a pair of 60-cm FR4 microtrip traces. The data Pk-to-Pk jitter is <24 ps, and the RMS jitter is < ps, over a number of pseudorandom bit sequence patterns ( –1, –1, and –1).
Autors: Chen, Y.;Mak, P.;Wang, Y.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 978 - 982
Publisher: IEEE
 
» A Hybrid Cloud Approach for Secure Authorized Deduplication
Abstract:
Data deduplication is one of important data compression techniques for eliminating duplicate copies of repeating data, and has been widely used in cloud storage to reduce the amount of storage space and save bandwidth. To protect the confidentiality of sensitive data while supporting deduplication, the convergent encryption technique has been proposed to encrypt the data before outsourcing. To better protect data security, this paper makes the first attempt to formally address the problem of authorized data deduplication. Different from traditional deduplication systems, the differential privileges of users are further considered in duplicate check besides the data itself. We also present several new deduplication constructions supporting authorized duplicate check in a hybrid cloud architecture. Security analysis demonstrates that our scheme is secure in terms of the definitions specified in the proposed security model. As a proof of concept, we implement a prototype of our proposed authorized duplicate check scheme and conduct testbed experiments using our prototype. We show that our proposed authorized duplicate check scheme incurs minimal overhead compared to normal operations.
Autors: Jin Li;Yan Kit Li;Xiaofeng Chen;Lee, P.P.C.;Wenjing Lou;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: May 2015, volume: 26, issue:5, pages: 1206 - 1216
Publisher: IEEE
 
» A Hybrid LDA+gCCA Model for fMRI Data Classification and Visualization
Abstract:
Linear predictive models are applied to functional MRI (fMRI) data to estimate boundaries that predict experimental task states for scans. These boundaries are visualized as statistical parametric maps (SPMs) and range from low to high spatial reproducibility across subjects (e.g., Strother , 2004; LaConte , 2003). Such inter-subject pattern reproducibility is an essential characteristic of interpretable SPMs that generalize across subjects. Therefore, we introduce a flexible hybrid model that optimizes reproducibility by simultaneously enhancing the prediction power and reproducibility. This hybrid model is formed by a weighted summation of the optimization functions of a linear discriminate analysis (LDA) model and a generalized canonical correlation (gCCA) model (Afshin-Pour , 2012). LDA preserves the model’s ability to discriminate the fMRI scans of multiple brain states while gCCA finds a linear combination for each subject’s scans such that the estimated boundary map is reproducible. The hybrid model is implemented in a split-half resampling framework (Strother , 2010) which provides reproducibility (r) and prediction (p) quality metrics. Then the model was compared with LDA, and Gaussian Naive Bayes (GNB). For simulated fMRI data, the hybrid model outperforms the other two techniques in terms of receiver operating characteristic (ROC) curves, particularly for detecting less predictable but spatially reproducible networks. These techniques were applied to real fMRI data to estimate the maps for two task contrasts. Our results indicate that compared to LDA and GNB, the hybrid model can provide maps with large increases in reproducibility for small reductions in prediction, which are jointly closer to the ideal performance point of (p=1, r=1).
Autors: Afshin-Pour, B.;Shams, S.-M.;Strother, S.;
Appeared in: IEEE Transactions on Medical Imaging
Publication date: May 2015, volume: 34, issue:5, pages: 1031 - 1041
Publisher: IEEE
 
» A Hybrid State Estimator For Systems With Limited Number of PMUs
Abstract:
Pub DtlThis paper is concerned about effective incorporation of a limited number of phasor measurement unit (PMU) measurements into the state estimation solution in order to enhance the state tracking accuracy and speed. This is particularly important for fast changing system conditions when rapid control action may be necessary based on the onset of voltage instability due to an unexpected event. Under such conditions, SCADA-based state estimators may be too slow in capturing the changes in system state due to the low scan rates of the order of seconds. PMU measurements on the other hand provide refresh rates of milliseconds; however, they may not provide full system observability. In this work, a solution is proposed in order to address the lack of observability by the PMU measurements while maintaining fast tracking capability as well as estimation robustness against pseudo-measurement and PMU errors. Robustness is accomplished via the use of the so-called least absolute value estimator which minimizes norm of the residuals. Simulation results are provided to illustrate the expected benefits of this implementation on test systems.
Autors: Gol, M.;Abur, A.;
Appeared in: IEEE Transactions on Power Systems
Publication date: May 2015, volume: 30, issue:3, pages: 1511 - 1517
Publisher: IEEE
 
» A K-Band CMOS UWB Four-Channel Radar Front-End With Coherent Pulsed Oscillator Array
Abstract:
A K-band CMOS ultra-wideband (UWB) four-channel radar front-end based on timed-array coherent pulsed oscillators is presented. The trigger-signal delay method of the oscillator array with an additional 1-bit RF phase shifter is proposed to achieve beam-forming with wide angular coverage and high angular resolution. The phase coherency of the K-band UWB signal is achieved by using an asymmetric control of the pulsed oscillator. This allows it to detect the direction of a target as well as the accurate distance using a single antenna per channel. The chip is fabricated with CMOS technology and the chip size is 3.9 mm by 1.7 mm. The output spectrum is centered on 26.0 GHz and satisfies the Federal Communications Commission spectral mask. The system attains the angular resolution of 9 in the range from to . Total power consumption is only , mainly used in the receiver and digital blocks.
Autors: Lee, S.;Kong, S.;Kim, C.-Y.;Hong, S.;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: May 2015, volume: 63, issue:5, pages: 1735 - 1745
Publisher: IEEE
 
» A Lifetime of Learning About Electrical Safety [Electrical Safety]
Abstract:
Discusses topics relating to electrical safey, focusing on the resources available at the IEEE that identify and discuss new and innovative technologies and services in this field.
Autors: Doan, D.;
Appeared in: IEEE Industry Applications Magazine
Publication date: May 2015, volume: 21, issue:3, pages: 12 - 12
Publisher: IEEE
 
» A Lightweight Secure Scheme for Detecting Provenance Forgery and Packet DropAttacks in Wireless Sensor Networks
Abstract:
Large-scale sensor networks are deployed in numerous application domains, and the data they collect are used in decision-making for critical infrastructures. Data are streamed from multiple sources through intermediate processing nodes that aggregate information. A malicious adversary may introduce additional nodes in the network or compromise existing ones. Therefore, assuring high data trustworthiness is crucial for correct decision-making. Data provenance represents a key factor in evaluating the trustworthiness of sensor data. Provenance management for sensor networks introduces several challenging requirements, such as low energy and bandwidth consumption, efficient storage and secure transmission. In this paper, we propose a novel lightweight scheme to securely transmit provenance for sensor data. The proposed technique relies on in-packet Bloom filters to encode provenance. We introduce efficient mechanisms for provenance verification and reconstruction at the base station. In addition, we extend the secure provenance scheme with functionality to detect packet drop attacks staged by malicious data forwarding nodes. We evaluate the proposed technique both analytically and empirically, and the results prove the effectiveness and efficiency of the lightweight secure provenance scheme in detecting packet forgery and loss attacks.
Autors: Sultana, S.;Ghinita, G.;Bertino, E.;Shehab, M.;
Appeared in: IEEE Transactions on Dependable and Secure Computing
Publication date: May 2015, volume: 12, issue:3, pages: 256 - 269
Publisher: IEEE
 
» A Low-Cost Low-Power All-Digital Spread-Spectrum Clock Generator
Abstract:
In this brief, a low-cost low-power all-digital spread-spectrum clock generator (ADSSCG) is presented. The proposed ADSSCG can provide an accurate programmable spreading ratio with process, voltage, and temperature variations. To maintain the frequency stability while performing triangular modulation, the fast-relocked mechanism is proposed. The proposed fast-relocked ADSSCG is implemented in a standard performance 90-nm CMOS process, and the active area is m m. The experimental results show that the electromagnetic interference reduction is 14.61 dB with a 0.5% spreading ratio and 19.69 dB with a 2% spreading ratio at 270 MHz. The power consumption is W at 270 MHz with a 1.0 V power supply.
Autors: Chung, C.;Sheng, D.;Ho, W.;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: May 2015, volume: 23, issue:5, pages: 983 - 987
Publisher: IEEE
 
» A low-cost methodology for profiling the power consumption of network equipment
Abstract:
Rate adaptation technologies aim at establishing a linear relationship between power consumption and traffic load in packet networks. They rely on power profiles of network elements, which map system configurations and traffic loads onto power consumption levels, for the selection of network resources to place into low-power states and to identify new system designs with high power-saving yields. We introduce a methodology for profiling the power consumption of network systems that reconciles modeling accuracy with cost containment and rapidity in the preparation and execution of power measurements. We apply the methodology to network systems from multiple vendors and find it capable of delivering a clear message: the power savings enabled by protocol and system software upgrades that support demandtimescale rate adaptation are worthwhile, but also largely inferior to those attainable with a new generation of hardware platforms that pervasively deploy packet-timescale rate adaptation.
Autors: Francini, A.;Fortune, S.;Klein, T.;Ricca, M.;
Appeared in: IEEE Communications Magazine
Publication date: May 2015, volume: 53, issue:5, pages: 250 - 256
Publisher: IEEE
 

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