Electrical and Electronics Engineering publications abstract of: 01-2018 sorted by title, page: 0

» $lambda $ -Domain Optimal Bit Allocation Algorithm for High Efficiency Video Coding
Abstract:
Rate control typically involves two steps: bit allocation and bitrate control. The bit allocation step can be implemented in various fashions depending on how many levels of allocation are desired and whether or not an optimal rate–distortion (R-D) performance is pursued. The bitrate control step has a simple aim in achieving the target bitrate as precisely as possible. In our recent research, we have developed a -domain rate control algorithm that is capable of controlling the bitrate precisely for High Efficiency Video Coding (HEVC). The initial research showed that the bitrate control in the -domain can be more precise than the conventional schemes. However, the simple bit allocation scheme adopted in this initial research is unable to achieve an optimal R-D performance reflecting the inherent R-D characteristics governed by the video content. In order to achieve an optimal R-D performance, the bit allocation algorithms need to be developed taking into account the video content of a given sequence. The key issue in deriving the video-content-guided optimal bit allocation algorithm is to build a suitable R-D model to characterize the R-D behavior of the video content. In this paper, to complement the R- model developed in our initial work, a D- model is properly constructed to complete a comprehensive framework of -domain R-D analysis. Based on this comprehensive -domain R-D analysis framework, a suite of optimal bit allocation algorithms- are developed. In particular, we design both picture-level and basic-unit-level bit allocation algorithms based on the fundamental R-D optimization theory to take full advantage of the content-guided principles. The proposed algorithms are implemented in HEVC reference software, and the experimental results demonstrate that they can achieve an obvious R-D performance improvement with a smaller bitrate control error. The proposed bit allocation algorithms have already been adopted by the Joint Collaborative Team on Video Coding and integrated into the HEVC reference software.
Autors: Li Li;Bin Li;Houqiang Li;Chang Wen Chen;
Appeared in: IEEE Transactions on Circuits and Systems for Video Technology
Publication date: Jan 2018, volume: 28, issue:1, pages: 130 - 142
Publisher: IEEE
 
» $X$ -band DC–DC Power Converter for High-Speed Bit-Stream Modulation
Abstract:
This letter proposes an X-band power converter for high-speed bit-stream modulation. The converter consists of a power amplifier (PA) with pulsed load modulation, which performs highly efficient dc–ac conversion for a wide range of output powers, and a switching rectifier. Power conversion was performed in the X-band, and the potential for broad bandwidth and profile minimization was demonstrated. The PA was fabricated using a discrete gallium-nitride HEMT device and it delivered 39-dBm RF output power with 57.4% drain efficiency (DE) at 9.2 GHz under class-B conditions. At 6-dB output power back-off, 38.2% DE was measured for a 4 Gb/s data rate. The switching rectifier is designed using a class-B PA strategy to demonstrate the proposed concept. The ac–dc conversion efficiency was measured to be 44.6%, and 3.05-W dc power was delivered.
Autors: Yonghoon Song;Yuanxun Ethan Wang;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 46 - 48
Publisher: IEEE
 
» γ-Ray Radiation Effects on an HfO2-Based Resistive Memory Device
Abstract:
In this paper, electrical characteristics of an HfO2-based resistive switching memory device are investigated before and after γ-ray radiation with various total ionizing doses (TIDs). The device can still function properly even if irradiated with a TID of 20 Mrad(Si). The small changes of resistance states and set/reset voltages induced by γ-ray radiation can hardly influence the proper function of the device. The γ-ray radiation does not significantly degrade both retention and endurance characteristics even after a high-TID exposure. The radiation effects on the resistive switching memory device show little dependence on the cell area. The results suggest that the HfO2-based resistive switching memory device has good γ-ray radiation-resistant capability.
Autors: Shaogang Hu;Yang Liu;Tupei Chen;Qi Guo;Yu-Dong Li;Xing-Yao Zhang;L. J. Deng;Qi Yu;You Yin;Sumio Hosaka;
Appeared in: IEEE Transactions on Nanotechnology
Publication date: Jan 2018, volume: 17, issue:1, pages: 61 - 64
Publisher: IEEE
 
» (Perfect) Integer Codes Correcting Single Errors
Abstract:
This letter presents a class of integer codes capable of correcting single errors. Unlike Hamming codes, the presented codes are constructed with the help of a computer. Among all codes of length up to 4096 bits, a computer search has found four perfect codes: (15, 10), (63, 56), (1023, 1012), and (4095, 4082). In addition, it is shown that, for practical data lengths up to 4096 bits, the proposed codes require only one check bit more compared to Hamming codes.
Autors: Aleksandar Radonjic;
Appeared in: IEEE Communications Letters
Publication date: Jan 2018, volume: 22, issue:1, pages: 17 - 20
Publisher: IEEE
 
» 0.2-nJ/b Fast Start-Up Ultralow Power Wireless Transmitter for IoT Applications
Abstract:
Wireless transmitters (Tx) targeting Internet-of-things (IoT) applications impose tough end-to-end efficiency requirements. The frequency synthesis problem is usually solved by incorporating a variant of the phase-locked loop. However, power-hungry dividers and large loop time constants hurt the aggregated Tx power consumption and produce systems with slow start-up and turnaround times, particularly when operating at low output power. This paper demonstrates an agile ultralow power and energy-efficient transmitter architecture for IoT applications to address these concerns. The Tx leverages the characteristics of the wideband frequency-shift keying modulation and uses an openloop ring oscillator based on a vertical delay cell as its local oscillator (LO) generator. When followed by an edge-combiner-type power amplifier, the required LO operating frequency drops to one-third of the RF frequency, which further reduces the Tx power consumption. Moreover, LO frequency correction is achieved through a digitally assisted scheme with specially designed delay cells for fast frequency calibration. The Tx was fabricated in 0.18- CMOS technology and occupies an active area of 0.112 mm2. The experimental results show a Tx energy efficiency of 0.2 nJ/b for a 3-Mb/s data rate and a normalized energy efficiency of 3.1 nJ/b mW when operating at a maximum output power of −10 dBm.
Autors: Jorge Zarate-Roldan;Amr Abuellil;Mo’men Mansour;Omar Elsayed;Faisal Abdel-Latif Hussien;Ahmed Eladawy;Edgar Sánchez-Sinencio;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jan 2018, volume: 66, issue:1, pages: 259 - 272
Publisher: IEEE
 
» 1.4Gsearch/s 2-Mb/mm2 TCAM Using Two-Phase-Pre-Charge ML Sensing and Power-Grid Pre-Conditioning to Reduce Ldi/dt Power-Supply Noise by 50%
Abstract:
This paper describes two power-supply noise (Ldi/dt) management techniques implemented in a 14-nm ternary content-addressable memory (TCAM) compiler that allows a b instance to perform 1.4Gsearches/s while achieving a density of 2 Mb/mm2. This represents a 15% better performance and 10% better density than previous state-of-the-art TCAM. The first technique reduces the within-cycle noise by employing a two-phase match line (ML) pre-charge circuit which shuts off the pre-charge shoot-through current on easy-to-detect multi-bit mismatched MLs early in the cycle thereby approximately saving 60% of the ML power and reducing the within-cycle noise by 49.7%. The second technique is to reduce the multi-cycle noise by inserting targeted dummy search operations during low-current demand periods to flatten out current demand and reduce Ldi/dt noise by another 50%.
Autors: Igor Arsovski;Akhilesh Patil;Robert M. Houle;Michael T. Fragano;Ramon Rodriguez;Raymond Kim;Van Butler;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 155 - 163
Publisher: IEEE
 
» 1.5–3.3 GHz, 0.0077 mm2, 7 mW All-Digital Delay-Locked Loop With Dead-Zone Free Phase Detector in $0.13~mu text{m}$ CMOS
Abstract:
A 1.5–3.3 GHz, 7 mW, all-digital delay-locked loop (ADDLL) designed in a UMC 130-nm CMOS technology is presented in this paper. The proposed ADDLL uses the modified successive approximation register to control a NAND-based coarse delay line, which enables wider operating frequency range and small intrinsic delay. The inverter-based fine delay line is controlled by an XOR-based up/down counter with dead-zone free phase detector to overcome the dead-zone problem of conventional phase detectors. The D-type flip-flops in the phase detector are modified to detect sub-ps level delay difference between the input and output clocks, so that a delay resolution of better than 1 ps is achieved in the proposed design. The combination of both coarse and fine locking processes gives outstanding performance in terms of residual phase difference and output jitter. The overall design occupies 0.0077 mm2 area. The experimental results show that the peak-to-peak and root mean square jitters are 12 and 1.629 ps at 3.3 GHz, respectively, while the input jitter is 2.6 ps peak-to-peak and 612 fs rms.
Autors: Erkan Bayram;Ahmed Farouk Aref;Mohamed Saeed;Renato Negra;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jan 2018, volume: 65, issue:1, pages: 39 - 50
Publisher: IEEE
 
» 14-nm FinFET Technology for Analog and RF Applications
Abstract:
This paper describes the features and performance of an analog and RF device technology development on a 14-nm logic FinFET platform. An optimized single-side gate contact RF device layout shows a of 314/180 GHz and 285/140 GHz for and PFinFET device, respectively. The double-side gate contact structure with contact on either end of active gate enhances the peak performance to 227 and 195 GHz for both and PFinFET devices, respectively. A significant boost in the PFinFET RF performance is observed compared to 28-nm planar PFET, which is attributed to the source/drain SiGe epitaxy stressor that results in higher hole carrier mobility. On the other hand, the thin channel body of FinFET structure facilitates a better electrostatic control of gate over the channel region and hence suppresses short channel effects including the drain-induced barrier lowering. Consequently, a significantly higher self-gain ( and 34 for both NFinFET and PFinFET is achieved. In addition, N/PFinFETs demonstrate superior 1/f noise of 17/35 fV/Hz at 1 kHz compared to 171/106 fV/Hz of 28-nm planar N/PFETs. To extend the low-voltage operation and power saving of FinFET RF platform, ultralow N/PFinFETs in the range of 50 mV are also developed. Furthermore, a deep n-well process is added to the platform to provide device and circuit isolation from substrate and supply noise, while realizing the creation of new devices such as vertical NPN, PCAP, and high breakdown voltage deep n-well junction diodes. Overall, a superior , high self-gain, low 1/f noise, and robust substrate isolation characteristics extend the capability of this new 14-nm FinFET technology to the analog and RF circuit applications.
Autors: Jagar Singh;J. Ciavatti;K. Sundaram;J. S. Wong;A. Bandyopadhyay;X. Zhang;S. Li;A. Bellaouar;J. Watts;J. G. Lee;S. B. Samavedam;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jan 2018, volume: 65, issue:1, pages: 31 - 37
Publisher: IEEE
 
» 140 GHz High-Gain LTCC-Integrated Transmit-Array Antenna Using a Wideband SIW Aperture-Coupling Phase Delay Structure
Abstract:
This paper presents the complete design of a wideband transmit-array (TA) antenna with high gain and high efficiency for D-band applications based on the low-temperature co-fired ceramic technology. The proposed unit cell is composed of a pair of wideband magnetoelectric dipoles as the receive/transmit elements, together with a substrate-integrated waveguide (SIW) aperture-coupling transmission structure for independent phase adjustability. A 360° phase coverage is obtained by the proposed phasing element, and its phase response curves are nearly parallel within a broad frequency band, which indicates a wideband performance. To verify the design, the fabricated prototype is measured by using a vector network analyzer in a terahertz compact-range anechoic chamber. The measured peak gain is 33.45 dBi at 150 GHz with the aperture efficiency of 44.03%, and the measured 3 dB gain bandwidth is 124–158 GHz (24.29%). The good radiation performance ensures that the proposed SIW aperture-coupling TA antenna is a promising candidate for D-band applications.
Autors: Zhuo-Wei Miao;Zhang-Cheng Hao;Guo Qing Luo;Liang Gao;Jie Wang;Xiao Wang;Wei Hong;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Jan 2018, volume: 66, issue:1, pages: 182 - 190
Publisher: IEEE
 
» 15 kV-Class Implantation-Free 4H-SiC BJTs With Record High Current Gain
Abstract:
Implantation-free mesa-etched ultra-high-voltage (0.08 mm2) 4H-SiC bipolar junction transistors (BJTs) with record current gain of 139 are fabricated, measured, and analyzed by device simulation. High current gain is achieved by optimized surface passivation and optimal cell geometries. The area-optimized junction termination extension is utilized to obtain a high and stable breakdown voltage without ion implantation. The open-base blocking voltage of 15.8 kV at a leakage current density of 0.1 mA/cm2 is achieved. Different cell geometries (single finger, square, and hexagon cell geometries) are also compared.
Autors: Arash Salemi;Hossein Elahipanah;Keijo Jacobs;Carl-Mikael Zetterling;Mikael Östling;
Appeared in: IEEE Electron Device Letters
Publication date: Jan 2018, volume: 39, issue:1, pages: 63 - 66
Publisher: IEEE
 
» 15-dB Differential Link-Loss UDWDM-PON With Direct Beat Phase Modulated DFBs
Abstract:
A 15 dB differential link-loss ultra-dense wavelength division multiplexing passive optical network (UDWDM-PON) with two optical network units (ONU) spectrally spaced 6.25 GHz is experimentally implemented and tested. The ONU transmitters consist of direct phase modulated distributed feedback lasers through a digital beat signal, whose amplitude and duty cycle are optimized for maximum phase variations, avoiding the need for an analogue equalizer. We achieved receiver sensitivities of −53, −50.5, and −45 dBm for bit rates of 1.25, 2.5, and 5 Gb/s, respectively, at BER with an intradyne coherent receiver.
Autors: J. Camilo Velásquez;Iván N. Cano;Victor Polo;Marc Domingo;Josep Prat;
Appeared in: IEEE Photonics Technology Letters
Publication date: Jan 2018, volume: 30, issue:2, pages: 137 - 140
Publisher: IEEE
 
» 2- and 3-D Urban Change Detection With Quad-PolSAR Data
Abstract:
In this letter, an unsupervised 2-D and 3-D urban change detection scheme is proposed exploiting Quad-PolSAR data. Changes are extracted by segmenting the data into superpixels, to enhance the balance among change components and increase estimability of prior distributions. Positive and negative change components for built-up areas, in both the horizontal and the vertical directions, are properly extracted by assuming a multivariate Gaussian mixed model applied to a subset of polarimetric parameters at the superpixel level. The proposed method is tested on multitemporal Quad-PolSAR images and the results confirm its effectiveness. The selection of polarimetric decomposition measures that are most useful to the task is also experimentally justified.
Autors: Meiqin Che;Peijun Du;Paolo Gamba;
Appeared in: IEEE Geoscience and Remote Sensing Letters
Publication date: Jan 2018, volume: 15, issue:1, pages: 68 - 72
Publisher: IEEE
 
» 2-D Analytical Drain Current Model of Double-Gate Heterojunction TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure
Abstract:
A continuous 2-D analytical drain current model of double-gate (DG) heterojunction tunnel field-effect transistors (HJTFETs) with a SiO2/HfO2 stacked gate-oxide structures has been presented in this paper. The surface potential model has been developed by considering the effect of accumulation/inversion charges and depletion region at source/channel and drain/channel junctions. The electric field-dependent band-to-band tunneling generation rate has been derived from the surface potential model. The tangent line approximation method has been used to calculate the drain current of DG HJTFETs. The developed model is valid for all regions (subthreshold to strong accumulation/inversion region) of operation. The model has been developed for Si/Ge hetero and Si homojunction-based tunnel field-effect transistor devices. The model is also applicable for other structures such as III–V materials-based InAs/GaSb DG HJTFET and silicon-on-insulator-based HJTFET. The analytical model results are validated by 2-D ATLAS simulation data.
Autors: Sanjay Kumar;Kunal Singh;Sweta Chander;Ekta Goel;Prince Kumar Singh;Kamalaksha Baral;Balraj Singh;Satyabrata Jit;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jan 2018, volume: 65, issue:1, pages: 331 - 338
Publisher: IEEE
 
» 2.4 GHz Class- $text{F}^{-1}$ GaN Doherty Amplifier With Efficiency Enhancement Technique
Abstract:
An enhancement in the efficiency of an inverse Class F (Class Doherty power amplifier (DPA) using a proposed triple-level supply modulator (SM) is presented. A three-level SM provides a lower supply voltage at a low input voltage, while providing the maximum level beyond the power back off. By adjusting the supply voltage in terms of the magnitude of the input signal, the efficiency of the main amplifier of the DPA over a wide input range is extended. For verification, a 2.4-GHz GaN Class DPA was designed and fabricated. Using a 10 MHz 8.6 dB peak-to-average power ratio signal, at an average output power of 34.1 dBm, the fabricated Class DPA achieves an efficiency level of 49%, which is 7.1% higher than that of a conventional amplifier. Under this condition, the measured adjacent channel leakage ratio (ACLR) is below −30 dBc.
Autors: Joonhyung Kim;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 34 - 36
Publisher: IEEE
 
» 2017 General Meeting: A More Secure, Resilient, & Adaptable Grid [Society News]
Abstract:
Autors: D.F. Hall;
Appeared in: IEEE Power and Energy Magazine
Publication date: Jan 2018, volume: 16, issue:1, pages: 66 - 68
Publisher: IEEE
 
» 3-D Floating-Gate Synapse Array With Spike-Time-Dependent Plasticity
Abstract:
This paper proposes a 3-D floating-gate (FG) synapse array for neuromorphic applications. The designed device has certain advantages over previous planar FG synapse devices: a smaller cell size due to the stacked structure and smaller operation voltage by the gate-all-around geometry. In addition, the operation method to implement spike time-dependent plasticity is proposed and demonstrated. The proposed array based on commercialized flash memory technology is expected be one of the most promising candidate architecture for neuromorphic applications.
Autors: Hyun-Seok Choi;Dae-Hoon Wee;Hyungjin Kim;Sungjun Kim;Kyung-Chang Ryoo;Byung-Gook Park;Yoon Kim;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jan 2018, volume: 65, issue:1, pages: 101 - 107
Publisher: IEEE
 
» 3-D Microwave Holographic Imaging With Probe and Phase Compensations
Abstract:
A 3-D microwave holographic imaging algorithm compatible with reflection-coefficient measurement setup is proposed. It can be divided into four parts. First, starting from the open-circuit voltage of antenna, the algorithm compensates for both transmitting and receiving properties of the probe antenna, leading to antenna-independent least squares problems. However, the problems tend to be ill-conditioned. An auxiliary equation is thus derived and exploited to effectively improve the numerical stability and image quality. Third, to accurately locate the unknown target in range direction, a phase compensation method that requires only phase correction to the associated entries of the kernel matrix is proposed based on a simple ray model. Last, considering the finite size of the scanning aperture and beamwidth of the probe antenna, a numerical low-pass filter in the spatial-frequency domain is utilized to effectively locate the worth-solving area. For verification, a series of images reconstructed from the simulated and measured data using the proposed algorithm are presented. Thanks to the enhanced image quality, the geometry, location, and dielectric constant of the target can be retrieved. The range and cross-range resolutions achieved are about and , respectively.
Autors: Cheng-Hao Tsai;Jinjia Chang;Liang-Yu Ou Yang;Shih-Yuan Chen;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Jan 2018, volume: 66, issue:1, pages: 368 - 380
Publisher: IEEE
 
» 3-D Surround View for Advanced Driver Assistance Systems
Abstract:
As the primary means of transportations in modern society, the automobile is developing toward the trend of intelligence, automation, and comfort. In this paper, we propose a more immersive 3-D surround view covering the automobiles around for advanced driver assistance systems. The 3-D surround view helps drivers to become aware of the driving environment and eliminates visual blind spots. The system first uses four fish-eye lenses mounted around a vehicle to capture images. Then, according to the pattern of image acquisition, camera calibration, image stitching, and scene generation, the 3-D surround driving environment is created. To achieve the real-time and easy-to-handle performance, we only use one image to finish the camera calibration through a special designed checkerboard. Furthermore, in the process of image stitching, a 3-D ship model is built to be the supporter, where texture mapping and image fusion algorithms are utilized to preserve the real texture information. The algorithms used in this system can reduce the computational complexity and improve the stitching efficiency. The fidelity of the surround view is also improved, thereby optimizing the immersion experience of the system under the premise of preserving the information of the surroundings.
Autors: Yi Gao;Chunyu Lin;Yao Zhao;Xin Wang;Shikui Wei;Qi Huang;
Appeared in: IEEE Transactions on Intelligent Transportation Systems
Publication date: Jan 2018, volume: 19, issue:1, pages: 320 - 328
Publisher: IEEE
 
» 4 strange new ways to compute [News]
Abstract:
With Moore's Law slowing down, engineers have been taking a hard look at what will keep computing going when the law is no more. Certainly, artificial intelligence will play a role. So might quantum computing. But there are stranger things in the computing universe, and some of them got an airing at the IEEE International Conference on Rebooting Computing, in November. There were cool variations on classics such as reversible computing and neuromorphic chips. Less-familiar concepts got their time in the sun, too, such as photonics chips that accelerate artificial intelligence, nanomechanical comb-shaped logic, and a "hyperdimensional" speech recognition system. What follows includes a taste of both the strange and the potentially powerful.
Autors: Samuel K. Moore;
Appeared in: IEEE Spectrum
Publication date: Jan 2018, volume: 55, issue:1, pages: 10 - 11
Publisher: IEEE
 
» 4.32-pJ/b, Overlap-Free, Feedforward Edge-Combiner-Based Ultra-Wideband Transmitter for High-Channel-Count Neural Recording
Abstract:
We present an ultralow-power, ultra-wideband (UWB) transmitter (TX) in standard 65-nm CMOS processes. The TX consists of feedforward edge combiners and interpolators for ultralow-power operation and reliable pulse generation that is essential in UWB TXs. The implemented circuit avoids pulse overlapping without complicated calibrations and has achieved an energy efficiency of 4.32 pJ/b at 200-Mbps data rate. The TX is suitable for energy-constraint, high-data-rate applications such as wireless telemetry in implantable high-density neural recording interfaces.
Autors: Yu-Ju Lin;Sung-Yun Park;Xing Chen;David Wentzloff;Euisik Yoon;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 52 - 54
Publisher: IEEE
 
» 5G goes for the gold
Abstract:
Welcome to the 5G Olympics, where Nathan Chen, the 18-year-old figure-skating phenom, has just landed another quadruple jump. Can't see him well from your seat in the nosebleed section? No problem. Just slip on your 5G virtual reality headset for a 360-degree rink-side view! Now watch your step-we're boarding the 5G bus to the next attraction. Check out the windows: They're in fact transparent display screens providing ultrahigh-definition video—streamed live—from a hockey player's headcam, from drones flying above the ski slopes, and from the cockpit of a bobsled barreling down an icy track at 100...0...0 kilometers per hour!
Autors: Ariel Bleicher;
Appeared in: IEEE Spectrum
Publication date: Jan 2018, volume: 55, issue:1, pages: 32 - 33
Publisher: IEEE
 
» In Vitro Evaluation of an Injectable EEG/ECG Sensor for Wireless Monitoring of Hibernation in Endangered Animal Species
Abstract:
Hibernation is a unique metabolic adaptation employed by several animal species for survival where its study would further enhance our understanding of metabolic disorders, such as diabetes and obesity. As a primate animal with close genetic ties to humans, the recent discovery of hibernation in dwarf lemurs of Madagascar has attracted the attention of researchers. Traditional recording systems require the physical tethering of the animals to the recording apparatus or the use of implantable devices. Scalp and needle electrodes interfere with the natural hibernation process and limit the continuity of the experiments, while invasive procedures are banned on endangered species. By integrating a full-wave rectifier, low-noise signal conditioning circuit, frequency modulation transmitter, and antenna in a single application specific integrated circuit (ASIC), we have developed an ultra-miniaturized wireless system that measures mm3 in volume. It only requires three off-chip components (a coil wound around a ferrite rod and two external capacitors) to be powered wirelessly through a 1-MHz inductive link, such that it can be packaged inside a glass or polymer capsule and injected subcutaneously underneath the scalp or chest without requiring a surgery, thereby addressing the shortcomings of the traditional monitoring systems. Our recording device provides an input/output correlation coefficient greater than 80% for input amplitudes ranging from 60 to 260 , with a wireless data transmission range of ~2.5 cm while operating near the 902–928 MHz ISM frequency band. This system would enable future studies of electroencephalography and electrocardiography in hibernating dwarf lemurs. The ASIC was fabricated using the O- Semiconductor 0.5- CMOS process with an active area of 2.5 1 mm2 and has a power consumption of 7.75 mW from a 3.1 V supply. In this paper, we demonstrate the in vitro functionality of the system using simulated physiological signals directly applied to the ASIC or through standard stainless steel electrodes immersed in saline solution.
Autors: Jose Manuel Valero-Sarmiento;James Reynolds;Andrew Krystal;Alper Bozkurt;
Appeared in: IEEE Sensors Journal
Publication date: Jan 2018, volume: 18, issue:2, pages: 798 - 808
Publisher: IEEE
 
» In Vivo Superresolution Imaging of Neuronal Structure in the Mouse Brain
Abstract:
Objective: this study proposes and evaluates a technique for in vivo deep-tissue superresolution imaging in the light-scattering mouse brain at up to a 3.5 Hz 2-D imaging rate with a 21×21 μm2 field of view. Methods: we combine the deep-tissue penetration and high imaging speed of resonant laser scanning two-photon (2P) microscopy with the superresolution ability of patterned excitation microscopy. Using high-frequency intensity modulation of the scanned two-photon excitation beam, we generate patterned illumination at the imaging plane. Using the principles of structured illumination, the high-frequency components in the collected images are then used to reconstruct images with an approximate twofold increase in optical resolution. Results: using our technique, resonant 2P superresolution patterned excitation reconstruction microscopy, we demonstrate our ability to investigate nanoscopic neuronal architecture in the cerebral cortex of the mouse brain at a depth of 120 μm in vivo and 210 μm ex vivo with a resolution of 119 nm. This technique optimizes the combination of speed and depth for improved in vivo imaging in the rodent neocortex. Conclusion: this study demonstrates a potentially useful technique for superresolution in vivo investigations in the rodent brain in deep tissue, creating a platform for investigating nanoscopic neuronal dynamics. Significance : this technique optimizes the combination of speed and depth for improved superresolution in vivo imaging in the rodent neocortex.
Autors: Ben Ewell Urban;Lei Xiao;Siyu Chen;Huili Yang;Biqin Dong;Yevgenia Kozorovitskiy;Hao F. Zhang;
Appeared in: IEEE Transactions on Biomedical Engineering
Publication date: Jan 2018, volume: 65, issue:1, pages: 232 - 238
Publisher: IEEE
 
» PhLock: A Cache Energy Saving Technique Using Phase-Based Cache Locking
Abstract:
Caches are commonly used to bridge the processor-memory performance gap in embedded systems. Since embedded systems typically have stringent design constraints imposed by physical size, battery capacity, and real-time deadlines much research focuses on cache optimizations, such as improved performance and/or reduced energy consumption. Cache locking is a popular cache optimization that loads and retains/locks selected memory contents from an executing application into the cache to increase the cache’s predictability. Previous work has shown that cache locking also has the potential to improve cache energy consumption. In this paper, we introduce phase-based cache locking, PhLock, which leverages an application’s varying runtime characteristics to dynamically select the locked memory contents to optimize cache energy consumption. Using a variety of applications from the SPEC2006 and MiBench benchmark suites, experimental results show that PhLock is promising for reducing both the instruction and data caches’ energy consumption. As compared to a nonlocking cache, PhLock reduced the instruction and data cache energy consumption by an average of 5% and 39%, respectively, for SPEC2006 applications, and by 75% and 14%, respectively, for MiBench benchmarks.
Autors: Tosiron Adegbija;Ann Gordon-Ross;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Jan 2018, volume: 26, issue:1, pages: 110 - 121
Publisher: IEEE
 
» Post Hoc Analysis of Passive Cavitation Imaging for Classification of Histotripsy-Induced Liquefaction in Vitro
Abstract:
Histotripsy utilizes focused ultrasound to generate bubble clouds for transcutaneous tissue liquefaction. Bubble activity maps are under development to provide image guidance and monitor treatment progress. The aim of this paper was to investigate the feasibility of using plane wave B-mode and passive cavitation images to be used as binary classifiers of histotripsy-induced liquefaction. Prostate tissue phantoms were exposed to histotripsy pulses over a range of pulse durations (5–) and peak negative pressures (12–23 MPa). Acoustic emissions were recorded during the insonation and beamformed to form passive cavitation images. Plane wave B-mode images were acquired following the insonation to detect the hyperechoic bubble cloud. Phantom samples were sectioned and stained to delineate the liquefaction zone. Correlation between passive cavitation and plane wave B-mode images and the liquefaction zone was assessed using receiver operating characteristic (ROC) curve analysis. Liquefaction of the phantom was observed for all the insonation conditions. The area under the ROC (0.94 versus 0.82), accuracy (0.90 versus 0.83), and sensitivity (0.81 versus 0.49) was greater for passive cavitation images relative to B-mode images () along the azimuth of the liquefaction zone. The specificity was greater than 0.9 for both imaging modalities. These results demonstrate a stronger correlation between histotripsy-induced liquefaction and passive cavitation imaging compared with the plane wave B-mode imaging, albeit with limited passive cavitation image range resolution.
Autors: Kenneth B. Bader;Kevin J. Haworth;Adam D. Maxwell;Christy K. Holland;
Appeared in: IEEE Transactions on Medical Imaging
Publication date: Jan 2018, volume: 37, issue:1, pages: 106 - 115
Publisher: IEEE
 
» SparseLeap: Efficient Empty Space Skipping for Large-Scale Volume Rendering
Abstract:
Recent advances in data acquisition produce volume data of very high resolution and large size, such as terabyte-sized microscopy volumes. These data often contain many fine and intricate structures, which pose huge challenges for volume rendering, and make it particularly important to efficiently skip empty space. This paper addresses two major challenges: (1) The complexity of large volumes containing fine structures often leads to highly fragmented space subdivisions that make empty regions hard to skip efficiently. (2) The classification of space into empty and non-empty regions changes frequently, because the user or the evaluation of an interactive query activate a different set of objects, which makes it unfeasible to pre-compute a well-adapted space subdivision. We describe the novel SparseLeap method for efficient empty space skipping in very large volumes, even around fine structures. The main performance characteristic of SparseLeap is that it moves the major cost of empty space skipping out of the ray-casting stage. We achieve this via a hybrid strategy that balances the computational load between determining empty ray segments in a rasterization (object-order) stage, and sampling non-empty volume data in the ray-casting (image-order) stage. Before ray-casting, we exploit the fast hardware rasterization of GPUs to create a ray segment list for each pixel, which identifies non-empty regions along the ray. The ray-casting stage then leaps over empty space without hierarchy traversal. Ray segment lists are created by rasterizing a set of fine-grained, view-independent bounding boxes. Frame coherence is exploited by re-using the same bounding boxes unless the set of active objects changes. We show that SparseLeap scales better to large, sparse data than standard octree empty space skipping.
Autors: Markus Hadwiger;Ali K. Al-Awami;Johanna Beyer;Marco Agus;Hanspeter Pfister;
Appeared in: IEEE Transactions on Visualization and Computer Graphics
Publication date: Jan 2018, volume: 24, issue:1, pages: 974 - 983
Publisher: IEEE
 
» X-Band Microwave Absorbing Properties of Epoxy Resin Composites Containing Magnetized PANI-Coated Magnetite
Abstract:
Magnetized (PANI-coated Fe3O4) epoxy resin was synthesized to produce -band microwave absorbing structures (MASs) with tuning thickness and fillers ratio. The structure and crystallinity of materials were checked by SEM and X-ray diffraction. It was found that the thickness, amount, and ratio of magnetized PANI-coated Fe3O4 affect the microwave absorption properties. Single layer MAS with 3 mm showed a reflection loss (RL) of −54 dB at 8.73 GHz and −41 dB at 9.52 GHz. However, a double-layer absorber based on 0.9 mm of the matching layer of PANI and the absorbing layer of magnetized (PANI-coated Fe3O4) epoxy resin composite with a thickness of 1.8 mm show a minimum RL value of −38 dB at 9.82 GHz and an absorption bandwidth of about 3.55 GHz with RL below −10 dB. In addition, by rising thicknesses the RL peak shift to lower frequency. A materials prepared with thin double-layer structure have a high absorption performances and broader bandwidth in -band.
Autors: Belkacem Belaabed;Saad Lamouri;Jean Luc Wojkiewicz;
Appeared in: IEEE Transactions on Magnetics
Publication date: Jan 2018, volume: 54, issue:1, pages: 1 - 8
Publisher: IEEE
 
» A $V$ -band 90-nm CMOS Divide-by-10 Injection-Locked Frequency Divider Using Current-Reused Topology
Abstract:
A -band 90-nm CMOS divide-by-10 injection-locked frequency divider (ILFD) is proposed using current-reused topology in this letter. The proposed circuit is composed of a divide-by-5 ILFD and a source injection current-mode logic (SICML) divide-by-2 frequency divider. The cascoded topology of SICML and ILFD is employed to reduce dc power consumption and increase frequency division ratio. With an input power of 0 dBm, the measured maximum locking range (LR) is 5 GHz from 60.3 to 65.3 GHz. Compared with the reported CMOS microwave and millimeter-wave ILFDs, the proposed ILFD features wide LR, good sensitivity, and a high division ratio of up to ten.
Autors: Shen-Ming Li;Han-Nong Yeh;Hong-Yeh Chang;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 76 - 78
Publisher: IEEE
 
» A 0.55-V, 28-ppm/°C, 83-nW CMOS Sub-BGR With UltraLow Power Curvature Compensation
Abstract:
This paper proposes an ultralow power, high precision sub bandgap voltage reference (sub-BGR) for low-voltage self-powered devices. A novel ultralow power curvature compensation circuit is proposed to improve the temperature coefficient over a wide temperature range. A switch capacitor voltage divider with improved leakage current reduction switches is used to obtain a high accuracy and a low power. To minimize the clock feedthrough and charge injection in the switches, a clock scaling down circuit is proposed, that effectively improves the line sensitivity (LS) of the sub-BGR. The proposed sub-BGR is implemented in a 0.18- standard CMOS process with a total area of 0.061 mm2. After measuring 30 chips, the average power consumption is 83 nW at 0.55 V of supply at 27 °C. In the supply voltage range of 0.55 to 1 V, the LS is 0.059%/V, and the error is ±0.75% () after trimming.
Autors: Lianxi Liu;Junchao Mu;Zhangming Zhu;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jan 2018, volume: 65, issue:1, pages: 95 - 106
Publisher: IEEE
 
» A 0.7–2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver
Abstract:
This paper describes a four-element multiple-input multiple-output (MIMO) transmitter (TX) system that features an analog spatial de-interleaver to simplify the baseband-input complexity and increase the spatial matching of the sub-TXs. The MIMO diversity gain and power-combining gain are jointly exploited to relax the output power of the four power amplifiers and eliminate their output matching networks, leading to a compact implementation of the entire TX system. The MIMO effectiveness is improved by introducing an radio-frequency to baseband dc feedback technique that enhances the matching among the sub-TXs against process variation. In the verification, the TX system is co-designed with a compact antenna array-on-PCB that generates a null zone in the propagation pattern, and the electric-field polarization angle, to achieve diversity propagation. All techniques together improve the signal-to-noise ratio or data rate by generating multiple data streams according to the signal power arriving at the receiver over different fading channels. The four-element TX chip fabricated in 65-nm CMOS occupies a die area of 1.44 mm2. It covers an RF range of 0.7–2.5 GHz, and shows an equivalent isotropically radiated power of 23.9 dBm. When transmitting a 20-MHz 64-QAM orthogonal frequency division multiplexing signal at 2.3 GHz, the average system efficiency is 61% and error-vector magnitude is −26 dB.
Autors: Wei-Han Yu;Ka-Fai Un;Pui-In Mak;Rui P. Martins;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jan 2018, volume: 65, issue:1, pages: 14 - 25
Publisher: IEEE
 
» A 1-V 10-Gb/s/pin Single-Ended Transceiver With Controllable Active-Inductor-Based Driver and Adaptively Calibrated Cascaded-Equalizer for Post-LPDDR4 Interfaces
Abstract:
A 1-V 10-Gb/s/pin single-ended transceiver with a controllable active inductor-based output driver and adaptively calibrated cascaded-equalizer with infinite impulse response and finite impulse response filters for a post-LPDDR4 interface in a 65-nm CMOS technology is proposed. The proposed cascaded-equalizer removes the received long-tail inter symbol interference with the help of an IIR filter while the coefficients for the cascaded-equalizer are adaptively calibrated. In addition, the received single-ended ground-terminated data are converted to the differential pair by the proposed input buffer using a calibrated reference voltage. In the transmitter (TX), an output driver with controllable active inductors is proposed to reduce both power consumption and design complexity. At the maximum operating data rate, the measured power efficiencies of TX and receiver are 1.16 and 3.02 pJ/b, respectively, excluding the power dissipation of internal phase locked loop. In addition, the overall active area is 0.0091 mm2.
Autors: Junyoung Song;Sewook Hwang;Hyun-Woo Lee;Chulwoo Kim;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jan 2018, volume: 65, issue:1, pages: 331 - 342
Publisher: IEEE
 
» A 1.8-V 6.9-mW 120-fps 50-Channel Capacitive Touch Readout With Current Conveyor AFE and Current-Driven $Delta Sigma $ ADC
Abstract:
This paper presents an area- and energy-efficient readout for capacitive touch sensors. An analog front end (AFE) with current conveyor mitigates the requirements of front-end opamp and provides a differential current from adjacent channels, removing sensor’s baseline and interferences. The sensing current from the AFE is directly digitized by a current-driven 2nd-order analog-to-digital converter and its direct interfacing with the current signal achieves high signal-to-noise ratio (SNR) without suffering voltage saturation in the AFE, and provides reconfigurable SNRs and frame rates with respect to oversampling ratio. An area-efficient sinc2 filter, whose filter coefficients are commonly provided, enables full parallel implementation of ADCs. A 50-channel prototype IC is fabricated in a 0.18- CMOS process, occupying only 1.96 mm2. Using a 10.1-in touch screen panel and a 3.3-V transmitter, this work achieves SNRs of 53.3 and 41.7 dB with finger and 1-mm- stylus, respectively, while drawing only 6.9 mW from 1.8-V supply at 120 fps. This results in the state-of-the-art figure-of-merit of 0.11 and 0.41 nJ/step for finger and 1-mm- stylus, respectively. Moreover, 500-dpi on-glass fingerprint sensor is verified with the same prototype IC and 15-V transmitter, and fingerprint image is successfully captured with 150- cover glass.
Autors: Hyunseok Hwang;Hyeyeon Lee;Myungjin Han;Hongchae Kim;Youngcheol Chae;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 204 - 218
Publisher: IEEE
 
» A 1.8e $^{-}_{mathrm {rms}} $ Temporal Noise Over 110-dB-Dynamic Range 3.4 $mu text{m}$ Pixel Pitch Global-Shutter CMOS Image Sensor With Dual-Gain Amplifiers SS-ADC, Light Guide Structure, and Multiple-Accumulation Shutter
Abstract:
A 1.8e temporal noise over 110 dB dynamic range 3.4 pixel pitch global shutter (GS) CMOS image sensor (CIS) single-slope analog digital converters (ADCs) with dual-gain amplifier (SSDG-ADC), light guide (LG) structure, and multiple-accumulation shutter has been developed for various accuracy required applications. The newly developed CIS pixel achieves low noise, high saturation, high sensitivity, and high frame rate with seamless GS function. Low noise, high saturation, and high frame rate are realized by small photodiode, large charge-domain memory, and seamless multiple-accumulation readout procedure with SSDG-ADC. Furthermore, high sensitivity is realized by the optimized shape LG structure. The GS CIS is fabricated in a 130 nm 1Poly-Si 4Metal with light shield CMOS process. This image sensor achieves 1.8e temporal noise, 16 200e full-well capacity with 60 fps multiple-accumulation and 28 000e/lx sensitivity. This image sensor also realizes high-dynamic range readout procedure and in-pixel coded exposure for deblurred images. We also describe the examination results about the relationship of the sensitivity, parasitic light sensitivity, and LG structure.
Autors: Masahiro Kobayashi;Yusuke Onuki;Kazunari Kawabata;Hiroshi Sekine;Toshiki Tsuboi;Takashi Muto;Takeshi Akiyama;Yasushi Matsuno;Hidekazu Takahashi;Toru Koizumi;Katsuhito Sakurai;Hiroshi Yuzurihara;Shunsuke Inoue;Takeshi Ichikawa;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 219 - 228
Publisher: IEEE
 
» A 173 GHz Amplifier With a 18.5 dB Power Gain in a 130 nm SiGe Process: A Systematic Design of High-Gain Amplifiers Above $f_{max }/2$
Abstract:
A novel theory of stability for two-port networks is developed. Using this theory, a new method of designing amplifiers with a high-power gain working close to the maximum frequency of oscillation () is proposed. Contrary to the existing amplifier design methodologies, in this method, the transistor capability of power amplification is fully utilized. This becomes more important at frequencies close to the where having a high-power gain is challenging due to the degraded activity of the employed device. The proposed method considers the modeling errors and process–voltage–temperature variations of the employed components in the design stage to ensure that the fabricated amplifier will be stable with a decent power gain even if the worst case variations and modeling errors happen. To show the feasibility of the proposed approach, a three-stage amplifier at 173 GHz, using bipolar junction transistors from a 130 nm SiGe process, is designed. The fabricated amplifier has a maximum measured power gain of 18.5 dB at 173 GHz. A similar three-stage amplifier using the same transistors with the same bias would give a maximum gain of 6.8 dB in simulation, assuming perfect lossless conjugate matching at input, output, and between stages. So it is clear that the fabricated amplifier achieves a significant improvement over the power gain.
Autors: Hamid Khatibi;Somayeh Khiyabani;Ehsan Afshari;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jan 2018, volume: 66, issue:1, pages: 201 - 214
Publisher: IEEE
 
» A 1920 $times $ 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles
Abstract:
This paper presents a single-chip, high-performance, and energy-efficient stereo vision depth-estimation processor for micro aerial vehicles (MAVs). The proposed processor implements the state-of-the-art semi-global matching (SGM) algorithm to deliver full high-definition (HD, 1920 1080) stereo-depth outputs with a maximum of 38 frames/s throughput. Algorithm-architecture co-optimization is conducted, introducing overlapping block-based processing that eliminates very large on-chip memory and off-chip DRAM. We exploit inherent data parallelism in the algorithm by processing 128 local disparity costs and aggregating the SGM costs along four paths for all 128 disparities in parallel. A dependence-resolving scan associated with 16-stage deep pipeline is introduced to hide the data dependence between neighboring pixels in the SGM algorithm. Moreover, we propose a customized ultra-high bandwidth dual-port SRAM that utilizes the unique memory access characteristic of SGM to achieve highly energy-efficient memory access at a very high on-chip memory bandwidth of 1.64 Tb/s. The fabricated processor produces 512 levels of depth information for each pixel at full HD resolution with 30-frames/s performance, consuming 836 mW from a 0.75-V supply in TSMC 40-nm GP CMOS. We ported the design on a quadcopter MAV to demonstrate its performance in realistic real-time flight.
Autors: Ziyun Li;Qing Dong;Mehdi Saligane;Benjamin Kempke;Luyao Gong;Zhengya Zhang;Ronald Dreslinski;Dennis Sylvester;David Blaauw;Hun-Seok Kim;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 76 - 90
Publisher: IEEE
 
» A 2- $mu text{s}$ Fast-Response Step-Up Converter With Efficiency-Enhancement Techniques Suitable for Cluster-Based Wireless Sensor Networks
Abstract:
A new step-up (boost) converter with fast-response and efficiency-enhancement techniques suitable for cluster-based wireless sensor networks is presented in this paper. First, the modified nonoverlapping clock generator can produce four proper switching clocks to prevent four power transistors to be turned on simultaneously. Second, the size of the power transistor is adaptively changed by the width controller according to the different load current. Third, the zero-current detector is used to prevent the reverse inductor current at light load. Fourth, the converter efficiency can be raised by efficiency enhancement techniques. On top of that, this converter retains fast transient response at any load variation. The proposed boost converter has been implemented with a TSMC 0.35- 2P4M CMOS 3.3/5 V process. The experimental results show that the proposed boost converter’s transient responses are for raising/falling time and the high efficiency is 93.8%.
Autors: Yuh-Shyan Hwang;Jiann-Jong Chen;Rong-Lian Shih;Yi-Tsen Ku;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Jan 2018, volume: 26, issue:1, pages: 216 - 220
Publisher: IEEE
 
» A 2.1-Mpixel Organic Film-Stacked RGB-IR Image Sensor With Electrically Controllable IR Sensitivity
Abstract:
This paper describes an RGB-infrared (IR) organic CMOS image sensor with electrically controllable IR sensitivity. The sensitivities of all the pixels in the image sensor, which has the structure of two directly stacked organic layers with a high resistance ratio, are simultaneously controlled by changing the applied voltage to the organic films. The fabricated image sensor, with a pixel pitch of , has 2.1 Mpixels (1920 1080) in both the RGB and IR regions. The sensor can switch between color imaging and IR imaging modes frame by frame without requiring a mechanically retractable IR-cut filter.
Autors: Shin’ichi Machida;Sanshiro Shishido;Takeyoshi Tokuhara;Masaaki Yanagida;Takayoshi Yamada;Masumi Izuchi;Yoshiaki Sato;Yasuo Miyake;Manabu Nakata;Masashi Murakami;Mitsuru Harada;Yasunori Inoue;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 229 - 235
Publisher: IEEE
 
» A 27 $mu text{W}$ 0.06 mm2 Background Resonance Frequency Tuning Circuit Based on Noise Observation for a 1.71 mW CT- $Delta Sigma $ MEMS Gyroscope Readout System With 0.9 °/h Bias Instability
Abstract:
This paper presents the implementation of a bandpass filter tuning circuit solely based on noise observation for a continuous-time (CT) delta–sigma modulator gyroscope readout system. By evaluating the noise at the electronic filter input, a filter frequency deviation of less than 50 Hz or approximately 0.5% of the gyroscope’s drive resonance frequency is achieved, which minimizes the angular rate noise floor. The automatic tuning works in the background during normal angular rate readout with input signals up to the full scale, over a temperature range of 115 °C, and with interference signals of up to −27.2 dBFS. The power (27 ) and area (0.06 mm2) overhead to the overall system is less than 2%. The overall CT readout system achieves a noise floor of 0.002 °/s/ and a bias instability of 0.9 °/h while consuming only 1.71 mW.
Autors: Maximilian Marx;Daniel De Dorigo;Sebastian Nessler;Stefan Rombach;Yiannos Manoli;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 174 - 186
Publisher: IEEE
 
» A 280-/300-GHz Three-Stage Amplifiers in 65-nm CMOS With 12-/9-dB Gain and 1.6/1.4% PAE While Dissipating 17.9 mW
Abstract:
This letter reports the design of terahertz amplifiers using the concept of maximum achievable gain ( of a transistor embedded in a linear, lossless, reciprocal network. Implemented in a 65-nm CMOS, by adopting the optimized -core, 280- and 300-GHz amplifiers achieve peak gain of 12 and 9 dB, peak power-added efficiency (PAE) of 1.6% and 1.4%, and gain per stage of 4 and 3 dB, respectively, while dissipating 17.9 mW, which is the best performance up to date in terms of operating frequency, gain per stage, and PAE in CMOS process.
Autors: Dae-Woong Park;Dzuhri Radityo Utomo;Bao Huu Lam;Jong-Phil Hong;Sang-Gug Lee;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 79 - 81
Publisher: IEEE
 
» A 3-D Positioning Algorithm for AOA-Based VLP With an Aperture-Based Receiver
Abstract:
We consider a visible light positioning system using modulated LEDs at the transmitter and photodiodes (PDs) combined with apertures at the receiver. The layout of the aperture-based receiver is designed in order to have angular diversity, implying it can detect the direction from which light is coming, by simply comparing the relative differences in received signal strength values in the different PDs. Hence, with this receiver, it is possible to extract the angle-of-arrival (AOA) of the light without needing the knowledge of the transmitted optical power. In this paper, we consider an algorithm, based on the maximum likelihood (ML) principle, to estimate the AOA, and obtain the position of the receiver in 3-D through triangulation. The ML algorithm, of which the practical implementation searches for the optimal value of the AOA starting from an initial estimate, suffers from convergence problems if the initial estimate is too far from the true AOA. Hence, we propose an initial low-complexity coarse estimation algorithm for the AOA, and make the algorithm iterative, where in each iteration, the initial estimate for the AOA is updated based on the previous position estimate. We show that the algorithm yields centimeter performance, i.e., an accuracy of 10 cm or better, using a limited number of LEDs, e.g., four LEDs for a m area.
Autors: Heidi Steendam;
Appeared in: IEEE Journal on Selected Areas in Communications
Publication date: Jan 2018, volume: 36, issue:1, pages: 23 - 33
Publisher: IEEE
 
» A 3.9-kHz Frame Rate and 61.0-dB SNR Analog Front-End IC With 6-bit Pressure and Tilt Angle Expressions of Active Stylus Using Multiple-Frequency Driving Method for Capacitive Touch Screen Panels
Abstract:
This paper proposes an analog front-end (AFE) IC using a multiple-frequency driving method (MFDM). The proposed AFE IC achieves a high signal-to-noise ratio (SNR) by using an external noise spectrum and locating the frequencies of the excitation signals in low-noise regions. In addition, it employs the MFDM to increase the frame rate by simultaneously sending excitation signals having multiple frequencies to the touch screen panel (TSP). The proposed AFE IC extracts the coordinates of the finger as well as the coordinates, pressure, and tilt angle of the active stylus with the force gauge and gyro sensor. The proposed AFE IC and active stylus were fabricated in a 0.13- standard CMOS process. The measurement results show that the proposed AFE IC achieves a frame rate of 3.9 kHz, and SNRs of 61.0 and 50.1 dB when a finger and active stylus are used, respectively. In addition, the pressure and tilt angle of the active stylus are expressed with 6-bit resolution. A capacitive touch system with the proposed AFE IC is demonstrated with a 65-in TSP using ten fingers and the active stylus with the pressure and tilt angle.
Autors: Jae-Sung An;Sang-Hyun Han;Ju Eon Kim;Dong-Hyun Yoon;Young-Hwan Kim;Han-Hee Hong;Jae-Hun Ye;Sung-Jin Jung;Seung-Hwan Lee;Ji-Yong Jeong;Kwang-Hyun Baek;Seong-Kwan Hong;Oh-Kyong Kwon;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 187 - 203
Publisher: IEEE
 
» A 37- $mu text{W}$ , Binary-Weighted PGA Based on a Novel Degeneration Transistor-Ladder
Abstract:
A programmable-gain amplifier with low power consumption is presented. The programmable gain function is achieved by varying the effective transconductance ratios of input and output stages, which is realized through innovative binary-weighted and triode-region transistor ladder. The proposed technique effectively overcomes the problems associated with the implementation of resistors ladder in these types of structures. The operational principle of this unique structure is discussed, its most important formulas are derived, and its outstanding performance is verified by post-layout simulations in TSMC 0.18-m N-well CMOS fabrication process. Owing to its unique construction, the proposed circuit combines the ever interesting constant bandwidth, linear-in-decibel, and fine-step programmable gain range merits all in a simple and low power structure. The core of proposed structure draws only 36.5 W from 1.8-V power supply. The circuit is capable of delivering a wide programmable range of about 37 dB and operating at frequencies up to 20 MHz. To approve the robustness of the structure, full process, voltage, and temperature variation analysis of the circuit is investigated through corner case and Monte Carlo simulations. Monte Carlo simulations show standard deviation values of less than 0.21 W and 0.5 dB in power consumption and voltage gain, respectively. These results indicate that the proposed structure would lend itself well for use in applications that demand high ratios of frequency over power consumption.
Autors: Hassan Faraji Baghtash;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Jan 2018, volume: 65, issue:1, pages: 36 - 40
Publisher: IEEE
 
» A 40-Gb/s 4-Vpp Differential Modulator Driver in 90-nm CMOS
Abstract:
In this letter, a 40-Gb/s optical modulator driver in 90-nm CMOS technology is presented. The design is based on the distributed amplifier (DA) topology with the proposed modified cascode stage to obtain high gain and large bandwidth, while also capable of protecting the MOS transistor under large output voltage swing. The modified cascode stage DA with enhanced high-voltage driving capability can reach an operating data rate up to 40 Gb/s with an differential output voltage swing of 4 Vpp (~3-V eye amplitude), which can be used for driving 50- silicon modulators.
Autors: Yan-Feng Li;Po-Wei Chiu;Ke Li;David J. Thomson;Graham T. Reed;Shawn S. H. Hsu;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 73 - 75
Publisher: IEEE
 
» A 42-Gb/s VCSEL Driver Suitable for Burst Mode Operation in 14-nm Bulk CMOS
Abstract:
In this letter, the design and measurement results of a high-swing 42-Gb/s vertical-cavity surface-emitting laser (VCSEL) driver with an optical modulation amplitude of 1.4 dB is presented. To keep the power dissipation low, no equalizer was employed at the highest rate. At the output stage circuit, a series-shunt peaking technique is used, and it is optimized to lower the group-delay variation at the laser input. The transmitter circuitry can be disabled when there is no data transmission to save half of the power required for the full-rate functionality. Then, it can be enabled in less than 10 ns to full rate operation. The chip is fabricated in a 14-nm bulk CMOS technology and bonded to a common-cathode 20-GHz VCSEL. Optical measurements show that the data transmission up to a data rate of 42 Gb/s with bit error rate better than 10−12 was possible. The total power dissipation, including the one of the VCSEL, is 81.5 mW, which provides a power efficiency of 1.94 pJ/b. To the best of our knowledge, this is the fastest VCSEL driver in any CMOS process suitable for burst mode operation.
Autors: Mahdi Khafaji;Jan Pliva;Ronny Henker;Frank Ellinger;
Appeared in: IEEE Photonics Technology Letters
Publication date: Jan 2018, volume: 30, issue:1, pages: 23 - 26
Publisher: IEEE
 
» A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory
Abstract:
A 64-word-line-stacked 512-Gb 3-b/cell 3-D NAND flash memory is presented. After briefly examining the challenges that occur to a stack, several technologies are suggested to resolve the issues. For performance enhancement, a novel program method hiding two-page data loading time is presented. This paper also discusses an electrical annealing improving reliability characteristic by removing holes in shallow traps. In addition, a valley tracking read for reducing timing overhead at a read retry is introduced by fast finding optimal read levels. Finally, a high-speed self-test mode for IO operation is presented. The chip, designed with the fourth generation of V-NAND technology, achieved an areal density of 3.98 Gb/mm2 and operated up to 1 Gb/s at 1.2 V.
Autors: Chulbum Kim;Doo-Hyun Kim;Woopyo Jeong;Hyun-Jin Kim;Il Han Park;Hyun-Wook Park;JongHoon Lee;JiYoon Park;Yang-Lo Ahn;Ji Young Lee;Seung-Bum Kim;Hyunjun Yoon;Jae Doeg Yu;Nayoung Choi;NaHyun Kim;Hwajun Jang;JongHoon Park;Seunghwan Song;YongHa Park;Jinbae
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 124 - 133
Publisher: IEEE
 
» A Broadband Dual Circularly Polarized Conical Four-Arm Sinuous Antenna
Abstract:
A novel wideband four-arm sinuous antenna with dual circular polarizations (CPs) and unidirectional radiation is proposed. Different from the conventional designs, this sinuous antenna is realized in a conical form and no ground plane or absorptive cavity is required to obtain unidirectional radiation. The beamforming network for dual circularly polarized operations consists of a wideband quadrature coupler and two wideband baluns, and an auxiliary feeding patch is introduced to facilitate the connection between baluns and sinuous arms. The design of baluns and coupler is inspired from the printed exponentially tapered microstrip balun and broadside-coupled microstrip coupler, respectively. The dynamic differential evolution algorithm is employed to optimize the geometry of coupler for optimal performance. For both polarizations, the presented antenna has wide impedance bandwidth, good axial ratio, moderate realized gain, and front-to-back ratio within 2–5 GHz. An antenna prototype is fabricated and tested. The agreement between simulation and measurement results validates the proposed antenna framework. The demonstrated antenna has advantages of wide bandwidth, dual CPs, unidirectional radiation, lightweight, and low cost, and is promising for applications in wireless systems.
Autors: Shufeng Zheng;Steven Gao;Yingzeng Yin;Qi Luo;Xiaodong Yang;Wei Hu;Xueshi Ren;Fan Qin;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Jan 2018, volume: 66, issue:1, pages: 71 - 80
Publisher: IEEE
 
» A Cascaded Part-Based System for Fine-Grained Vehicle Classification
Abstract:
Vehicle make and model recognition (VMMR) has become an important part of intelligent transportation systems. VMMR can be useful when license plate recognition is not feasible or fake number plates are used. VMMR is a hard, fine-grained classification problem, due to the large number of classes, substantial inner-class, and small inter-class distance. A novel cascaded part-based system has been proposed in this paper for VMMR. This system uses latent support vector machine formulation for automatically finding the discriminative parts of each vehicle category. At the same time, it learns a part-based model for each category. Our approach employs a new training procedure, a novel greedy parts localization, and a practical multi-class data mining algorithm. In order to speed up the system processing time, a novel cascading scheme has been proposed. This cascading scheme applies classifiers to the input image in a sequential manner, based on the two proposed criteria: confidence and frequency. The cascaded system can run up to 80% faster with analogous accuracy in comparison with the non-cascaded system. The extensive experiments on our data set and the CompCars data set indicate the outstanding performance of our approach. The proposed approach achieves an average accuracy of 97.01% on our challenging data set and an average accuracy of 95.55% on CompCars data set.
Autors: Mohsen Biglari;Ali Soleimani;Hamid Hassanpour;
Appeared in: IEEE Transactions on Intelligent Transportation Systems
Publication date: Jan 2018, volume: 19, issue:1, pages: 273 - 283
Publisher: IEEE
 
» A Case Study of Voltage Transformer Failures: Solution Implementation in a Modern Data Center
Abstract:
While preparing a modern data center for startup, the commissioning process involved primary circuit switching that resulted in two voltage transformer (VT) failures. As a result, we conducted a comprehensive investigation of the VT failures. As the investigation proceeded, VT ferroresonance on circuit opening and high-frequency switching transients on closing emerged as possible root causes of the failures. After incorporating extensive transient simulations and three rounds of field transient measurements, we designed and implemented a complete solution that included the sizing of snubbers to overcome excessive switching transients and the development of a saturable reactor to protect VTs against the effects of ferroresonance. This article describes the root causes, simulations, field measurements, recommended solutions, and solution implementation for this event. The correlation between field measurements and simulation results shows the effectiveness of modeling the implemented solutions.
Autors: Tamer Abdelazim Mellik;Thomas J. Dionise;Robert Yanniello;
Appeared in: IEEE Industry Applications Magazine
Publication date: Jan 2018, volume: 24, issue:1, pages: 98 - 109
Publisher: IEEE
 
» A Center-of-Gravity-Based Approach to Estimate Slow Power and Frequency Variations
Abstract:
A novel approach based on the notion of center-of-gravity (COG) dynamics in mechanics is used to estimate local and global power system's frequency behavior. In this framework, the power system dynamic behavior is represented by an equivalent model in which the geographical areas interact with the COG through fictitious interconnectors from which the inherent dynamics of power frequency transients is explained using fundamental physics principles. The relationship between the frequency of the COG and the motion of local centers of angle is determined and expressions to compute local frequency deviations following major disturbances are derived. Detailed simulation results on three test power systems are used to demonstrate the accuracy and flexibility of the proposed method under both, N-1 and N-2 contingencies.
Autors: Hêmin Golpîra;Arturo Román Messina;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 1026 - 1035
Publisher: IEEE
 
» A Chain Method for Preconditioned Iterative Linear Solvers for Power System Matrices
Abstract:
Many power systems applications such as power flow and short-circuit analysis require very large sparse matrix computations. With the increase in reliance on our electric infrastructure, power systems are continually growing in size, creating greater computational complexity in solving these large linear systems within reasonable time. For sparse matrix applications, it is desirable to have an algorithm with low runtime complexity in terms of the number of nonzeros in the matrix. There have been several recent advances in computational methods in other fields that, if applied to power system, could make real-time dynamic simulation a reality. Much work has been done for specific types of these problems where the system is symmetric and diagonally dominant, similar to the form of power system matrices. This paper details an expansion on the current work in fast linear solvers to develop power system specific methods that show potential for accurate solutions in run times, where represents the number of nodes and represents the number of nonzeros in the power system matrix. This paper presents the simulation validation of a recently developed recursively solved iterative chain method for sparse matrices using a low stretch spanning tree preconditioner.
Autors: Lisa L. Grant;Mariesa L. Crow;Maggie X. Cheng;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 166 - 173
Publisher: IEEE
 
» A Charge-Based Capacitance Model for Double-Gate Tunnel FETs With Closed-Form Solution
Abstract:
Based on an analytical surface potential and a simple mathematical approximation for the source depletion width, a physics-based capacitance model with closed form for silicon double-gate tunnel field-effect transistors (TFETs) is developed. Good agreements between the proposed model and the numerical simulations have been achieved, which reveal that the tunneling carriers from source have negligible contribution to the channel charges and the gate capacitance can be almost acted as the gate–drain capacitance, which is quite different from that of MOSFETs. This model without involving any iterative process is more SPICE friendly for circuit simulations compared with the table-lookup approach and would be helpful for developing the transient performance of TFET-based circuits.
Autors: Bin Lu;Hongliang Lu;Yuming Zhang;Yimen Zhang;Xiaoran Cui;Zhijun Lv;Shizheng Yang;Chen Liu;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jan 2018, volume: 65, issue:1, pages: 299 - 307
Publisher: IEEE
 
» A Chirp Scaling Algorithm for Forward-Looking Linear-Array SAR With Constant Acceleration
Abstract:
For forward-looking linear-array synthetic aperture radar (FLLA-SAR) with constant acceleration, the conventional hyperbolic range model is incorrect, and the range-dependent range cell migration (RCM) cannot be ignored any more. Hence, the traditional chirp scaling (CS) algorithm based on the hyperbolic range model also cannot be used. To overcome these problems, a modified range model for the FLLA-SAR which has taken the platform’s acceleration into consideration is proposed in this letter. Based on the model, an improved CS method is proposed for FLLA-SAR to eliminate the space-variant characteristic of the RCM. Simulation results are presented to validate the range model and the proposed method.
Autors: Yue Yuan;Si Chen;Shuning Zhang;Huichang Zhao;
Appeared in: IEEE Geoscience and Remote Sensing Letters
Publication date: Jan 2018, volume: 15, issue:1, pages: 88 - 91
Publisher: IEEE
 
» A CMOS Medium Power Amplifier With Built-In Power Detector for Multistandard Dedicated Short-Range Communication Applications
Abstract:
This letter presents a 5.8-GHz medium power amplifier (PA) using 0.18- CMOS technology with a built-in power detector for triple-mode operations, including amplitude-shift keying (ASK), frequency-shift keying (FSK), /4-quadrature-phase shift keying, and multilevel complex modulations, for multistandard dedicated short-range communication applications. For ASK/FSK operations, the PA can work in nonlinear regions owing to the constant envelope feature of input signals that improve the power added efficiency, by which ASK modulation is achieved by modulating the bias of the PA output stage. The measured results show more than 10-dBm output power for all mode operations, with a chip area of mm2.
Autors: Chien-Chang Huang;Chia-Kai Chen;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 58 - 60
Publisher: IEEE
 
» A Coherent Receiver Based on SIM for Quantum Communication
Abstract:
In this letter, we propose theoretically a coherent receiver based on solid-state impact-ionization multiplier (SIM) for quantum communication. In the newly proposed coherent receiver, the balanced photodetector (BPD) is used as a current source connected to the SIM. The signal from the BPD is fed into the SIM, where it is amplified through a desirable avalanche process, which is similar to the avalanche photodiodes, and can then be fed into a transimpedance amplifier for voltage readout. Compared with the conventional coherent receiver with only coherent gain, the signal gain of the proposed coherent receiver consists of two parts, the coherent gain produced by the local oscillator (LO) and the avalanche gain produced by the SIM, so the LO power can be decreased to avoid the saturation of the BPD without sacrificing the signal gain. What is more, the proposed receiver can operate at a higher bandwidth by optimizing the structure of the coherent receiving end and redesigning the geometry of the SIM.
Autors: Ke Wen;Yanli Zhao;Junjie Tu;Jing Xu;Yuan Li;
Appeared in: IEEE Photonics Technology Letters
Publication date: Jan 2018, volume: 30, issue:1, pages: 27 - 30
Publisher: IEEE
 
» A Combined Optimization-Theoretic and Side- Channel Approach for Attacking Strong Physical Unclonable Functions
Abstract:
The promise of strong physical unclonable functions (PUF) is to utilize the manufacturing variations of circuit elements to produce an independent and unpredictable response to any input challenge vector. Attacks on PUFs that predict the responses to input challenge vectors offer an interesting research problem. An attacking approach based on the optimization theory and side-channel information is proposed where we estimate the manufacturing variations of the circuit elements and predict the PUF’s responses to challenge vectors whose actual responses are not known. We apply this attacking approach on some popular PUF designs, including the Arbiter PUFs, the Memristor Crossbar PUFs, and the XOR Arbiter PUFs. Simulations show a substantial reduction in attack complexity compared with previously proposed machine-learning (ML)-based attacks: we achieve an average reduction of 66% in attack time compared with the ML approach. Despite some overhead, our approach is also applicable when the PUF responses are noisy.
Autors: Yuntao Liu;Yang Xie;Chongxi Bao;Ankur Srivastava;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Jan 2018, volume: 26, issue:1, pages: 73 - 81
Publisher: IEEE
 
» A Communication Channel With Random Battery Recharges
Abstract:
Motivated by the recent emergence of energy harvesting and wirelessly powered transceivers, we study communication over a memoryless channel with a transmitter, whose battery is recharged at random or deterministic times known to the receiver. We characterize the capacity of this channel as the limit of an -letter maximum mutual information rate under various assumptions: causal and noncausal transmitter knowledge of the battery recharges, with or without feedback from the receiver to the transmitter. While the resultant -letter capacity expressions are not computable in the general case, we demonstrate their usefulness by focusing on two important special cases, namely, the binary erasure channel (BEC) and the additive white Gaussian noise (AWGN) channel, where they lead to some interesting, and somewhat surprising, insights. By focusing on the BEC, we show that output feedback can strictly increase the capacity of this channel, even though the channel is memoryless and the battery recharging process is independent over time. Interestingly, this provides a counter example to an old claim by Shannon stated without proof in his 1956 paper. On the other hand, by focusing on the AWGN channel, we are able to show that the capacity with noncausal knowledge of the battery recharging times at the transmitter is strictly larger than that with causal knowledge, even though the battery recharging process is independent over time and known to the receiver. The -letter expressions can also be used to derive explicit upper and lower bounds on capacity. In particular, we derive simple upper and lower bounds on the capacity of the AWGN channel with random battery recharges, which are within 1.05 b/s/Hz of each other for all parameter values.
Autors: Dor Shaviv;Ayfer Özgür;Haim H. Permuter;
Appeared in: IEEE Transactions on Information Theory
Publication date: Jan 2018, volume: 64, issue:1, pages: 38 - 56
Publisher: IEEE
 
» A Compact and Low-Profile MIMO Antenna Using a Miniature Circular High-Impedance Surface for Wearable Applications
Abstract:
A new miniature circular high-impedance surface (HIS) is used to design a compact and low-profile multi-in multi-out (MIMO) antenna for wearable applications. The antenna is designed to operate from 2.4 to 2.49 GHz for wireless local area network application. By employing a pair of degenerated characteristic modes of a circular loop antenna, the MIMO antenna can achieve a good port-to-port isolation (>15 dB) without increasing its geometric size. A four-element HIS is chosen to match the antenna profile, and a 2 dBi antenna gain improvement is observed. The design was optimized considering the effect of packaging and then a prototype with the optimal parameters was fabricated and tested. Measurement results are in good agreement with simulation results. Furthermore, the loading effect due to lossy human tissue is also considered and the results show that the antenna has a robust performance against the human phantom and a low specific absorption rate can also be obtained.
Autors: Dingliang Wen;Yang Hao;Max O. Munoz;Hanyang Wang;Hai Zhou;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Jan 2018, volume: 66, issue:1, pages: 96 - 104
Publisher: IEEE
 
» A Compact Microstrip T-Type Switch for Narrowband Applications
Abstract:
This paper presents a compact T-type switch that involves three different operational states providing high flexibility in signal routing. Two of the states are between adjacent ports, while the other is a crossover state. T-type switches are mainly used as building blocks of redundancy matrices for satellite communications systems, although mobile applications also take advantage of switching devices. The proposed structure uses p-i-n diodes located in specific points to control each state with a specific bias dc voltage, creating open and short circuits. The symmetry of the structure allows even–odd mode analysis in order to obtain the design equations. To validate the concept, a compact microstrip T-type switch is fabricated and measured. The resulting device shows a good performance in terms of transmission and isolation for each state, in agreement with the simulations. The switch exhibits a band-pass response for the crossover state, while low-pass and high-pass responses result for the other two states.
Autors: Alfred Gimenez;Jordi Verdú;Eden Corrales;Pedro de Paco Sánchez;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jan 2018, volume: 66, issue:1, pages: 170 - 176
Publisher: IEEE
 
» A Compact Single-Stage Wide-Band Balun: A 4:1 Wide-Band Transmission-Line Balun Based on a Combination of Two Different Ferrite Cores
Abstract:
This article presents the design procedure and measurement results for a 4:1 wide-band transmission-line balun based on a combination of two different ferrite cores. The balun ranked first at the Student Design Competition for "Wide-Band Baluns" that took place during the IEEE Microwave Theory and Techniques Society (MTT-S) 2017 International Microwave Symposium (IMS2017) in Honolulu, Hawaii, last May and sponsored by Technical Coordinating Committee MTT-17. Each competition team was required to bring a balun designed by the students. The team that achieved the widest measured bandwidth, from 300 kHz to 1 GHz under the competition rules, was named the winner.
Autors: Taewan Kim;Hwiseob Lee;Wonseob Lim;Sungjae Oh;Hansik Oh;Keum Cheol Hwang;Kang-Yoon Lee;Cheon-seok Park;Youngoo Yang;
Appeared in: IEEE Microwave Magazine
Publication date: Jan 2018, volume: 19, issue:1, pages: 78 - 83
Publisher: IEEE
 
» A Compact Tunable Directional Coupler with Continuously Tuned Differential Phase
Abstract:
A tunable directional coupler with outputs that have continuously tuned phase difference and constant magnitude is presented. The initial design is based on a 3-dB branch-line coupler with two arms having variable electrical lengths. To realize the variable-length lines, a novel concept of tunable phase shifting unit, which includes a pair of inductor-varactor loaded coupled lines, is proposed. By controlling the shifting phase of the two arms, the differential phase (i.e., the phase difference between the two output ports) can be tuned continuously. Explicit relation between the objective differential phase of the device and the required shifting phase of those units is analyzed and explained. To validate the design, a prototype is built, simulated, and tested. The experimental and predicted results agree well and show that the device can realize arbitrary and continuously tunable differential phase from 45° to 135°. The overall size of the design is only , which is extremely compact compared with using a cascaded coupler-phase shifters and is thus suitable for miniaturized wireless systems.
Autors: He Zhu;Amin M. Abbosh;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 19 - 21
Publisher: IEEE
 
» A Compact Ultra-Wideband Multibeam Antenna System
Abstract:
A compact UWB (6–18 GHz) multibeam antenna system is proposed. Design procedures comprising of ridged coaxial waveguide, radome with lens properties, and biconical antenna are presented. A novel UWB feed network consisting of a ridged coaxial waveguide with eight inputs has been designed and optimized to achieve minimum reflections as well as desired radiation pattern over the frequency range of operation. The radiating element is a biconical antenna, redesigned and optimized to meet the requirements for radiation characteristics. Another notable improvement made by our design is to employ a radome, which not only enhances the mechanical stability of the biconical antenna and protects the structure, but also it acts as a lens that improves the directivity of the radiating element. Extensive optimization procedures have been applied to all parts of the antenna system to achieve the desired performance. The whole system has been simulated using HFSS full-wave simulator. The measurement results of the fabricated system are in good agreement with simulations.
Autors: Ahmad Emadeddin;Mohammad Ali Salari;Mahdi Zoghi;Amin Darvazehban;Omid Manoochehri;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Jan 2018, volume: 66, issue:1, pages: 125 - 131
Publisher: IEEE
 
» A Comparative Study on Hot-Carrier Injection in 5-Story Vertically Integrated Inversion-Mode and Junctionless-Mode Gate-All-Around MOSFETs
Abstract:
The hot-carrier degradation of the junctionless mode (JM) and the inversion mode (IM) of five-story vertically integrated gate-all-around (GAA) MOSFETs is investigated for the first time. It is found that the degradation of drain current induced by the hot-carrier injection (HCI) in the JM-FET is less than that in the IM-FET for the same dimensions and bias conditions, because of the bulk conduction mechanism of the JM-FET, which is in contrast to surface conduction of the IM-FET. The results are obtained using electrical measurements and numerical simulations. The analysis of how HCI affects the lifetime reliability of vertically integrated GAA MOSFETs is of great importance for ultimate scaling of the silicon transistor.
Autors: Seong-Yeon Kim;Byung-Hyun Lee;Jae Hur;Jun-Young Park;Seung-Bae Jeon;Seung-Wook Lee;Yang-Kyu Choi;
Appeared in: IEEE Electron Device Letters
Publication date: Jan 2018, volume: 39, issue:1, pages: 4 - 7
Publisher: IEEE
 
» A Comparison of Electroluminescence Spectra From Plan View and Cross-Sectioned AlGaN/GaN Devices
Abstract:
We report on a comparison of electroluminescence (EL) spectra measured in plan view versus on a cross-sectioned face of the same AlGaN/GaN device for the first time. Because EL emission can be more intense under optically opaque metal structures, a difference was expected. We observed and quantified the difference in EL intensity and the extracted electron temperature. We discuss the effect on the rate of proposed channel hot-carrier degradation. Device simulations were used to gain insight on the expected spatial distribution of hot electrons within the channel. Last, spectra acquired on the cross-sectioned face were found to be free of interference artifacts common in plan view that could complicate the interpretation of the spectral data.
Autors: Albert M. Hilton;Adam D. Cahill;Eric R. Heller;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jan 2018, volume: 65, issue:1, pages: 59 - 63
Publisher: IEEE
 
» A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical–Horizontal Common Sub-Expression Elimination Algorithm
Abstract:
This paper introduces a computationally efficient hardware architecture for reconfigurable multiple constant multiplication block, which functions according to the canonical signed digit (CSD)-based vertical and horizontal common sub-expression elimination (VHCSE) algorithm. In the proposed architecture, the CSD decoded coefficient along with 4-b common sub-expressions (CSs) in the vertical direction and 4- and 8-b CSs in the horizontal direction reduces the required number of full adder cells and the adder depths. This technique helps in reducing area consumption by decreasing the number of coefficient multiplier adders by 59% than that of the binary VHCSE (VHBCSE) algorithm. This technique helps in reducing the average switching activity of the adder blocks used in each coefficient multiplier block by 26.1%, 25.6%, and 21.3%, while compared with those of the 2- and 3-b binary CS elimination (BCSE) and VHBCSE algorithms, respectively. For different orders of filter, the proposed one delivers 57.5% and 61.9% improvement in area-power product (APP) on an average compared with the VHBCSE and mixed integer programming algorithms, respectively. Experimental results of differently specified finite impulse response (FIR) filters ranging from 10 to 100 taps and the coefficients of 8, 12, and 16 b show the improvements of 42.8%, 53.6%, and 37%, respectively, in the average gate count and 51.8%, 43.5%, and 36.7% less propagation delay than those of earlier canonical double-based number representation method. Moreover, in the metric made of APP divided by throughput, the proposed technique experiences 63.7% improvement on an average over that of faithfully rounded truncated multiple constant multiplication/accumulation technique of - esigning constant multiplier and demonstrates its suitability for implementing efficient reconfigurable FIR filter.
Autors: Indranil Hatai;Indrajit Chakrabarti;Swapna Banerjee;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Jan 2018, volume: 65, issue:1, pages: 130 - 140
Publisher: IEEE
 
» A Cooperative Clustering Protocol With Duty Cycling for Energy Harvesting Enabled Wireless Sensor Networks
Abstract:
This paper proposes a cooperative clustering protocol based on the low energy adaptive clustering hierarchy approach to enhance the longevity of energy harvesting-based wireless sensor networks (EH-WSN). In the proposed protocol, to ensure that any energy consumption associated with the role of the cluster head (CH) is shared between the nodes, the CH role is alternated between the nodes using duty cycling as a function of their individual energy harvesting capabilities. Furthermore, to maintain an energy neutral operation when not acting as a CH, the nodes adopt a data transmission duty cycle and any excess energy is invested in relaying other nodes’ packets. To optimize the relaying performance, a novel cross-layer cooperative TDMA scheme is also presented. The optimal number of clusters in an EH-WSN is analyzed in terms of energy consumption, latency, and bandwidth utilization. Simulations, performed using GreenCastalia, demonstrate tangible performance enhancements in adopting the proposed protocol over benchmark schemes in terms of throughput and lifetime, particularly under highly constrained energy conditions.
Autors: Mohammed S. Bahbahani;Emad Alsusa;
Appeared in: IEEE Transactions on Wireless Communications
Publication date: Jan 2018, volume: 17, issue:1, pages: 101 - 111
Publisher: IEEE
 
» A Coordinated Dispatch Model for Distribution Network Considering PV Ramp
Abstract:
The ramp events of photovoltaic (PV) generation will cause severe voltage variations in a distribution network. To address this issue, a two-stage robust optimization based intra-hour dispatch model is proposed for the coordination of the on-load tap changer and smart PV systems. Hence, the distribution network security can be ensured by adjusting substation voltage and controlling PV systems. Case study on 33-bus system verifies the effectiveness of the proposed model.
Autors: Jiayong Li;Zhao Xu;Jian Zhao;Can Wan;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 1107 - 1109
Publisher: IEEE
 
» A DC-75-GHz Bandwidth and 54 $text {dB}Omega $ Gain TIA With 10.9 pA/ $sqrt {mathrm {Hz}} $ in 130-nm SiGe:C BiCMOS
Abstract:
A broadband low-noise amplifier with transimpedance (TI) feedback implemented in a 130-nm SiGe:C BiCMOS technology with of 300 GHz is presented. The circuit provides 22-dB gain and 75-GHz bandwidth while dissipating only 95 mW of power, achieving a gain bandwidth against dc power efficiency (GBW/) of 9.9 GHz/mW. Measured noise figure (NF) is 4 dB until 26.5 GHz, rising up to 6 dB at 70 GHz based on simulation. Ultrahigh data rate support is demonstrated with clear eye diagrams up to 100 Gb/s. Intended as a TI front end for optical receivers, the amplifier features 54- TI gain with only 10.9 pA/ averaged input-referred current noise density. Measured input-referred 1-dB compression point at 1 GHz occurs at −20 dBm input power. To the best of the authors’ knowledge, the proposed amplifier exhibits the highest GBW/ with the lowest NF reported to date, toward the next generation 400 Gb/s Ethernet.
Autors: Iria García López;Pedro Rito;A. Awny;Minsu Ko;Dietmar Kissinger;A. Cagri Ulusoy;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 61 - 63
Publisher: IEEE
 
» A Delay Relaxed RLS-DCD Algorithm for Real-Time Implementation
Abstract:
The recursive least squares algorithm (RLS) using dichotomous coordinate descent (DCD) iterations, namely, RLS-DCD, is regarded to be well suited for hardware implementation because of its small computational complexity compared to the classical RLS algorithm. While this is true, yet another important aspect that ultimately determines its applicability for real-time applications with high sample rates, is its iteration bound. In this brief, we discuss this issue and propose a modified RLS-DCD algorithm based on delay relaxation whose iteration bound can be reduced arbitrarily. The degradation in convergence speed is shown to be tolerable, which results in still much faster convergence compared to the normalized least mean square algorithm.
Autors: Geonu Kim;Hyuk Lee;Jinjoo Chung;Jungwoo Lee;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Jan 2018, volume: 65, issue:1, pages: 61 - 65
Publisher: IEEE
 
» A Delayed-Excitation Data Acquisition Method for High-Frequency Ultrasound Imaging
Abstract:
High-frequency ultrasound imaging (at >20 MHz) has gained widespread attention due to its high spatial resolution being useful for basic cardiovascular and cancer research involving small animals. The sampling rate of the analog-to-digital converter in a high-frequency ultrasound system usually needs to be higher than 120 MHz in order to satisfy the Nyquist sampling-rate requirement. However, the sampling rate is typically within the range of 40–60 MHz in a traditional ultrasound system, and so we propose a delayed-excitation method for performing high-frequency ultrasound imaging with a traditional data acquisition scheme. In this method, the transmitted pulse is delayed by a certain time period so that the ultrasound echo data are aligned into high-sampling-rate slots. Wire and tissue-mimicking phantoms were imaged to evaluate the performance of the proposed method, whereas a porcine small-intestine specimen and an excised rabbit eyeball were used for in vitro imaging evaluations. The test results demonstrate that the proposed method allows high-frequency ultrasound imaging to be implemented using a traditional ultrasound sampling system.
Autors: Weibao Qiu;Jingjing Xia;Yulong Shi;Peitian Mu;Xingying Wang;Mengdi Gao;Congzhi Wang;Yang Xiao;Ge Yang;Jihong Liu;Lei Sun;Hairong Zheng;
Appeared in: IEEE Transactions on Biomedical Engineering
Publication date: Jan 2018, volume: 65, issue:1, pages: 15 - 20
Publisher: IEEE
 
» A Design Space Exploration Methodology for Parameter Optimization in Multicore Processors
Abstract:
The need for application-specific design of multicore/manycore processing platforms is evident with computing systems finding use in diverse application domains. In order to tailor multicore/manycore processors for application specific requirements, a multitude of processor design parameters have to be tuned accordingly which involves rigorous and extensive design space exploration over large search spaces. In this paper, we propose an efficient methodology for design space exploration. We evaluate our methodology over two search spaces small and large, using a cycle-accurate simulator (ESESC) and a standard set of PARSEC and SPLASH-2 benchmarks. For the smaller design space, we compare results obtained from our design space exploration methodology with results obtained from fully exhaustive search. The results show that solution quality obtained from our methodology are within 1.35 - 3.69 percent of the results obtained from fully exhaustive search while only exploring 2.74 - 3 percent of the design space. For larger design space, we compare solution quality of different results obtained by varying the number of tunable processor design parameters included in the exhaustive search phase of our methodology. The results show that including more number of tunable parameters in the exhaustive search phase of our methodology greatly improves solution quality.
Autors: Prasanna Kansakar;Arslan Munir;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: Jan 2018, volume: 29, issue:1, pages: 2 - 15
Publisher: IEEE
 
» A Deterministic Method to Identify Multiple Local Extrema for the AC Optimal Power Flow Problem
Abstract:
This paper presents a deterministic approach to compute multiple local extrema for AC Optimal Power Flow (ACOPF) problems. An elliptical representation of the sphere-confined Fritz John conditions is constructed from a quadratic formulation of the ACOPF problem. Application of a branch tracing method to the elliptical formulation enables the calculation of multiple solutions. Further, a monotone search strategy enhances the computational efficiency of finding multiple local solutions with improved objective values. The proposed approach is first illustrated using two small examples with known feasible spaces. Then, four additional local solutions to a 39-bus system are found using the proposed approach.
Autors: Dan Wu;Daniel K. Molzahn;Bernard C. Lesieutre;Krishnamurthy Dvijotham;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 654 - 668
Publisher: IEEE
 
» A Developer Centered Bug Prediction Model
Abstract:
Several techniques have been proposed to accurately predict software defects. These techniques generally exploit characteristics of the code artefacts (e.g., size, complexity, etc.) and/or of the process adopted during their development and maintenance (e.g., the number of developers working on a component) to spot out components likely containing bugs. While these bug prediction models achieve good levels of accuracy, they mostly ignore the major role played by human-related factors in the introduction of bugs. Previous studies have demonstrated that focused developers are less prone to introduce defects than non-focused developers. According to this observation, software components changed by focused developers should also be less error prone than components changed by less focused developers. We capture this observation by measuring the scattering of changes performed by developers working on a component and use this information to build a bug prediction model. Such a model has been evaluated on 26 systems and compared with four competitive techniques. The achieved results show the superiority of our model, and its high complementarity with respect to predictors commonly used in the literature. Based on this result, we also show the results of a “hybrid” prediction model combining our predictors with the existing ones.
Autors: Dario Di Nucci;Fabio Palomba;Giuseppe De Rosa;Gabriele Bavota;Rocco Oliveto;Andrea De Lucia;
Appeared in: IEEE Transactions on Software Engineering
Publication date: Jan 2018, volume: 44, issue:1, pages: 5 - 24
Publisher: IEEE
 
» A Differential Output Interfacing ASIC for Integrated Capacitive Sensors
Abstract:
In this paper, we have proposed an input interfacing scheme with differential output for integrated capacitive sensor applications. In the proposed scheme, the front-end interfacing is based on switched capacitor charge amplifier configuration using a fully differential operational transconductance amplifier and one differential capacitive sensor arrangement which provides differential output with minimum number of circuit components. In the back end, a sigma–delta () modulator is integrated for modulated digital output. The signal conditioning circuit also includes gain programmability by selecting proper feedback capacitor and mismatch cancellation between the sensing capacitors through on-chip capacitors array. The complete application specific integrated circuit (ASIC) is designed and fabricated in United Microelectronics Corporation (UMC) CMOS process technology. The fabricated ASIC is then integrated with a silicon-on-insulator microelectromechnical systems capacitive accelerometer to test and characterize the performance of the proposed scheme. The measured result shows that the sensitivity of the proposed circuit can be varied from 200 to 900 mV/g by changing the feedback capacitor. The integrated system is also tested with electrostatic actuation as well as with a vibrating shaker and the measurement results are presented.
Autors: Sougata Kumar Kar;Procheta Chatterjee;Banibrata Mukherjee;Kenkere Balashantha Murthy Mruthyunjaya Swamy;Siddhartha Sen;
Appeared in: IEEE Transactions on Instrumentation and Measurement
Publication date: Jan 2018, volume: 67, issue:1, pages: 196 - 203
Publisher: IEEE
 
» A Differential Quantizer-Based Error Feedback Modulator for Analog-to-Digital Converters
Abstract:
A differential quantizer-based error feedback modulator intended for digitizing analog signals and its comparison to the traditional interpolative sigma delta analog-to-digital conversion is presented in this brief. The differential quantizer-based error feedback modulator also falls under the class of noise-shaping data converters. This newly introduced technique replaces the integrator with a differential quantizer to achieve noise-shaping characteristics. Thus, integrator associated non-idealities, loop-stability issues, and optimization of the integrator scaling coefficients is no more a concern. Differential quantizer-based error feedback modulator technique can perform well in high-precision and low-power applications. Behavioral-level simulation results demonstrate the mathematical equivalence of the differential quantizer based error feedback modulator technique with interpolative sigma delta modulator technique and confirms its novelty, theoretical stability, and scalability to higher order. The circuit level feasibility and effectiveness of the proposed architecture is verified in a 45-nm CMOS process using a 1-V supply with a power consumption of 0.22 and 0.5 mW for the first and second order modulators, respectively.
Autors: A. V. Jos Prakash;Babita R. Jose;Jimson Mathew;Bijoy A. Jose;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Jan 2018, volume: 65, issue:1, pages: 21 - 25
Publisher: IEEE
 
» A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS
Abstract:
A fully integrated digitally controlled two-phase buck voltage regulator (VR) with on-die solenoid inductors with a planar magnetic core is demonstrated in 14-nm tri-gate CMOS for fine-grained power delivery/management domains of high power density in system-on-chips while enabling ultra-thin (z-height) packages. The VR achieves 1-A/mm2 power density for 400-mA load current with a measured peak efficiency of 84% at 100-MHz switching frequency including a digital PWM with >9 bits (8 ps) of resolution.
Autors: Harish K. Krishnamurthy;Vaibhav Vaidya;Pavan Kumar;Rinkle Jain;Sheldon Weng;Stephen T. Kim;George E. Matthew;Nachiket Desai;Xiaosen Liu;Krishnan Ravichandran;James W. Tschanz;Vivek De;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Jan 2018, volume: 53, issue:1, pages: 8 - 19
Publisher: IEEE
 
» A Direct Algorithm for Optimization Problems With the Huber Penalty
Abstract:
We present a direct (noniterative) algorithm for 1-D quadratic data fitting with neighboring intensity differences penalized by the Huber function. Applications of such an algorithm include 1-D processing of medical signals, such as smoothing of tissue time concentration curves in kinetic data analysis or sinogram preprocessing, and using it as a subproblem solver for 2-D or 3-D image restoration and reconstruction. dynamic programming was used to develop the direct algorithm. The problem was reformulated as a sequence of univariate optimization problems, for , where is the number of data points. The solution to the univariate problem at index is parameterized by the solution at , except at . Solving the univariate optimization problem at yields the solution to each problem in the sequence using back-tracking. Computational issues and memory cost are discussed in detail. Two numerical studies, tissue concentration curve smoothing and sinogram preprocessing for image reconstruction, are used to validate the direct algorithm and illustrate its practical applications. In the example of 1-D curve smoothing, the efficiency of the direct algorithm is compared with four iterative methods: the iterative coordinate descent, Nesterov’s accelerated gradient descent algorithm, FISTA, and an off-the-shelf second order method. The first two methods were applied to the primal problem, the others to the dual problem. The comparisons show that the direct - lgorithm outperforms all other methods by a significant factor, which rapidly grows with the curvature of the Huber function. The second example, sinogram preprocessing, showed that robustness and speed of the direct algorithm are maintained over a wide range of signal variations, and that noise and streaking artifacts could be reduced with almost no increase in computation time. We also outline how the proposed 1-D solver can be used for imaging applications.
Autors: Jingyan Xu;Frédéric Noo;Benjamin M. W. Tsui;
Appeared in: IEEE Transactions on Medical Imaging
Publication date: Jan 2018, volume: 37, issue:1, pages: 162 - 172
Publisher: IEEE
 
» A Distributed Raman Amplifier Based on the Backward-Pumped Random Fiber Laser
Abstract:
For the first time, a backward-pumped random distributed feedback fiber laser is applied to the conventional distributed Raman amplification (DRA). A new asymmetric DRA scheme for improving the signal power variation (SPV) performance was achieved. The scheme was studied numerically and was shown to effectively reduce the SPV of all signals to less than 1.2 dB, whilst maintaining a flat ON–OFF gain over 40 nm bandwidth for a 61.5 km fiber span. Moreover, the nonlinear Fourier transform technique, which is utilized to deal with the nonlinear noise, could be realized on the proposed scheme with such a low SPV.
Autors: You Wang;Ying Wang;Wei Li;Qiguang Feng;Qiang Zheng;
Appeared in: IEEE Photonics Technology Letters
Publication date: Jan 2018, volume: 30, issue:2, pages: 173 - 176
Publisher: IEEE
 
» A Distributed-Deflection Sensor With a Built-In Probe for Conformal Mechanical Measurements of Costal Cartilage at Its Exterior Surface
Abstract:
In this paper, a distributed-deflection sensor with a built-in probe is proposed to achieve conformal mechanical measurements of costal cartilage (CC) at its exterior surface. The sensor entails a rectangular sensing-plate integrated with a transducer array with 0.75 mm spatial resolution underneath and a built-in probe of above. By pressing the sensor against the exterior surface of a CC tissue with a pre-defined indentation depth pattern, the sensor conforms to the curved tissue surface via the built-in probe first, and then the mechanical properties of the tissue translate to the spatially distributed deflection in the sensor and register as resistance changes by the transducer array. One human Pectus Carinatum (PC) CC sample is measured using the sensor without a built-in probe, and two human PC samples are measured using the sensor with a built-in probe. The comparison in measured results among the three samples validates the capability of the sensor with a built-in probe for conformity to a curved tissue surface in measurements. Based on the recorded relation of average sensor deflection to indentation depth of the two samples measured using the sensor with a built-in probe, the tissue instant indentation modulus and normalized relaxation amount of the two samples are derived and found to vary significantly among the anterior/posterior surfaces and superior/inferior borders at the same position of each sample.
Autors: Jiayue Shen;Michael Stacey;Zhili Hao;
Appeared in: IEEE Sensors Journal
Publication date: Jan 2018, volume: 18, issue:2, pages: 822 - 829
Publisher: IEEE
 
» A Doherty Amplifier With Modified Load Modulation Scheme Based on Load–Pull Data
Abstract:
We present the design and development of a Ka-band Doherty power amplifier (DPA) that achieves high efficiency at power backoff (PBO) using a new load modulation scheme and a proposed load–pull-based design technique. Using the proposed technique, the device size of the peaking amplifier and the impedance of the quarter-wavelength (/4) inverter are properly chosen to achieve high power-added efficiency (PAE) at a specific PBO level. The DPA is fabricated in a 0.15- gallium arsenide pseudomorphic high-electron mobility transistor enhancement mode process and achieves a measured small signal gain of 10.5 dB, output power at 1-dB compression point () of 27 dBm, and measured maximum PAE of 38%. The PAE at 6-dB PBO and 8-dB PBO are 32% and 28.5%, respectively. Furthermore, the PAE at 6-dB PBO maintains higher than 28.4% over a 1-GHz bandwidth from 29.25 to 30.25 GHz.
Autors: Duy P. Nguyen;Jeffery Curtis;Anh-Vu Pham;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jan 2018, volume: 66, issue:1, pages: 227 - 236
Publisher: IEEE
 
» A Dynamic Regrouping Based Dynamic Programming Approach for Unit Commitment of the Transmission-Constrained Multi-Site Combined Heat and Power System
Abstract:
Combined heat and power (CHP) systems offer additional advantage and flexibility for addressing power grid balance resulting from large-scale introduction of intermittent renewable energy sources (RES) in contrast to power-only systems. The dependence between heat and power production in the CHP plant can be utilized to adjust power production level to accommodate more RES. Furthermore, electricity can be transformed into heat by electric heater and heat pump to avoid starting up heat led CHP plants when RES production is abundant. This paper focuses on solving efficiently unit commitment of the interconnected multi-site CHP system without considering RES. A relaxed on/off state based dynamic programming applying sequential commitment scheme in conjunction with dynamic regrouping is used to coordinate heat and power production in each site (region) as well as power transmission across sites. Computational experiments for real-life daily scheduling demonstrate that our method generates solutions much more quickly than a standard high-performance optimizer (CPLEX) with comparable solution quality, and lays foundation for the future handling of uncertainties of intermittent RES.
Autors: Aiying Rong;Peter B. Luh;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 714 - 722
Publisher: IEEE
 
» A Fast and Adaptive Method for Determining $K_{1}$ , $K_{2}$ , and $K_{3}$ in the Tensor Decomposition-Based Anomaly Detection Algorithm
Abstract:
In our previous work, a tensor decomposition-based anomaly detection algorithm has been proposed. However, determining , , and (i.e., the major principal component numbers along the three modes of hyperspectral data) has not been settled satisfactorily. In this letter, a fast and adaptive method for determining , , and is proposed. In the proposed method, the determination problem is converted into an optimization problem by constructing the energy function by maximizing the anomalous degree of the reconstructed anomaly data in both spectral and spatial domains. In order to reduce the computational complexity, a fast initialization strategy is introduced to initialize those parameters in the feature space directly. In addition, to avoid the problem of parameter selection, an adaptive strategy is utilized. Furthermore, and are considered to be independent, making the degree of freedom of the three parameters conform with the actual. Experiments with three hyperspectral data sets reveal that the proposed method works effectively.
Autors: Xing Zhang;Gongjian Wen;
Appeared in: IEEE Geoscience and Remote Sensing Letters
Publication date: Jan 2018, volume: 15, issue:1, pages: 3 - 7
Publisher: IEEE
 
» A Fast Sensitivity Method for Determining Line Loss and Node Voltages in Active Distribution Network
Abstract:
A fast sensitivity method for determining line loss and node voltages in active distribution network is proposed. A quadratic sensitivity model of distributed generation (DG) output or load to Line Loss (QSLL) and a linear sensitivity model of DG output or load to node voltages (LSNV) are established based on one initial load flow calculation. Using these models, the variety of line loss and node voltages of distribution network can be directly determined with the variation of DG output or load demand. The proposed QSLL is more concise and accurate compared to the conventional linear sensitivity model. And the proposed LSNV are more concise than the conventional one.
Autors: Shouxiang Wang;Qi Liu;Xingquan Ji;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 1148 - 1150
Publisher: IEEE
 
» A Finite Convergence Criterion for the Discounted Optimal Control of Stochastic Logical Networks
Abstract:
Stochastic logical networks (SLNs) are discrete-time stochastic dynamical systems with Boolean (or multivalued) logical state variables. The discounted infinite horizon optimal control problem for SLN is addressed in this paper. By resorting to the equivalent Markov decision process description, the infinite horizon optimization problem is presented in algebraic form. Then using the increasing-dimension technique, an improved finite convergence criterion, which can find the optimal stationary policy, is derived for value iteration approach. To demonstrate the theoretical value of this approach, it is applied to the optimization problems of the human–machine game and the p53-Mdm2 gene network.
Autors: Yuhu Wu;Tielong Shen;
Appeared in: IEEE Transactions on Automatic Control
Publication date: Jan 2018, volume: 63, issue:1, pages: 262 - 268
Publisher: IEEE
 
» A Five-Level MILP Model for Flexible Transmission Network Planning Under Uncertainty: A Min–Max Regret Approach
Abstract:
The benefits of new transmission investment significantly depend on deployment patterns of renewable electricity generation that are characterized by severe uncertainty. In this context, this paper presents a novel methodology to solve the transmission expansion planning problem under generation expansion uncertainty in a min–max regret fashion, when considering flexible network options and security criterion. To do so, we propose a five-level mixed integer linear programming (MILP) based model that comprises: (i) the optimal network investment plan (including phase shifters), (ii) the realization of generation expansion, (iii) the co-optimization of energy and reserves given transmission and generation expansions, (iv) the realization of system outages, and (v) the decision on optimal post-contingency corrective control. In order to solve the five-level model, we present a cutting plane algorithm that ultimately identifies the optimal min–max regret flexible transmission plan in a finite number of steps. The numerical studies carried out demonstrate: (a) the significant benefits associated with flexible network investment options to hedge transmission expansion plans against generation expansion uncertainty and system outages, (b) strategic planning-under-uncertainty uncovers the full benefit of flexible options which may remain undetected under deterministic, perfect information methods, and (c) the computational scalability of the proposed approach.
Autors: Alexandre Moreira;Goran Strbac;Rodrigo Moreno;Alexandre Street;Ioannis Konstantelos;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 486 - 501
Publisher: IEEE
 
» A Fixed-Scale Pixelated MIMO Visible Light Communication System
Abstract:
A pixelated MIMO wireless optical communication system is introduced, which transmits a series of time-varying coded images that can be received and decoded by commercial digital cameras. The system exploits the bokeh effect to obtain fixed-scale images at all link distances by placing a convex lens in front of the transmitter array at its focal length and focusing the receiver at infinity. This spatial-angular mapping simplifies the receiver structure requiring no re-focusing as the receiver moves. As an additional benefit, this mapping can also be exploited to provide location information to the receiver. The channel model is measured and modeled and rateless codes are applied to track the truncation of receive images for various link ranges and angular offsets. A proof-of-concept optical communication system is implemented with an LCD display and a high-speed CMOS camera.
Autors: Boxiao Han;Steve Hranilovic;
Appeared in: IEEE Journal on Selected Areas in Communications
Publication date: Jan 2018, volume: 36, issue:1, pages: 203 - 211
Publisher: IEEE
 
» A Flexible 2.45-GHz Power Harvesting Wristband With Net System Output From −24.3 dBm of RF Power
Abstract:
This paper presents a flexible 2.45-GHz wireless power harvesting wristband that generates a net dc output from a −24.3-dBm RF input. This is the lowest reported system sensitivity for systems comprising a rectenna and impedance-matching power management. A complete system has been implemented comprising: a fabric antenna, a rectifier on rigid substrate, a contactless electrical connection between rigid and flexible subsystems, and power electronics impedance matching. Various fabric and flexible materials are electrically characterized at 2.45 GHz using the two-line and the T-resonator methods. Selected materials are used to design an all-textile antenna, which demonstrates a radiation efficiency above 62% on a phantom irrespective of location, and a stable radiation pattern. The rectifier, designed on a rigid substrate, shows a best-in-class efficiency of 33.6% at −20 dBm. A reliable, efficient, and wideband contactless connection between the fabric antenna and the rectifier is created using broadside-coupled microstrip lines, with an insertion loss below 1 dB from 1.8 to over 10 GHz. A self-powered boost converter with a quiescent current of 150 nA matches the rectenna output with a matching efficiency above 95%. The maximum end-to-end efficiency is 28.7% at −7 dBm. The wristband harvester demonstrates net positive energy harvesting from −24.3 dBm, a 7.3-dB improvement on the state of the art.
Autors: Salah-Eddine Adami;Plamen Proynov;Geoffrey S. Hilton;Guang Yang;Chunhong Zhang;Dibin Zhu;Yi Li;Steve P. Beeby;Ian J. Craddock;Bernard H. Stark;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Jan 2018, volume: 66, issue:1, pages: 380 - 395
Publisher: IEEE
 
» A Flying Odor Compass to Autonomously Locate the Gas Source
Abstract:
The design of a flying odor compass is proposed for the localization of gas source. The compass is built on a quad-rotor helicopter and contains three gas sensors. A data processing method is proposed to estimate the direction which the odor comes from. The method adopts continuous wavelet transform and modulus maxima approaches to uncover the time difference information hidden in the gas sensor signals. Experiments have demonstrated the effectiveness of this design.
Autors: Bing Luo;Qing-Hao Meng;Jia-Ying Wang;Ming Zeng;
Appeared in: IEEE Transactions on Instrumentation and Measurement
Publication date: Jan 2018, volume: 67, issue:1, pages: 137 - 149
Publisher: IEEE
 
» A Framework for Attack-Resilient Industrial Control Systems: Attack Detection and Controller Reconfiguration
Abstract:
Most existing industrial control systems (ICSs), such as building energy management systems (EMSs), were installed when potential security threats were only physical. With advances in connectivity, ICSs are now, typically, connected to communications networks and, as a result, can be accessed remotely. This extends the attack surface to include the potential for sophisticated cyber attacks, which can adversely impact ICS operation, resulting in service interruption, equipment damage, safety concerns, and associated financial implications. In this work, a novel cyber–physical security framework for ICSs is proposed, which incorporates an analytics tool for attack detection and executes a reliable estimation-based attack-resilient control policy, whenever an attack is detected. The proposed framework is adaptable to already implemented ICS and the stability and optimal performance of the controlled system under attack has been proved. The performance of the proposed framework is evaluated using a reduced order model of a real EMS site and simulated attacks.
Autors: Kaveh Paridari;Niamh O’Mahony;Alie El-Din Mady;Rohan Chabukswar;Menouer Boubekeur;Henrik Sandberg;
Appeared in: Proceedings of the IEEE
Publication date: Jan 2018, volume: 106, issue:1, pages: 113 - 128
Publisher: IEEE
 
» A Framework for Incorporation of Infeed Uncertainty in Power System Risk-Based Security Assessment
Abstract:
In this paper, a risk-based security assessment methodology is presented, which allows the assessment of operational security of a power system's future state under uncertainty deriving from varying topology scenarios (contingencies) and forecast errors (loads and renewable infeeds). The methodology models input uncertainty with a copula function-based Monte–Carlo (MC) framework. Furthermore, it provides the highest level of accuracy on initiating causes of failures through an AC power flow (AC PF) framework. Finally, it achieves speed in solution by the combination of two measures of risk. A fast screening tool, based on severity functions, allows us to quickly screen the system for the most severe states. A detailed analysis tool, based on an AC optimal power flow (AC OPF) framework and the notion of lost load, provides additional valuable information, including remedial actions to steer away from severe system states. This paper presents results from the application of the methodology proving the necessity of such a framework. It is shown that not taking into account stochastic dependence through a proper MC setup seriously underestimates system risk and that an AC framework is needed, as voltage deviations are shown to often be initiators of system collapse.
Autors: Martijn de Jong;Georgios Papaefthymiou;Peter Palensky;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 613 - 621
Publisher: IEEE
 
» A Framework for Modeling and Optimizing Maintenance in Systems Considering Epistemic Uncertainty and Degradation Dependence Based on PDMPs
Abstract:
A modeling and optimization framework for the maintenance of systems under epistemic uncertainty is presented in this paper. The component degradation processes, the condition-based preventive maintenance, and the corrective maintenance are described through piecewise-deterministic Markov processes in consideration of degradation dependence among degradation processes. Epistemic uncertainty associated with component degradation processes is treated by considering interval-valued parameters. This leads to the formulation of a multi-objective optimization problem whose objectives are the lower and upper bounds of the expected maintenance cost, and whose decision variables are the periods of inspections and the thresholds for preventive maintenance. A solution method to derive the optimal maintenance policy is proposed by combining finite-volume scheme for calculation, differential evolution, and nondominated sorting differential evolution for optimization. An industrial case study is presented to illustrate the proposed methodology.
Autors: Yan-Hui Lin;Yan-Fu Li;Enrico Zio;
Appeared in: IEEE Transactions on Industrial Informatics
Publication date: Jan 2018, volume: 14, issue:1, pages: 210 - 220
Publisher: IEEE
 
» A Framework of Rapid Regional Tsunami Damage Recognition From Post-event TerraSAR-X Imagery Using Deep Neural Networks
Abstract:
Near real-time building damage mapping is an indispensable prerequisite for governments to make decisions for disaster relief. With high-resolution synthetic aperture radar (SAR) systems, such as TerraSAR-X, the provision of such products in a fast and effective way becomes possible. In this letter, a deep learning-based framework for rapid regional tsunami damage recognition using post-event SAR imagery is proposed. To perform such a rapid damage mapping, a series of tile-based image split analysis is employed to generate the data set. Next, a selection algorithm with the SqueezeNet network is developed to swiftly distinguish between built-up (BU) and nonbuilt-up regions. Finally, a recognition algorithm with a modified wide residual network is developed to classify the BU regions into wash away, collapsed, and slightly damaged regions. Experiments performed on the TerraSAR-X data from the 2011 Tohoku earthquake and tsunami in Japan show a BU region extraction accuracy of 80.4% and a damage-level recognition accuracy of 74.8%, respectively. Our framework takes around 2 h to train on a new region, and only several minutes for prediction.
Autors: Yanbing Bai;Chang Gao;Sameer Singh;Magaly Koch;Bruno Adriano;Erick Mas;Shunichi Koshimura;
Appeared in: IEEE Geoscience and Remote Sensing Letters
Publication date: Jan 2018, volume: 15, issue:1, pages: 43 - 47
Publisher: IEEE
 
» A Fully Integrated High-Sensitivity Wide Dynamic Range PPG Sensor With an Integrated Photodiode and an Automatic Dimming Control LED Driver
Abstract:
This paper presents the design and implementation for a photoplethysmographic (PPG) sensor with an integrated photodiode and an automatic dimming control LED driver. The PPG front end is designed with a programmable low-pass cutoff frequency from 5 Hz up to 35 Hz, a high-pass cutoff frequency of 0.1 Hz, a total input referred noise current of 79 pA, and a maximum transimpedance gain of 144 dB. The sensor fabricated in 0.35- CMOS technology and consumes 1.4 mA from 2.7 V–4 V single power supply. The integrated LED driver uses a duty cycle control at a pulse repetition frequency of 200 Hz and 1% duty cycle. The LED driver can supply four LEDs each with 10 mA. An automatic dimming control is implemented to reduce the LEDs current at strong PPG signal strength, to reduce the LEDs power consumption.
Autors: Mohamed Atef;Min Wang;Guoxing Wang;
Appeared in: IEEE Sensors Journal
Publication date: Jan 2018, volume: 18, issue:2, pages: 652 - 659
Publisher: IEEE
 
» A Fundamental Tradeoff Between Computation and Communication in Distributed Computing
Abstract:
How can we optimally trade extra computing power to reduce the communication load in distributed computing? We answer this question by characterizing a fundamental tradeoff between computation and communication in distributed computing, i.e., the two are inversely proportional to each other. More specifically, a general distributed computing framework, motivated by commonly used structures like MapReduce, is considered, where the overall computation is decomposed into computing a set of “Map” and “Reduce” functions distributedly across multiple computing nodes. A coded scheme, named “coded distributed computing” (CDC), is proposed to demonstrate that increasing the computation load of the Map functions by a factor of (i.e., evaluating each function at carefully chosen nodes) can create novel coding opportunities that reduce the communication load by the same factor. An information-theoretic lower bound on the communication load is also provided, which matches the communication load achieved by the CDC scheme. As a result, the optimal computation-communication tradeoff in distributed computing is exactly characterized. Finally, the coding techniques of CDC is applied to the Hadoop TeraSort benchmark to develop a novel CodedTeraSort algorithm, which is empirically demonstrated to speed up the overall job execution by – , for typical settings of interest.
Autors: Songze Li;Mohammad Ali Maddah-Ali;Qian Yu;A. Salman Avestimehr;
Appeared in: IEEE Transactions on Information Theory
Publication date: Jan 2018, volume: 64, issue:1, pages: 109 - 128
Publisher: IEEE
 
» A Gauss–Newton ADALINE for Dynamic Phasor Estimation of Power Signals and Its FPGA Implementation
Abstract:
This paper presents a new hybrid adaptive filter based on modified Gauss–Newton adaptive linear element (MGNA) for estimating the fundamental and harmonic phasors along with the frequency change of nonstationary power system signals useful in many application areas that include system control, digital relaying, state estimation, and also wide area systems. The proposed approach is used to minimize an objective function based on weighted square of the error using the MGNA. Moreover, the inverse of the Hessian matrix is computed assuming certain approximations to reduce the computational load and time consumption. Furthermore, it also uses recursive formulation using the estimated values from the previous time instant unlike the nonrecursive approaches, thereby exhibiting better performance in terms of accuracy and convergence. Besides, its simple structure makes it more suitable for real-time applications. In addition, the filter has been implemented on a field programmable gate array hardware and Xilinx 14.2 with the Sysgen software for the estimation of frequency, fundamental, and harmonic phasors of single and three-phase time-varying power system signals.
Autors: Sarita Nanda;Pradipta Kishore Dash;
Appeared in: IEEE Transactions on Instrumentation and Measurement
Publication date: Jan 2018, volume: 67, issue:1, pages: 45 - 56
Publisher: IEEE
 
» A Generalized VNF Sharing Approach for Service Scheduling
Abstract:
Network function virtualization enables a flexible service provision by introducing the concept of virtual network function (VNF). Despite the importance of VNF scheduling, it is largely unexplored. In this letter, we propose a new model for VNF scheduling based on the min-plus algebra theory. The main idea of this model is to share the deployed VNF instances among different services, thus to improve the resource utilization and reduce the resource fragmentation generated by deploying many VNF instances. In addition, a weight-based VNF sharing scheduling approach is proposed in this model to achieve a fair scheduling among the arriving service requests. The experimental results show that the proposed model and approach are effective and efficient.
Autors: Bo Yi;Xingwei Wang;Min Huang;
Appeared in: IEEE Communications Letters
Publication date: Jan 2018, volume: 22, issue:1, pages: 73 - 76
Publisher: IEEE
 
» A Hierarchical Scheme for Utilizing Plug-In Electric Vehicle Power to Hedge Against Wind-Induced Unit Ramp Cycling Operations
Abstract:
Increasing wind power (WP) integration is forcing conventional units to go through more frequent and significant cycling operations, which would accelerate wear and tear to unit components and eventually affect the unit's lifespan. In this context, this paper proposes a hierarchical scheme to control the power of plug-in electric vehicles (PEVs) to mitigate unit ramp cycling (URC) operations. A general-form representation of the URC operation is proposed for the first time. At the top level of the hierarchical scheme, a system net load variation range (NLVR) is constructed first to capture the uncertainty in WP forecasts, and then the PEV power is scheduled to reshape the NLVR so as to minimize the URC operations that can be caused by the possible net load realizations in the NLVR. Based on updated WP forecasts, the middle-level dispatch model exempts overscheduled anti-URC regulation onus on PEVs to promote PEV charging. At the bottom level, a decentralized PEV charging control strategy is used to implement the PEV power dispatch instruction. Simulation results verify that the proposed scheme can avert the URC operations effectively, while preserve most of the desired PEV charging energy. Simulation results also show that the proposed scheme is more capable of withstanding WP forecast errors compared with its deterministic version and a benchmark scheme.
Autors: Xiao Luo;Shiwei Xia;Ka Wing Chan;Xi Lu;
Appeared in: IEEE Transactions on Power Systems
Publication date: Jan 2018, volume: 33, issue:1, pages: 55 - 69
Publisher: IEEE
 
» A High Linearity 24-GHz Down-Conversion Mixer Using Distributed Derivative Superposition Technique in 0.18- $mu text{m}$ CMOS Process
Abstract:
This letter presents a 24-GHz down-conversion mixer with built-in linearizer in 0.18- CMOS process. The mixer attains −4.5 ± 0.6 dB conversion gain and 23-dBm IIP3 with 5-dBm local-oscillator power by adopting double-balanced Gilbert-cell mixers with a distributed derivative superposition linearizer. The improvement of IIP3 is 9 dB. The dc power consumption of the proposed mixer is 16 mW. This mixer has the best IIP3 compared with other published CMOS mixer in the K-band.
Autors: Hung-Hao Lin;Yu-Hsuan Lin;Huei Wang;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Jan 2018, volume: 28, issue:1, pages: 49 - 51
Publisher: IEEE
 
» A High-Definition LIDAR System Based on Two-Mirror Deflection Scanners
Abstract:
This paper addresses the problem of adopting a state-of-art laser marking system with a two-mirror deflection scanner to make a high-definition light detection and ranging (LIDAR) system. To this end, a galvanometer scanner is modeled with parameterization and then the well-known raster scanning strategy is analyzed considering the physical scanning movement and the minimum spanning tree. As a result of this analysis, the relationship between the field of view (FOV) of the captured image and the scanning speed is clearly described. Furthermore, sufficient conditions are derived for an acquired image to fully cover the FOV and also for captured objects to be well aligned for a target frame rate. Finally, a prototype LIDAR system is developed to verify the proposed concepts and to prove that it successfully generates images at various resolutions depending on the target frame rates. Experimental results show that the scanner achieves the frame rates of 17.6, 9.0, and 4.6 frames per second fps for image sizes of , , and resolutions, respectively.
Autors: Xuan Truong Nguyen;Van Luan Dinh;Hyuk-Jae Lee;Hyun Kim;
Appeared in: IEEE Sensors Journal
Publication date: Jan 2018, volume: 18, issue:2, pages: 559 - 568
Publisher: IEEE
 
» A High-Gain ${X}$ -Band Overmoded Relativistic Klystron
Abstract:
A high-gain -band overmoded relativistic klystron is presented in this paper. The device mainly consists of an input cavity, two buncher cavities, and an output cavity. Moreover, two reflectors are added before and after the input cavity, therefore a standing wave is formed between the two reflectors, improving the initial modulation of the electron beam. With two sectional RF lossy materials inserted, the input cavity and the two buncher cavities are effectively isolated with each other. An additional reflector located just before the output cavity further reflects the backward-flowing power. Particle-in-cell simulations show that for a 10-kW injected microwave with a frequency of 9.37 GHz, the generated microwave power is 1.2 GW, corresponding to a beam-wave interaction efficiency of 30% and a gain of 50.8 dB. As the injected power increases from 10 to 100 kW, the frequency control range extends from 30 to 130 MHz.
Autors: Renzhen Xiao;Changhua Chen;Yuqun Deng;Jiawei Li;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Jan 2018, volume: 65, issue:1, pages: 263 - 269
Publisher: IEEE
 
» A High-Precision Method of Phase-Derived Velocity Measurement and Its Application in Motion Compensation of ISAR Imaging
Abstract:
The existing methods for motion compensation in inverse synthetic aperture radar (ISAR) imaging are generally limited to the low-order target motion model, and require iterative optimization with limited velocity estimate precision and heavy computational burdens. This paper proposes a high-precision method of phase-derived velocity measurement (PDVM) and applies it to motion compensation of ISAR imaging. The method applies PDVM based on range profiles cross correlation to the translational velocity estimation of targets, and converts the velocity measurement results to the corresponding range increment. The equivalent phase-derived range measurement precision can reach the order of magnitude of millimeter (mm) or even sub-mm, which can satisfy the precision requirements of both envelope alignment and phase adjustment. The key to realizing PDVM is resolving phase ambiguity. The traditional method for resolving ambiguity has very high requirements for the signal-to-noise ratio (SNR). This work resolves ambiguity by combining multiframe data, i.e., by resolving ambiguity of multiframe data simultaneously instead of resolving ambiguity of single-frame data independently and correcting the above ambiguity-resolving results using a minimum-entropy method. Therefore, phase ambiguity can be correctly resolved under a relatively low SNR. Experimental results of an ISAR imaging of an airplane show that the method proposed in this paper can obtain high-quality ISAR imagery, and can efficiently realize robust imaging under the conditions of low SNR.
Autors: Huayu Fan;Lixiang Ren;Erke Mao;Quanhua Liu;
Appeared in: IEEE Transactions on Geoscience and Remote Sensing
Publication date: Jan 2018, volume: 56, issue:1, pages: 60 - 77
Publisher: IEEE
 

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