ATA556711N-DDT part details
CategoryRF/IF => RF Die Products
TitleIc Idic R/w 330bit 0pf
DatasheetDownload ATA556711N-DDT datasheet


Features, Applications

· Contactless Read/Write Data Transmission· Radio Frequency fRF from 100 kHz to 150 kHz· e5551, T5557 Binary Compatible· Extended Mode· Small Size, Configurable for ISO/IEC 11784/785 Compatibility· 75 pF On-chip Resonant Capacitor (Mask Option)· × 32-bit EEPROM Data Memory Including 32-bit Password· Separate 64-bit Memory for Traceability Data· 32-bit Configuration Register in EEPROM to Setup:

­ Data Rate· to RF/128, Binary Selectable, or· Fixed e5550 Data Rates

­ Other Options· Password Mode· Max Block Feature· Answer-On-Request (AOR) Mode· Inverse Data Output· Direct Access Mode· Sequence Terminator(s)· Write Protection (Through Lock-bit per Block)· Fast Write Method (5 Kbps versus 2 Kbps)· OTP Functionality· POR Delay 67 ms

The is a contactless R/W IDentification IC (IDIC®) for applications in the 125-kHz frequency range. A single coil, connected to the chip, serves as the IC's power supply and bi-directional communication interface. The antenna and chip together form a transponder or tag.

The on-chip 330-bit EEPROM (10 blocks, 33 bits each) can be read and written blockwise from a reader. Block 0 is reserved for setting the operation modes of the ATA5567 tag. Block 7 may contain a password to prevent unauthorized writing.

Data is transmitted from the IDIC using load modulation. This is achieved by damping the RF field with a resistive load between the two terminals Coil 1 and Coil 2. The IC receives and decodes 100% amplitude-modulated (OOK) pulse-interval-encoded bit streams from the base station or reader.

The AFE includes all circuits which are directly connected to the coil. It generates the IC's power supply and handles the bi-directional data communication with the reader. It consists of the following blocks:

· Rectifier to generate a DC supply voltage from the AC coil voltage· Clock extractor· Switchable load between Coil 1 and Coil 2 for data transmission from the tag to the reader· Field gap detector for data transmission from the base station to the tag· ESD protection circuitry

The data rate is binary programmable to operate at any data rate between RF/2 and RF/128 or equal to any of the fixed e5550/e5551 and T5554 bit rates RF/64, RF/100, and RF/128).

This function decodes the write gaps and verifies the validity of the data stream according to the Atmel e555x write method (pulse interval encoding).

This on-chip charge pump circuit generates the high voltage required for programming of the EEPROM.

Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and regulates this RF source and uses it to generate its supply voltage.

This circuit delays the IDIC functionality until an acceptable voltage threshold has been reached.
The clock extraction circuit uses the external RF signal as its internal clock source.

· Loads mode register with configuration data from EEPROM block 0 after power-on and also during reading

· Controls memory access (read, write)· Handles write data transmission and write error modes The first two bits of the reader to tag data stream are the opcode, for example, write, direct access, or reset.

In password mode, the 32 bits received after the opcode are compared with the password stored in memory block 7.

The mode register stores the configuration data from the EEPROM block It is continually refreshed at the start of every block read and (re-)loaded after any POR event or reset command. On delivery, the mode register is preprogrammed with the value 0014 8000h which corresponds to continuous read of block 0, Manchester coded, RF/64.

Others parts numbering
ATA556714N-DDB: Ic Idic R/w 330bit 75pf
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ATA556711-TASY: Ic Idic R/w 330bit 0pf 8-soic
ATA556715-PAE: Ic Idic R/w 330bit 330pf Noa3
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