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Details, datasheet, quote on part number:PCA1550A
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| Part: | PCA1550A |
| Category: | Timing Circuits => PLL (Phase locked loop) |
| Description: | Frequency (MHz) = 1500-1600 ;; Step Size (KHz) = 1000 ;; Power (dBm) = 1.5 2.5 ;; RMS Phase Error (°) = 1.00 ;; Side Band Spurs (dBm) = -70 ;; VCC (Vdc) = 5 ;; Icc (mA) = 37 ;; Package = CPLL |
| Company: | Z Communications |
| Datasheet: | Download PCA1550A datasheet File size : 56 kB |
| Request For quote: | Find where to buy PCA1550A
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Datasheet text preview:
PCA1550A
9939 Via Pasar · San Diego, CA 92126 TEL (858) 621-2700 FAX (858) 621-2722
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-50 -60 -70 -80 -90
FEATURES · Frequency Range: 1500 - 1600 MHz · Step Size: 1000 KHz · cPLL - Style Package APPLICATIONS · Fixed Wireless Broadband Equipment · Point-to-Point Microwave Radio · Satellite Communication Systems PERFORMANCE SPECIFICATIONS
Frequency Range RMS Phase Error (100 Hz - 100 KHz) Harmonic Suppression (2nd, typ.) Sideband Spurs (typ.) Power Output Load Impedance Step Size Charge Pump Output Current Switching Speed (typ., adjacent channel) Startup Lock Time (typ.) Operating Temperature Range Package Style
-100 -110 -120 -130 -140 100 1000 10000 100000
VALUE 1500 - 1600 1.0 -20 -70 1.5±2.5 50 1000 1250 2 3 -40 to 85 cPLL 5 37 APPLICATION NOTES
UNITS MHz ° dBc dBc dBm
KHz
µ
mSec mSec °C
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.) Supply Current (Icc, typ.)
Vdc mA
All specifications are typical unless otherwise noted and subject to change without notice.
· AN-107 : How to Solder Z-COMM VCOs / PLLs · AN-200 : Mounting and Grounding of Z-COMM PLLs · AN-201 : PLL Fundamentals AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz© Z-Communications, Inc. Page 1
All rights reserved
LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP
PLL OUTPUT SPECTRUM
0 -10 -20 -30
PCA1PA50A 5 GE 2
POWER
-40 -50 -60 -70 -80 -90 -100 -5 -4 -3 -2 -1 1 5 5 0 MHz +1 +2 +3 +4 +5
FREQUENCY OFFSET (KHz)
POWER CURVE, typ.
7 6 5 4 3 2 1 0 -1 -2 1500
25
°c
1511
1522
1533
1544
1555
1566
1577
1588
1600
PHYSICAL DIMENSIONS
12 11 10
1. The inside radius of all 14 half holes at the perimeter of the board are plated to provide a surface for the attachment of the PLL Module to the motherboard. 5 pads are for grounding, 8 pads are for signal interface. 2. The surface of the shield is tin-plated and may be soldered to. The shield's base metal is brass. 3.The ground plane on the bottom side is ground and attaches to a ground track on the top side of the board as well as to the shield. 4. Unless otherwise noted all dimensions are in inches. 5.Unless otherwise noted all tolerances are as follows: .xxx = ± .010
1
9
Bottom View
2
Top View
8
3
7
P1 RF OUTPUT P2 REFERENCE OSCILLATOR INPUT
4
5
6
P3 CLOCK P4 DATA P5 LOAD ENABLE P6 LOCK DETECT
SIDE VIEW
P7 VCC P8 GROUND P9 NO CONNECTION P10-12 GROUND
© Z-Communications, Inc.
Page 2
Printed in the U.S.A.
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