|Category||Analog & Mixed-Signal Processing => Potentiometers => Digital Potentiometers|
|Description||NV DAC With Selectable Output Range And Memory|
|Datasheet||Download X79002 datasheet
FEATURES 12-Bit Resolution Selectable full scale and zero scale voltages Optional External full scale and zero scale references Programmable, non-volatile DAC initial value register Optional UP/DOWN interface Guaranteed Monotonic Operation, <0.5LSB DNL Buffered Output Option Integrated Voltage Reference Option Voltage Reference Output (1.21V) Option 6 µs settling time, full scale SPI interface, to 5 slave Address Pins Power up recall and ready output 56 Bytes of general purpose EEPROM Asynchronous clear pin and control bit VCC ±10% 20-lead TSSOP DESCRIPTION
The is a family of Single Channel Non-Volatile (NV) Digital-to-Analog Converters with integrated voltage reference, configurable output buffer, general purpose EEPROM, and selectable full scale and zero offset voltages. The X79000 series implements an SPI serial bus interface with slave address identification allowing to 32 devices on some options. The full scale and zero scale voltages and the DAC initial value register can be set via the SPI bus interface. Optional pins are provided for Up/Down style interface allowing for increment and decrement of the DAC register or 16 steps at a time. A Power On Recall circuit is implemented to keep the DAC output at high impedance on power up and to load an initial user defined value from non-volatile memory. A power up ready signal is provided to alert the system to begin operations. Additional general purpose non-volatile memory (56 Bytes) is provided for curve-fit profile setting, signal conditioning parameters, or device and system indentification.
Vout Vref Voltage Reference Power Up Logic VFB A[2:0] SCK SI CS Serial Interface and Control Logic General Purpose EEPROM DAC Initial Value Register DAC Register CLR DAC Shift Register UP DOWN Variable Gain & Level Shift Variable Gain & Level Shift DAC Core OE + Vbuf
Vout Voltage Reference Power Up Logic Variable Gain & Level Shift Variable Gain & Level Shift DAC Core OE + Vbuf RDY VFB A[5:0] SCK SI CS Serial Interface and Control Logic General Purpose EEPROM DAC Register A[4:0] SCK DAC Initial Value Register DAC Shift Register CLR SI CS Serial Interface and Control Logic General Purpose EEPROM DAC Register Power Up Logic Vref Voltage Reference Variable Gain & Level Shift Variable Gain & Level Shift
Features Voltage References Zero Scale Voltage Input/Output (VL) Full Scale Voltage Input/Output (VH) Voltage Ref Output Pin (Vref) Voltage Outputs Buffered Out (Vbuf) and Buffer Feedback (VFB) with Enable (OE) DAC Control System Control Power Ready (RDY) Y
Notes: Y = Yes, = No *All options are for 12-bit resolution, industrial temperature operating range, and a 20-pin TSSOP package.
SPI Chip Select. CMOS Input Pin. Active low. SPI Clock. CMOS Input Pin, with hysteresis. SPI Serial Data. CMOS Input Pin, with hysteresis. SPI Serial Data Output Pin. CMOS levels with high impedance state. Power-Up "Ready" Indicator Output Pin. Active low. Open drain output. Clear DAC Volatile Register Input Pin. Active high. CMOS Input Pin with hysteresis. On-chip pulldown. SPI Address Input pins. CMOS Input Pins. On-chip pulldowns. Buffer Output Enable Input Pin. Active high. CMOS Input Pin with hysteresis. On-chip pulldown. UP Input pin of the UP/DOWN interface. CMOS Input Pin with deglitching filter. On-chip pulldown. DOWN Input pin of the UP/DOWN interface. CMOS Input Pin with deglitching filter. On-chip pulldown. Power Supply Pin. Ground Pin. Unbuffered DAC Output Pin. Buffered DAC Output Pin. Feedback Pin for Buffer Stage. Bandgap Voltage Output Pin. Full Scale Voltage Input or Output Pin. Zero Scale Voltage Input or Output Pin. Do Not Connect
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