|
Details, datasheet, quote on part number:TPS9103PWLE
| |
Datasheet text preview:
TPS9103 POWER SUPPLY FOR GaAs POWER AMPLIFIERS
SLVS131A OCTOBER 1995 REVISED JULY 1996
D D D D D D D
Charge Pump Provides Negative Gate Bias for Depletion-Mode GaAs Power Amplifiers Buffered Clock Output to Drive Additional External Charge Pump 135-m High-Side Switch Controls Supply Voltage to the GaAs Power Amplifier Power-Good Circuitry Prevents High-Side Switch Turn-on Until Negative Gate Bias is Present Charge Pump Can Be Driven From the Internal Oscillator or An External Clock 10-µA Maximum Standby Current Low-Profile (1.2-mm Max Height), 20-Pin TSSOP Package
PW PACKAGE (TOP VIEW)
GATE_BIAS VC C C1 C1+ BATT_IN BATT_IN BATT_IN PGP PG GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VD D CLK BCLK GND BATT_OUT BATT_OUT BATT_OUT SW_EN OSC_EN EN
description
The TPS9103 is a highly integrated power supply for depletion-mode GaAs power amplifiers (PA) in cellular handsets and other wireless communications equipment. Functional integration and low-profile packaging combine to minimize circuit-board area and component height requirements. The device includes: a p-channel MOSFET configured as a high-side switch to control the application of power to the PA; a driver for the high-side switch with a logic-compatible input; a charge pump to provide negative gate-bias voltage; and logic to prevent turn-on of the high-side switch until gate bias is present. The high-side switch has a typical on-state resistance of 135 m. The TPS9103 is available in a 20-pin thin shrink small-outline package (TSSOP) or in chip form. Contact factory for die sales. The device operates over a junction temperature range of 25°C to 125°C.
AVAILABLE OPTIONS PACKAGED DEVICE TA 25°C to 85°C TSS0P (PW) TPS9103PWLE CHIP FORM FORM (Y) TPS9103Y
The PW package is only available left-end taped and reeled (indicated by the LE suffix on the device type).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
TPS9103 POWER SUPPLY FOR GaAs POWER AMPLIFIERS
SLVS131A OCTOBER 1995 REVISED JULY 1996
functional block diagram
BATT_IN 5, 6, 7 3 VCC VCC 2 UVLO 3 14, 15, 16 BATT_OUT
BCLK VDD EN
18 20 UVDLO
13
SW_EN
11 REF + OSC Vref
9
PG
OSC_EN
12
19 R PG Comparator
CLK
PGP
8 Inverting Charge Pump
C1 + C1 GND
4 3 10, 17
0.6R 1 GATE_BIAS
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
TPS9103 POWER SUPPLY FOR GaAs POWER AMPLIFIERS
SLVS131A OCTOBER 1995 REVISED JULY 1996
TPS9103Y chip information
This chip, when properly assembled, displays characteristics similar to the TPS9103. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform. Contact factory for die sales.
BONDING PAD ASSIGNMENTS (3) (7) (2) (1 ) (20) (19) (18) (6)
VCC VDD 2 4 C1 + C1 BATT_IN PGP PG 20
(4)
3 5, 6, 7 8 9 11 12 13 19 10, 17 GND TPS9103Y
1
GATE_BIAS
14, 15, 16 BATT_OUT
(17)
EN OSC_EN SW_EN CLK
18 BCLK
116 (5)
(16)
(15) (6)
CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJ max = 150°C
(14) (7)
TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS.
(8)
(9)
(10)
(11)
(12)
(13)
83
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
|
|
