Details, datasheet, quote on part number: TPS84210EVM-002
PartTPS84210EVM-002
CategoryProgrammers, Development Systems
TitleEval Board - Dc/dc & Ac/dc (off-line) Smp Programmers, Development System
Description
CompanyTexas Instruments, Inc.
DatasheetDownload TPS84210EVM-002 datasheet
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Specifications 
Board TypeFully Populated
Main PurposeDC/DC, Step Down
Regulator TopologyBuck
Outputs and Type1, Non-Isolated
Voltage - Output0.8 ~ 3.3 V
Current - Output2A
Voltage - Input3.3V, 5V
Frequency - Switching500kHz ~ 1MHz
Power - Output-1dBm
Utilized IC / PartTPS84210
Supplied ContentsBoard
Lead Free StatusLead Free
RoHS StatusRoHS Compliant

 

Features, Applications

The TPS84210EVM-002, TPS84610EVM-003 Evaluation Module (TPS84x10EVM-00x) is designed as an easy to use platform that facilitates an extensive evaluation of the features and performance of the Integrated Power Solution (IPS) devices. The EVM PCB may be configured with one of three IPS devices (see Table 1). Table 1. TPS84x10EVM-00x Device Configuration

DEVICE TPS84410 TPS84610 TITLE 6-V input, 2-A output sync. step-down converter with PWM 6-V input, 4-A output sync. step-down converter with PWM 6-V input, 6-A output sync. step-down converter with PWM

This user guide provides information on the correct usage of the EVM and an explanation of the numerous test points on the board.

Description

The EVM features a TPS84x10 synchronous buck IPS device configured for operation with typical 3.3-V and 5-V input bus applications. The output voltage can be set to one of five popular values by using a simple configuration jumper. In similar fashion, the switching frequency can be set to one of four values by use of a jumper. The full 4-A rated output current can be supplied by the EVM. A minimal amount of input and output capacitance is used on the board. Component pads are provided for additional input and output capacitors if desired. Monitoring test points are provided to allow measurement of efficiency, power dissipation, input ripple, output ripple, line and load regulation, and transient response. Control test points are provided for use of the PWRGD, Inhibit/UVLO, synchronization, and slow-start/tracking features of the IPS device. The EVM uses a recommended PCB layout that maximizes thermal performance and minimizes output ripple and noise.

SLUU633A September 2011 Revised February 2012 Submit Documentation Feedback

Figure 1 highlights the user interface items associated with the EVM. The polarized VIN Power terminal block is used for connection to the host input supply and the polarized VOUT Power terminal block is used for connection to the load. The terminal blocks can except to 16 AWG wire. The VIN monitor and VOUT monitor test points located near the power terminal blocks are intended to be used as voltage monitoring points where voltmeters can be connected to measure VIN and VOUT. The voltmeter references should be connected to any of the four VIN/VOUT monitor grounds test points located between the power terminal blocks. Do not use these VIN and VOUT monitoring test points as the input supply or output load connection points. The PCB traces connecting to these test points are not designed to support high currents.


 

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