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Details, datasheet, quote on part number:TPS54372
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Datasheet text preview:
Typical Size 6,4 mm X 6,6 mm
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TPS54372
SLVS430C - JUNE 2002 - REVISED OCTOBER 2003
3-A OUTPUT TRACKING/TERMINATION SYNCHRONOUS PWM SWITCHER WITH INTEGRATED FETs (SWIFT)
FEATURES D Tracks Externally Applied Reference Voltage D 60-m MOSFET Switches for High Efficiency D D D D
at 3-A Continuous Output Source or Sink Current 6% to 90% VI Output Tracking Range Wide PWM Frequency: Fixed 350 kHz or Adjustable 280 kHz to 700 kHz Load Protected by Peak Current Limit and Thermal Shutdown Integrated Solution Reduces Board Area and Total Cost
DESCRIPTION
As a member of the SWIFT family of dc/dc regulators, the TPS54372 low-input voltage high-output current synchronous-buck PWM converter integrates all required active components. Included on the substrate with the listed features are a true, high performance, voltage error amplifier that enables maximum performance under transient conditions and flexibility in choosing the output filter L and C components; an under-voltage-lockout circuit to prevent start-up until the input voltage reaches 3 V; an internally and externally set slow-start circuit to limit in-rush currents; and a status output to indicate valid operating conditions. The TPS54372 is available in a thermally enhanced 20-pin TSSOP (PWP) PowerPAD package, which eliminates bulky heatsinks. TI provides evaluation modules and the SWIFT designer software tool to aid in quickly achieving high-performance power supply designs to meet aggressive equipment development cycles.
APPLICATIONS D DDR Memory Termination Voltage D Active Termination of GTL and SSTL D D Precision Point of Load Power Supply
SIMPLIFIED SCHEMATIC
SIMPLIFIED SCHEMATIC VDDQ VIN PH TPS54372 BOOT PGND REFIN VBIAS AGND VSENSE COMP
High-Speed Logic Families DAC Controlled High Current Output Stage
TRANSIENT RESPONSE
VO - Output Voltage - 50 mV/div
Input VTTQ
VI = 5 V, VO = 1.25 V I O - Output Current - 1 A/div
0 A to 2.25 A
Compensation Network
t - Time - 25 ms/div
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD and SWIFT are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
TPS54372
SLVS430C - JUNE 2002 - REVISED OCTOBER 2003
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA -40°C to 85°C
(1)
REFIN VOLTAGE 0.2 V to 1.75 V
PACKAGE Plastic HTSSOP (PWP)(1)
PART NUMBER TPS54372PWP
The PWP package is also available taped and reeled. Add an R suffix to the device type (i.e., TPS54372PWPR). See the application section of the data sheet for PowerPAD drawing and layout information.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1) TPS54372 VIN, ENA RT Input voltage range, VI VSENSE, REFIN BOOT VBIAS, COMP, STATUS Output voltage range, VO Source current, IO PH PH COMP, VBIAS PH Sink current, IS Voltage differential Operating virtual junction temperature range, TJ Storage temperature, Tstg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
UNITS
-0.3 V to 7 -0.3 V to 6 -0.3 V to 4 -0.3 V to 17 -0.3 V to 7 -0.6 V to 6 Internally limited 6 6 6 10 ±0.3 -40 to 125 -65 to 150 300 mA V °C °C °C mA A V V
COMP ENA, STATUS AGND to PGND
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN Input voltage, VI Operating junction temperature, TJ 3 -40 NOM MAX 6 125 UNIT V °C
DISSIPATION RATINGS(1)(2)
PACKAGE 20 Pin PWP with solder 20 Pin PWP without solder
(1)
THERMAL IMPEDANCE JUNCTION-TO-AMBIENT 26.0°C/W 57.5°C/W
TA = 25°C POWER RATING 3.85 W(3) 1.73 W
TA = 70°C POWER RATING 2.11 W 0.96 W
TA = 85°C POWER RATING 1.54 W 0.69 W
For more information on the PWP package, refer to TI technical brief, literature number SLMA002. (2) Test board conditions: 1. 3" x 3", 4 layers, thickness: 0.062" 2. 1.5 oz. copper traces located on the top of the PCB 3. 1.5 oz. copper ground plane on the bottom of the PCB 4. 10 thermal vias (see Recommended Land Pattern in applications section of this data sheet) (3) Maximum power dissipation may be limited by over current protection.
2
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TPS54372
SLVS430C - JUNE 2002 - REVISED OCTOBER 2003
ELECTRICAL CHARACTERISTICS
TJ = 40°C to 125°C, VI = 3 V to 6 V (unless otherwise noted) PARAMETER SUPPLY VOLTAGE, VIN VIN I(Q) Input voltage range fs = 350 kHz, RT open, PH pin open Quiescent current fs = 500 kHz, RT = 100 k, PH pin open Shutdown, ENA = 0 V UNDER VOLTAGE LOCK OUT Start threshold voltage, UVLO Stop threshold voltage, UVLO Hysteresis voltage, UVLO Rising and falling edge deglitch, UVLO(1) BIAS VOLTAGE Output voltage, VBIAS Output current, VBIAS (2) REGULATION Line regulation(1)(3) Load regulation(1)(3) OSCILLATOR Internally set free running frequency Externally set free running frequency range Ramp valley(1) Ramp amplitude (peak-to-peak)(1) Minimum controllable on time(1) Maximum duty cycle(1) ERROR AMPLIFIER Error amplifier open loop voltage gain Error amplifier unity gain bandwidth Error amplifier common mode input voltage range Input bias current, VSENSE Output voltage slew rate (symmetric), COMP(1) PWM COMPARATOR PWM comparator propagation delay time, PWM comparator input to PH pin (excluding deadtime)
(1) (2)
TEST CONDITIONS
MIN 3.0
TYP
MAX 6.0
UNIT V mA
6.2 8.4 1 2.95 2.70 0.14 2.80 0.16 2.5
9.60 12.8 1.4 3.0 V V V µs 2.90 100 V µA %/V %/A kHz kHz V V 200 ns
I(VBIAS) = 0
2.70
2.80
IL = 1.5 A, fs = 350 kHz, TJ = 85°C IL = 0 A to 3 A, fs = 350 kHz, TJ = 85°C RT open RT = 180 k (1% resistor to AGND)(1) RT = 100 k (1% resistor to AGND) RT = 68 k (1% resistor to AGND)(1) 280 252 460 663 350 280 500 700 0.75 1 90% 1 k COMP to AGND(1) Parallel 10 k, 160 pF COMP to AGND(1) Powered by internal LDO(1) VSENSE = Vref 1.0 90 3 0 60 1.4 110 5
0.07 0.03 420 308 540 762
dB MHz VBIAS 250 V nA V/µs
10-mV overdrive(1)
70
85
ns
Specified by design Static resistive loads only (3) Specified by the circuit used in Figure 8
3
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