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Details, datasheet, quote on part number:TPS54352PWP
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Datasheet text preview:
6,4 mm y 5,0 mm
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TPS54352, TPS54353 TPS54354, TPS54355 TPS54356, TPS54357
SLVS519 - MAY 2004
4.5 V TO 20 V INPUT, 3 A OUTPUT SYNCHRONOUS PWM SWITCHER WITH INTEGRATED FET (SWIFT)
FEATURES D 100 m, 4.5-A Peak MOSFET Switch for High D D D D D D D D D D
Efficiency at 3-A Continuous Output Current Uses External Lowside MOSFET or Diode Fixed Output Versions - 1.2V/1.5V/1.8V/2.5V/3.3V/5.0V Internally Compensated for Low Parts Count Synchronizes to External Clock 1805 Out of Phase Synchronization Wide PWM Frequency - Fixed 250 kHz, 500 kHz or Adjustable 250 kHz to 700 kHz Internal Slow Start Load Protected by Peak Current Limit and Thermal Shutdown Adjustable Undervoltage Lockout 16-Pin TSSOP PowerPADE Package
DESCRIPTION
The TPS5435x is a medium output current synchronous buck PWM converter with an integrated high side MOSFET and a gate driver for an optional low side external MOSFET. Features include a high performance voltage error amplifier that enables maximum performance under transient conditions. The TPS5435x has an under-voltage-lockout circuit to prevent start-up until the input voltage reaches a preset value; an internal slow-start circuit to limit in-rush currents; and a power good output to indicate valid output conditions. The synchronization feature is configurable as either an input or an output for easy 180° out of phase synchronization. The TPS5435x devices are available in a thermally enhanced 16-pin TSSOP (PWP) PowerPAD package. TI provides evaluation modules and the SWIFT Designer software tool to aid in quickly achieving high-performance power supply designs to meet aggressive equipment development cycles.
EFFICIENCY vs OUTPUT CURRENT
100 95 90 Efficiency - % 85 80 75 70 65 60 VI= 12 V VO= 3.3 V fs = 500 kHz 0 1 2 3 4 VI = 6 V VI = 12 V
APPLICATIONS D Industrial & Commercial Low Power Systems D LCD Monitors and TVs D Computer Peripherals D Point of Load Regulation for High
Performance DSPs, FPGAs, ASICs and Microprocessors
SIMPLIFIED SCHEMATIC
Input Voltage
VIN
TPS54356
SYNC PWRGD ENA BIAS BOOT PH LSG PGND VSENSE PWRPAD
55 50
IO - Output Current - A
Output Voltage
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD and SWIFT are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2004, Texas Instruments Incorporated
TPS54352, TPS54353 TPS54354, TPS54355 TPS54356, TPS54357
SLVS519 - MAY 2004
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA OUTPUT VOLTAGE 1.2 V 1.5 V -40°C to 85°C 1.8 V 2.5 V 3.3 V PACKAGE Plastic HTSSOP (PWP) Plastic HTSSOP (PWP) Plastic HTSSOP (PWP) Plastic HTSSOP (PWP) Plastic HTSSOP (PWP) PART NUMBER TPS54352PWP TPS54353PWP TPS54354PWP TPS54355PWP TPS54356PWP
5.0 V Plastic HTSSOP (PWP) TPS54357PWP (1) The PWP package is also available taped and reeled. Add an R suffix to the device type (i.e. TPS5435xPWPR).
PACKAGE DISSIPATION RATINGS(1)
PACKAGE 16-Pin PWP with solder(2) 16-Pin PWP without solder THERMAL IMPEDANCE JUNCTION-TO-AMBIENT 42.1°C/W 151.9°C/W TA = 25°C POWER RATING 2.36 0.66 TA = 70°C POWER RATING 1.31 0.36 TA = 85°C POWER RATING 0.95 0.26
(1) See Figure 46 for power dissipation curves. (2) Test Board Conditions 1. Thickness: 0.062" 2. 3" x 3" 3. 2 oz. Copper traces located on the top and bottom of the PCB for soldering 4. Copper areas located on the top and bottom of the PCB for soldering 5. Power and ground planes, 1 oz. copper (0.036 mm thick) 6. Thermal vias, 0.33 mm diameter, 1.5 mm pitch 7. Thermal isolation of power plane For more information, refer to TI technical brief SLMA002.
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TPS54352, TPS54353 TPS54354, TPS54355 TPS54356, TPS54357
SLVS519 - MAY 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1) UNIT VIN VSENSE UVLO Input voltage range, VI SYNC ENA BOOT VBIAS LSG SYNC Output voltage range, VO RT PWRGD COMP PH PH Source current, IO LSG (Steady State Current) COMP, VBIAS SYNC LSG (Steady State Current) Sink current, IS PH (Steady State Current) COMP ENA, PWRGD Voltage differential Storage temperature, Tstg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds AGND to PGND Operating virtual junction temperature range, TJ -0.3 V to 21.5 V -0.3 V to 8.0 V -0.3 V to 8.0 V -0.3 V to 4.0 V -0.3 V to 4.0 V VI(PH) + 8.0 V -0.3 to 8.5 V -0.3 to 8.5 V -0.3 to 4.0 V -0.3 to 4.0 V -0.3 to 6.0 V -0.3 to 4.0 V -1.5 V to 22 V Internally Limited (A) 10 mA 3 mA 5 mA 100 mA 500 mA 3 mA 10 mA ±0.3 V -40°C to +150°C -65°C to +150°C 260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ELECTROSTATIC DISCHARGE (ESD) PROTECTION
MIN Human body model CDM MAX 600 1.5 UNIT V kV
RECOMMENDED OPERATING CONDITIONS
MIN TPS54352-6 Input voltage range, VI Operating junction temperature, TJ TPS54357 4.5 6.65 -40 NOM MAX 20 20 125 V °C UNIT
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