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Details, datasheet, quote on part number:TPS3510DR
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| Part: | TPS3510DR |
| Category: | Power Management => Supervisory Circuits |
| Description: | ti TPS3510, 3-Channel Supervisor For Switch-mode Power Supplies |
| Company: | Texas Instruments, Inc. |
| Datasheet: | Download TPS3510DR datasheet File size : 227 kB |
| Request For quote: | Find where to buy TPS3510DR
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Datasheet text preview:
TPS3510,TPS3511 PC POWER SUPPLY SUPERVISORS
SLVS312A JULY 2000 REVISED DECEMBER 2002
D Overvoltage Protection and Lockout for D D D D D D D D D
12 V, 5 V, 3.3 V Undervoltage Protection and Lockout for 5 V and 3.3 V Fault Protection Output With Open-Drain Output Stage Open-Drain Power Good Output Signal for Power Good Input, 3.3 V and 5 V Power Good Delay; 300-ms TPS3510, 150-ms TPS3511 75-ms Delay for 5-V and 3.3-V Power Supply Short-Circuit Turnon Protection 2.3-ms PSON Control to FPO Turnoff Delay 38-ms PSON Control Debounce 73-µs Width Noise Deglitches Wide Supply Voltage Range From 4 V to 15 V
PGI GND FPO PSON
D OR P PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5
PGO VDD VS5 VS33
description
The TPS3510/1 is designed to minimize external components of personal-computer switching power supply systems. It provides protection circuits, power good indicator, fault protection output (FPO) and PSON control. Overvoltage protection (OVP) monitors 3.3 V, 5 V, and 12 V (12-V signal detects via VDD pin). Undervoltage protection (UVP) monitors 3.3 V and 5 V. When an OV or UV condition is detected, the power good output (PGO) is set to low and FPO is latched high. PSON from low to high resets the protection latch. UVP function is enabled 75 ms after PSON is set low and debounced. Furthermore, there is a 2.3-ms delay (and an additional 38-ms debounce) at turnoff. There is no delay during turnon. Power good feature monitors PGI, 3.3 V and 5 V and issues a power good signal when the output is ready. The TPS3510/1 is characterized for operation from 40°C to 85°C.
typical application
5 VSB PGI PGO 12 V 1 8 PGO PGI 2 7 VDD GND 3 6 VS5 FPO 4 5 PSON VS33 0.5 V Drop VSB 5V 3.3 V
PSON (From Motherboard)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2002, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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TPS3510,TPS3511 PC POWER SUPPLY SUPERVISORS
SLVS312A JULY 2000 REVISED DECEMBER 2002
FUNCTION TABLE PGI 1.15 V PGI > 1.15 V PGI > 1.15 V x PSON L L L L L L L L L H UV CONDITION (3.3 V OR 5 V) no no yes no no yes no no yes x OV CONDITION (3.3 V, 5 V, OR 12 V) no yes no no yes no no yes no x FPO L H L L H H L H H H PGO L L L L L L H L L L
x = don't care FPO = L means: fault IS NOT latched FPO = H means: fault IS latched PGO = L means: fault PGO = H means: NO fault
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
TPS3510,TPS3511 PC POWER SUPPLY SUPERVISORS
SLVS312A JULY 2000 REVISED DECEMBER 2002
functional block diagram
VDD 12 V OV + _ POR
VS5
R 5 V OV + _ 73-µs Debounce S Q FPO
VS33
73-µs Debounce
2.3-ms Delay
VDD
3.3 V OV + _
38-ms Debounce
PSON
3.3 V UV + _ 5 V UV + _ + _ PGI1 150-µs Debounce
75-ms Delay VDD
PGO Delay
Band-Gap Reference 1.15 V PGI
PGI2 + _ Band-Gap Reference 0.95 V 150-µs Debounce and 4.8-ms Delay
300 ms for TPS3510 and 150 ms for TPS3511
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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