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Details, datasheet, quote on part number:TPS3307-18MJGB
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Datasheet text preview:
TPS3307-18M TRIPLE PROCESSOR SUPERVISORS
SGLS133 JANUARY 2003
D Qualified for Military Applications D ESD Protection Exceeds 2000 V Per D D D D D D D D
MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Triple Supervisory Circuits for DSP and Processor-Based Systems Power-On Reset Generator with Fixed Delay Time of 200 ms, No External Capacitor Needed Temperature-Compensated Voltage Reference Maximum Supply Current of 40 µA Supply Voltage Range . . . 2 V to 6 V Defined RESET Output from VDD 1.1 V CDIP-8 and LCCC-20 Packages Temperature Range . . . 55°C to 125°C
SENSE1 SENSE2 SENSE3 GND
JG PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5
VDD MR RESET RESET
FK PACKAGE (TOP VIEW)
SENSE1
V DD RESET
NC
NC
1
3
2
20 19 18 NC 17 MR 16 NC 15 RESET 14 NC
NC SENSE2 NC SENSE3 NC
4 5 6 7 8 9 10 11 12 13
typical applications
Figure 1 lists some of the typical applications for the TPS3307 family, and a schematic diagram for a processor-based system application. This application uses TI part numbers TPS330718 and SMJ320C6201B.
2.5 V 3.3 V 1.8 V
GND
NC
NC
NC No internal connection
VDD SENSE 1 SENSE 2 470 k RESET
100 nF
VDD SMJ320C6201B RESET GND
· · ·
Military applications using DSPs, Microcontrollers or Microprocessors Industrial Equipment Programmable Controls
TPS3307-18 SENSE 3
620 k
GND
Figure 1. Applications Using the TPS3307-18
description
The TPS3307-18 is a micropower supply voltage supervisor designed for circuit initialization primarily in automotive DSP and processor-based systems, which require more than one supply voltage. The TPS3307-18 is designed for monitoring three independent supply voltages: 3.3 V/1.8 V/adj,. The adjustable SENSE input allows the monitoring of any supply voltage >1.25 V.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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NC
NC
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TPS3307-18M TRIPLE PROCESSOR SUPERVISORS
SGLS133 JANUARY 2003
description (continued)
The various supply voltage supervisors are designed to monitor the nominal supply voltage as shown in the following supply voltage monitoring table.
SUPPLY VOLTAGE MONITORING NOMINAL SUPERVISED VOLTAGE DEVICE TPS3307-18 SENSE1 3.3 V SENSE2 1.8 V SENSE3 User defined THRESHOLD VOLTAGE (TYP) SENSE1 2.93 V SENSE2 1.68 V SENSE3 1.25 V
The actual sense voltage has to be adjusted by an external resistor divider according to the application requirements.
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors the SENSEn inputs and keeps RESET active as long as SENSEn remain below the threshold voltage VIT+. An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, td typ = 200 ms, starts after all SENSEn inputs have risen above the threshold voltage VIT+. When the voltage at any SENSE input drops below the threshold voltage VIT, the RESET output becomes active (low) again. The TPS3307-18 incorporates a manual reset input, MR. A low level at MR causes RESET to become active. In addition to the active-low RESET output, the TPS3307-18 includes an active-high RESET output. ORDERING INFORMATION
TA 55°C to 125°C to 125°C PACKAGE Ceramic Dual In Line (JG) Leadless Ceramic Chip Carrier (FK) ORDERABLE PART NUMBER TPS3307-18MJGB TPS3307-18MFKB TOP-SIDE MARKING TPS3307-18MJGB TPS3307-18MFKB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION/TRUTH TABLES MR L H H H H H H H H X = Don't care SENSE1>VIT1 X 0 0 0 0 1 1 1 1 SENSE2>VIT2 X 0 0 1 1 0 0 1 1 SENSE3>VIT3 X 0 1 0 1 0 1 0 1 RESET L L L L L L L L H RESET H H H H H H H H L
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TPS3307-18M TRIPLE PROCESSOR SUPERVISORS
SGLS133 JANUARY 2003
functional block diagram
VDD 14 k MR R1 SENSE 1 R2 R3 SENSE 2 R4 GND Reference Voltage of 1.25 V SENSE 3 + _ + _ RESET Logic + Timer RESET RESET TPS3307
_ + Oscillator
timing diagram
SENSEn V(nom) VIT
t MR 1
0 RESET 1
t
0 td td td RESET Because of SENSE Below VIT RESET Because of MR RESET Because of SENSE Below VIT RESET Because of SENSE Below VIT
t
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TPS3307-18M TRIPLE PROCESSOR SUPERVISORS
SGLS133 JANUARY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V All other pins (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V Maximum low output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Maximum high output current, IOH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Input clamp current, IIK (VI VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C Soldering temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260_C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for more than t = 1000 h continuously. DISSIPATION RATING TABLE PACKAGE JG FK TA 25°C POWER RATING 1W 1.39 W DERATING FACTOR ABOVE TA = 25°C 6.25 mW/°C 11.58 mW/°C TA = 70°C POWER RATING 719 mW 869 mW TA = 85°C POWER RATING 625 mW 695 mW TA = 125°C POWER RATING 375 mW 232 mW
recommended operating conditions at specified temperature range
MIN Supply voltage, VDD Input voltage at MR and SENSE3, VI Input voltage at SENSE1 and SENSE2, VI High-level input voltage at MR, VIH Low-level input voltage at MR, VIL Input transition rise and fall rate at MR, t/V Operating free-air temperature range, TA 55 2 0 0 0.7xVDD 0.3×VDD 50 125 MAX 6 VDD+0.3 (VDD+0.3)VIT/1.25V UNIT V V V V V ns/V °C
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TPS3307-18M TRIPLE PROCESSOR SUPERVISORS
SGLS133 JANUARY 2003
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VDD = 2 V to 6 V, VDD = 3.3 V, VDD = 6 V, VDD = 2 V to 6 V, VOL Low-level out ut voltage output Power-up reset voltage (see Note 2) VSENSE3 VIT Negative-going input threshold voltage input threshold voltage (see Note 3) Note 3) VSENSE2 VSENSE1 VIT = 1.25 V VIT = 1.68 V VIT = 2.93 V MR SENSE1 IH High-level input current input current SENSE2 SENSE3 MR IL IDD Ci Low-level input current input current Supply current Input capacitance SENSEn MR = 0.7 × VDD, VDD = 6 V VSENSE1 = VDD = 6 V VSENSE2 = VDD = 6 V VSENSE3 = VDD MR = 0 V, VSENSE1,2,3 = 0 V VD D = 6 V 1 1 430 VDD = 2 V to 6 V VDD = 3.3 V, VDD = 6 V, VDD 1.1 V, IOH = 20 µA IOH = 2 mA IOH = 3 mA IOL = 20 µA IOL = 2 mA IOL = 3 mA IOL = 20 µA 1.22 1.64 2.86 2 2 3 1.25 1.68 2.93 10 15 30 130 5 6 MIN VDD 0.2V VDD 0.4V VDD 0.4V 0.2 0.4 0.4 0.4 1.29 1.73 3.02 30 40 60 180 8 9 1 600 1 40 µA µ µA mV V V V V TYP MAX UNIT
VOH
High-level out ut voltage output
V
Vhys
Hysteresis at VSENSEn in ut input
VI = 0 V to VDD 10 pF NOTES: 2. The lowest supply voltage at which RESET becomes active. tr, VDD 15 µs/V 3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1 µF) should be placed close to the supply terminals.
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