|Category||Discrete => Diodes & Rectifiers => Protection|
|Description||4kbit, 2kbit And 1kbit 16-bit Wide Microwire Serial Access EePROM With Block Protection|
|Company||ST Microelectronics, Inc.|
|Datasheet||Download M9346-RDS3T datasheet
|4Kbit, 2Kbit and 1Kbit (16-bit wide) MICROWIRE Serial Access EEPROM with Block Protection
Single Organization: by Word (x16) Programming Instructions that work on: Word or Entire Memory Self-timed Programming Cycle with Auto-Erase User Defined Write Protected Area Page Write Mode (4 words) Ready/Busy Signal During Programming Speed: 1MHz Clock Rate, 10ms Write Time (Current product, identified by process identification letter 2MHz Clock Rate, 5ms Write Time (New Product, identified by process identification letter W)
Sequential Read Operation Enhanced ESD/Latch-Up Behavior More than 1 Million Erase/Write Cycles More than 40 Year Data Retention
SUMMARY DESCRIPTION This specification covers a range 2K, 1K bit serial Electrically Erasable Programmable Memory (EEPROM) products (respectively for M93S46). In this text, these products are collectively referred as M93Sx6. Figure 2. Logic Diagram
PRE W VCC VSS Chip Select Input Serial Data Input Serial Data Output Serial Clock Protection Register Enable Write Enable Supply Voltage Ground
and instructions used to set the memory protection. These are summarized in Table 2 and 3). A Read Data from Memory (READ) instruction loads the address of the first word to be read into an internal address pointer. The data contained at this address is then clocked out serially. The address pointer is automatically incremented after the data is output and, if the Chip Select Input (S) is held High, the M93Sx6 can output a sequential stream of data words. In this way, the memory can be read as a data stream from to 4096 bits (for the M93S66), or continuously as the address counter automatically rolls over to 00h when the highest address is reached. Within the time required by a programming cycle (tW), to 4 words may be written with help of the Page Write instruction. the whole memory may also be erased, or set to a predetermined pattern, by using the Write All instruction. Within the memory, a user defined area may be protected against further Write instructions. The size of this area is defined by the content of a Protection Register, located outside of the memory array. As a final protection step, data may be permanently protected by programming a One Time Programming bit (OTP bit) which locks the Protection Register content. Programming is internally self-timed (the external clock signal on Serial Clock (C) may be stopped or left running after the start of a Write cycle) and does not require an erase cycle prior to the Write instruction. The Write instruction writes 16 bits at a time into one of the word locations of the M93Sx6, the Page Write instruction writes to 4 words of 16 bits to sequential locations, assuming in both cases that all addresses are outside the Write Protected area. After the start of the programming cycle, a Busy/Ready signal is available on Serial Data Output (Q) when Chip Select Input (S) is driven High. Figure 3. DIP, SO and TSSOP Connections
The M93Sx6 is accessed through a serial input (D) and output (Q) using the MICROWIRE bus protocol. The memory is divided into 64 x16 bit words (respectively for M93S56, M93S46). The M93Sx6 is accessed by a set of instructions which includes Read, Write, Page Write, Write AllNote: 1. See page 26 (onwards) for package dimensions, and how to identify pin-1.
An internal Power-on Data Protection mechanism in the M93Sx6 inhibits the device when the supply is too low. INSTRUCTIONS The instruction set of the M93Sx6 devices contains seven instructions, as summarized in Table 2 to Table 3. Each instruction consists of the following parts, as shown in Figure 4: s Each instruction is preceded by a rising edge on Chip Select Input (S) with Serial Clock (C) being held Low.
POWER-ON DATA PROTECTION To prevent data corruption and inadvertent write operations during power-up, a Power-On Reset (POR) circuit resets all internal programming circuitry, and sets the device in the Write Disable mode. At Power-up and Power-down, the device must not be selected (that is, Chip Select Input (S) must be driven Low) until the supply voltage reaches the operating value VCC specified in Table 5 to Table 6. When VCC reaches its valid level, the device is properly reset (in the Write Disable mode) and is ready to decode and execute incoming instructions. For the M93Sx6 devices (5V range) the POR threshold voltage is around 3V. For the M93Sx6W (3V range) and M93Sx6-R (2V range) the POR threshold voltage is around 1.5V.
A start bit, which is the first `1' read on Serial Data Input (D) during the rising edge of Serial Clock (C). Two op-code bits, read on Serial Data Input (D) during the rising edge of Serial Clock (C). (Some instructions also use the first two bits of the address to define the op-code). The address bits of the byte or word that to be accessed. For the M93S46, the address is made of 6 bits (see Table 2). For the M93S56 and M93S66, the address is made of 8 bits (see Table 3).
The M93Sx6 devices are fabricated in CMOS technology and are therefore able to run as slow 0 Hz (static input signals) or as fast as the maximum ratings specified in Table 16 to Table 19.
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