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Details, datasheet, quote on part number:M28256-25-6
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Datasheet text preview:
M28256
256 Kbit (32K x 8) Parallel EEPROM With Software Data Protection
NOT F OR N EW D ESIG N
s
Fast Access Time: 90 ns at VCC =5 V for M28256 120 ns at VCC=3 V for M28256-W
s
Single Supply Voltage: 4.5 V to 5.5 V for M28256 2.7 V to 3.6 V for M28256-W
28
s s
Low Power C onsumption Fast BYTE and PAGE WRITE (up to 64 Bytes) 3 ms at VCC=4.5 V for M28256 5 ms at VCC=2.7 V for M28256-W
1
PDIP 28 (B S)
PLCC32 (KA)
s
Enhanced Write Detection and Monitoring: Data Polling T oggle Bit Page Load Timer Status
28
s s s s
JEDEC Approved Bytewide Pin-Out Software Data Protection 100,000 Erase/Write Cycles (minimum) 10 Year Data Retention (minimum)
1
SO28 (MS) 300 mil width
TSO P28 (NS) 8 x 13.4 mm
DESCRIPTION The M 28256 and M28256-W devices consist of 32K x 8 bits of low power, parallel EEPROM, fabricated with STMicroelectronics' proprietary double polysilicon CMOS technology. The devices offer fast access time, with low power dissipation,
Figure 1. Logic Diagram
VCC
15
8 DQ0-DQ7
Table 1. Signal Names
A 0-A14 D Q0-D Q7 W E G VCC VSS Address Input Dat a Input / O utput Wr ite E nable Chip Enable Out put E nable Supply Voltage
A0-A14
W E G
M28256
VSS
Gro und
AI01885
April 2001
This is information on a product still in production b ut not r ecommended for new designs.
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M28256
Figure 2A. DIP Connections
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 M28256 21 20 19 18 17 16 15
AI01886
Figure 2C. SO Connections
VCC W A13 A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 M28256 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
AI01888
VCC W A13 A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3
Figure 2B. PLLC Connections
A7 A12 A14 DU VCC W A13
Figure 2D. TSOP Connections
G A11 A9 A8 A13 W VCC A14 A12 A7 A6 A5 A4 A3 22 21 A10 E DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2
1 32 A6 A5 A4 A3 A2 A1 A0 NC DQ0 A8 A9 A11 NC G A10 E DQ7 DQ6
9
M28256
25
28 1
M28256
15 14
17 DQ1 DQ2 VSS DU DQ3 DQ4 DQ5
7
8
AI01889
AI01887
Note: 1. NC = Not Connected 2. DU = Do Not Use
and require a single voltage supply (5V or 3V, depending on the option chosen). The device has been designed to offer a flexible microcontroller interface, featuring both hardware and software handshaking, with Ready/Busy, Data Polling and T oggle Bit. T he device supports a 64 byte Page Write operation. Software Data Protection (SDP) is also supported, using the standard JEDEC algorithm.
SIGNAL DESCRIPTION The external connections to the device are summarized in Table 1, and their use in Table 3. Addresses (A0-A14). The address inputs are used to select one byte from the memory array during a read or write operation. Data In/Out (DQ0-DQ7). The contents of the data byte are written to, or read from, the memory array through the Data I/O pins. Chip Enable (E). The chip enable i nput must be held l ow to enable read and write operations.
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M28 256
Table 2. Absolute Maximum Ratings 1
Symbol TA T STG VCC VIO VI VESD Parameter Am bient Operat ing Temperature Sto rage Temperature Su pply Voltage Inp ut or Outp ut Voltage Inp ut Voltage Electros tatic D ischarge Voltage (Human Body model) 2 Value 40 t o 85 65 to 150 0.3 t o 6.5 0.3 to V CC+ 0.6 0.3 t o 6.5 4000 Unit °C °C V V V V
Note: 1. Except for the rati ng "Operating T emperature Range", stresses above those liste d in t he Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above t hose indicated in t he Operating sections of t his s pecification is not impl ied. Exposure t o A bsolute M aximum R ating conditions f or extended periods may affe ct device reliability. Refer also to the ST SU RE Program and other relevant quality documents. 2. MIL-STD-88 3C, 3015.7 (100 pF, 1500 )
Figure 3. Block Diagram
E G W
VPP GEN
RESET
CONTROL LOGIC
X DECODE
A6-A14 (Page Address)
ADDRESS LATCH
256K ARRAY
A0-A5
ADDRESS LATCH
Y DECODE
SENSE AND DATA LATCH
I/O BUFFERS
PAGE LOAD TIMER STATUS TOGGLE BIT DATA POLLING
AI01697
DQ0-DQ7
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