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Details, datasheet, quote on part number:M2764A-4-6
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Datasheet text preview:
M2764A
NMOS 64 Kbit (8Kb x 8) UV EPROM
NOT FOR NEW DESIGN
s s s s s
FAST ACCESS TIME: 180ns EXTENDED TEMPERATURE RANGE SINGLE 5V SUPPLY VOLTAGE LOW STANDBY CURRENT: 35mA max TTL COMPATIBLE DURING READ and PROGRAM FAST PROGRAMMING ALGORITHM ELECTRONIC SIGNATURE PROGRAMMING VOLTAGE: 12V
1 28
s s s
DESCRIPTION The M2764A is a 65,536 bit UV erasable and electrically programmable memory EPROM. It is organized as 8,192 words by 8 bits. The M27C64A is housed in a 28 pin Window Ceramic Frit-Seal Dual-in-Line package. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.
FDIP28W (F)
Figure 1. Logic Diagram
VCC
VPP
13 A0-A12
8 Q0-Q7
P E G
M2764A
VSS
AI00776B
November 2000
This is information on a product still in production but not recommended for new designs.
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Table 2. Absolute Maximum Ratings
Symbol TA TBIAS TSTG VIO VCC VA9 VPP Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages Supply Voltage A9 Voltage Program Supply grade 1 grade 6 grade 1 grade 6 Value 0 to 70 40 to 85 10 to 80 50 to 95 65 to 125 0.6 to 6.5 0.6 to 6.5 0.6 to 13.5 0.6 to 14 Unit °C °C °C V V V V
Not e: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permane nt damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.
Figure 2. DIP Pin Connections
Read Mode The M2764A has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the outputs after the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M2764A has a standby mode which reduces the maximum active power current from 75mA to 35mA. The M2764A is placed in the standby mode by applying a TTL high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. Two Line Output Control Because EPROMs are usually used in larger memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows : a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur.
VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS
1 2 3 4 5 6 7 M2764A 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC P NC A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3
AI00777
Warning: NC = Not Connected.
DEVICE OPERATION The seven modes of operations of the M2764A are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature.
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DEVICE OPERATION (cont'd) For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is desired from a particular memory device. System Considerations T h e power switching characteristics of fast EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 1µF ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. Programming When delivered (and after each erasure for UV EPROM), all bits of the M2764A are in the "1" state. Data is introduced by selectively programming "0s" into the desired bit locations. Although only "0s" will be programmed, both "1s" and "0s" can be present in the data word. The only way to change a "0" to a "1" is by ultraviolet light erasure. The M2764A is in the programming mode when VPP input is at 12.5V and E and P are at TTL low. The data to be programmed is applied, 8 bits in parallel, to the data output pins. The levels required for the address and data inputs are TTL. Fast Programming Algorithm Fast Programming Algorithm rapidly programs M2764A EPROMs using an efficient and reliable method suited to the production programming environment. Programming reliability is also ensured as the incremental program margin of each byte is continually monitored to determine when it has
Table 3. Operating Modes
Mode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature
Not e: X = VIH or VIL, VID = 12V ± 0.5%.
E VIL VIL VIL VIL VIH VIH VIL
G VIL VIH VIH VIL X X VIL
P VIH VIH VIL Pulse VIH X X VIH
A9 X X X X X X VID
VPP VCC VCC VPP VPP VPP VCC VCC
Q0 - Q7 Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes Out
Table 4. Electronic Signature
Identifier Manufacturer's Code Device Code A0 VIL VIH Q7 0 0 Q6 0 0 Q5 1 0 Q4 0 0 Q3 0 1 Q2 0 0 Q1 0 0 Q0 0 0 Hex Data 20h 08h
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