Details, datasheet, quote on part number: K4S511633C-YL/N1H
PartK4S511633C-YL/N1H
CategoryMemory => DRAM => SDR SDRAM => 512 Mb => Mobile SDRAM
TitleMobile SDRAM
DescriptionDescription = K4S511633C 8M X 16Bit X 4 Banks Mobile Sdram ;; Organization = 32Mx16(1CS) ;; Vdd/Vddq(V) = 3.0/3.0,3.3/3.3 ;; Temperature = L,n,p ;; Current(Icc1/Icc6) = 145mA/1800uA ;; Speed = 80,1H,1L ;; Mobile Function = no ;; Package = 54CSP ;; Production Status = Mass Production ;; Comments = -
CompanySamsung Semiconductor, Inc.
DatasheetDownload K4S511633C-YL/N1H datasheet
  

 

Features, Applications

FEATURES

3.0V power supply LVCMOS compatible with multiplexed address Four banks operation MRS cycle with address key programs CAS latency Burst length Full page) Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (8K cycle) 1 /CS Support. Commercial Temperature Operation ~ 70 C). Extended Temperature Operation ~ 85 C). Industrial Temperature Operation ~ 85 C). 54balls DDP CSP

The is 536,870,912 bits synchronous high data rate Dynamic RAM organized x 8,388,608 words by 16bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

YN : Low Power, Operating Temp ~ 85 C. YL : Low Power, Operating Temp ~ 70 C. YP : Low Power, Operating Temp ~ 85 C. Note 1. In case of 33MHz Frequency, CL1 can be supported.

Column Decoder Col. Buffer Latency & Burst Length

Timing Register * Samsung Electronics reserves the right to change products or specification without notice.

Pin Function System Clock Chip Select Clock Enable Address Bank Select Address Row Address Strobe Column Address Strobe Write Enable Data Input/Output Mask Data Input/Output Power Supply/Ground Data Output Power/Ground


 

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K4S560432B Description = K4S560432B 16MB X 4Bit X 4Banks Synchronous DRAM ;; Organization = 64Mx4 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
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