Details, datasheet, quote on part number: K4S511632D-KC/L1H
PartK4S511632D-KC/L1H
CategoryMemory => DRAM => SDR SDRAM => 512 Mb
DescriptionDescription = K4S511632D 8M X 16Bit X 4 Banks Synchronous DRAM ;; Organization = 32Mx16 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 7C,75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production Status = Mass Production ;; Comments = DDP
CompanySamsung Semiconductor, Inc.
DatasheetDownload K4S511632D-KC/L1H datasheet
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Features, Applications

This is to advise Samsung customers that in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as mainframes, servers, work stations or desk top personal computers (hereinafter "Prohibited Computer Use"). Applications such as mobile, including cell phones, telecom, including televisions and display monitors, or non-desktop computer systems, including laptops, notebook computers, are , however, permissible. "Multi-Die Plastic" is defined as two or more Dram die encapsulated within a single plastic leaded package

* Samsung Electronics reserves the right to change products or specification without notice.
FEATURES

JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs CAS latency & 3) Burst length Full page) Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (8K Cycle) Part No. K4S511632D-KC/L1H K4S511632D-KC/L1L

The is 536,870,912 bits synchronous high data rate Dynamic RAM organized by 16bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.



 

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K4S511632D-KC/L1L
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K4S511632D-KC/L1L Description = K4S511632D 8M X 16Bit X 4 Banks Synchronous DRAM ;; Organization = 32Mx16 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 7C,75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
K4S511632M Description = K4S511632M 8M X 16Bit X 4 Banks Synchronous DRAM ;; Organization = 32Mx16 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
K4S511633C Description = K4S511633C 8M X 16Bit X 4 Banks Mobile Sdram ;; Organization = 32Mx16(1CS) ;; Vdd/Vddq(V) = 3.0/3.0,3.3/3.3 ;; Temperature = L,n,p ;; Current(Icc1/Icc6) = 145mA/1800uA ;; Speed = 80,1H,1L
K4S51163LC Description = K4S51163LC 8M X 16Bit X 4 Banks Mobile Sdram ;; Organization = 32Mx16(1CS) ;; Vdd/Vddq(V) = 2.5/2.5,2.5/1.8 ;; Temperature = G,s ;; Current(Icc1/Icc6) = 120/1600uA ;; Speed = 1H,1L,15 ;; Mobile
K4S513233C Description = K4S513233C 4M X 32Bit X 4 Banks Sdram ;; Organization = 16Mx32 ;; Vdd/Vddq(V) = 3.0/3.0,3.3/3.3 ;; Temperature = L,n,p ;; Current(Icc1/Icc6) = 150mA/1800uA ;; Speed = 80,1H,1L ;; Mobile Function
K4S51323LC Description = K4S51323LC 4M X 32Bit X 4 Banks Mobile Sdram ;; Organization = 16Mx32 ;; Vdd/Vddq(V) = 2.5/2.5,2.5/1.8 ;; Temperature = G,s ;; Current(Icc1/Icc6) = 120mA/1600uA ;; Speed = 1H,1L,15 ;; Mobile
K4S560432A Description = K4S560432A 16MBx4Bitx4Banks Synchronous DRAM ;; Organization = 64Mx4 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
K4S560432B Description = K4S560432B 16MB X 4Bit X 4Banks Synchronous DRAM ;; Organization = 64Mx4 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
K4S560432C Description = K4S560432C 16Mx4Bitx4Banks Synchronous DRAM ;; Organization = 64Mx4 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 7C,75,1H,1L ;; Package = 54TSOP2 ;; Power = B,i,p,e,n ;; Production
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K4S560432D Description = K4S560432D 16M X 4bit X 4Banks Synchronous DRAM LVTTL ;; Organization = 64Mx4 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 7A,1H,1L ;; Package = 54TSOP2,54sTSOP2 ;; Power
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K4S560832B Description = K4S560832B 8MB X 8Bit X 4Banks Synchronous DRAM ;; Organization = 32Mx8 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
K4S560832C Description = K4S560832C 8M X 8Bit X 4 Banks Synchronous DRAM ;; Organization = 32Mx8 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 7C,75,1H,1L ;; Package = 54TSOP2 ;; Power = B,i,p,e,n
K4S560832C-TC/L1H Description = K4S560832C 8M X 8Bit X 4Banks Synchronous DRAM ;; Organization = 32Mx8 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75,1H,1L ;; Package = 54TSOP2 ;; Power = C,l ;; Production
K4S560832D Description = K4S560832D 8Mx8bitx4Banks Synchronous DRAM LVTTL ;; Organization = 32Mx8 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 7A,1H,1L ;; Package = 54TSOP2,54sTSOP2 ;; Power = C,l ;; Production
K4S560832E Description = K4S560832E 256Mb E-die SDRAM(16M X 4Bit X 4 Banks / 8M X 8Bit X 4 Banks / 4M X 16Bit X 4 Banks) ;; Organization = 32Mx8 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = 75 ;; Package
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