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Details, datasheet, quote on part number:PCA9540B
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| Part: | PCA9540B |
| Category: | Logic => Encoders/Multiplexers |
| Description: | 2-channel i C Multiplexer.<<<>>>the PCA9540B is a 1-of-2 Bi-directional Translating Multiplexer, Controlled Via The i C-bus. The Scl/sda Upstream PaIR Fans Out to Two Scx/sdx Downstream Pairs, or Channels. Only One Scx/sdx Channel is Selected at a Time, Determined BY The Contents of The Programmable Control Register. <<<>>><<<>>>Features 1-of-2 Bi-directional Translating Multiplexer <<<>>>I C Interface Logic; Compatible With Smbus Standards <<<>>>Channel Selection Via i C Bus <<<>>>Power up With All Multiplexer Channels Deselected <<<>>>Low Rdson Switches <<<>>>Allows Voltage Level Translation Between 1.8 V, 2.5 V, 3.3 V And 5 V Buses <<<>>>No Glitch on Power-up <<<>>>Supports Hot Insertion <<<>>>Low Stand-by Current <<<>>>Operating Power Supply Voltage Range of 2.3 V to 5.5 V <<<>>>5 V Tolerant Inputs <<<>>>0 to 400 KHZ Clock Frequency <<<>>>ESD Protection Exceeds 2000 V HBM Per JESD22-A114, 200 V MM Per JESD22-A115 And 1000 V Per JESD22-C101 <<<>>>Latch-up Testing is Done to Jesdec Standard JESD78 Which Exceeds 100 ma <<<>>>Packages Offered: SO8, TSSOP8 |
| Company: | Philips Semiconductors |
| Datasheet: | Download PCA9540B datasheet File size : 110 kB |
| Request For quote: | Find where to buy PCA9540B
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Datasheet text preview:
INTEGRATED CIRCUITS
PCA9540B 2-channel I2C multiplexer
Product data 2004 Apr 13
Philips Semiconductors
Philips Semiconductors
Product data
2-channel I2C multiplexer
PCA9540B
FEATURES
· 1-of-2 bi-directional translating multiplexer · I2C interface logic; compatible with SMBus standards · Channel selection via I2C bus · Power up with all multiplexer channels deselected · Low RdsON switches · Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and
5 V buses
· No glitch on power-up · Supports hot insertion · Low stand-by current · Operating power supply voltage range of 2.3 V to 5.5 V · 5 V tolerant Inputs · 0 to 400 kHz clock frequency · ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V per JESD22-C101
PIN CONFIGURATION
SCL SDA VDD SD0
1 2 3 4
8 7 6 5
SC1 SD1 V SS SC0
· Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
SW00491
· Packages Offered:
DESCRIPTION
Figure 1. Pin configuration SO8, TSSOP8
PIN DESCRIPTION
PIN NUMBER 1 2 3 4 5 6 7 8 SYMBOL SCL SDA VDD SD0 SC0 VSS SD1 SC1 FUNCTION Serial clock line Serial data line Supply voltage Serial data 0 Serial clock 0 Supply ground Serial data 1 Serial clock 1
The PCA9540B is a 1-of-2 bi-directional translating multiplexer, controlled via the I2C-bus. The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels. Only one SCx/SDx channel is selected at a time, determined by the contents of the programmable control register. A power-on reset function puts the registers in their default state and initializes the I2C state machine with no channels selected. The pass gates of the multiplexer are constructed such that the VDD pin can be used to limit the maximum high voltage which will be passed by the PCA9540B. This allows the use of different bus voltages on each SCx/SDx pair, so that 1.8 V, 2.5, or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors can pull the bus up to the desired voltage level for this channel. All I/O pins are 5 V tolerant. The PCA9540B has replaced the PCA9540 and all designs must migrate to the PCA9540B. PCA9540B samples can be requested from www.philipslogic.com/products/I2Cmuxes/.
ORDERING INFORMATION
PACKAGES 8-Pin Plastic SO TEMPERATURE RANGE 40 to +85 °C ORDER CODE PCA9540BD TOPSIDE MARK PA9540B DRAWING NUMBER SOT96-1 SOT505-1
8-Pin Plastic TSSOP 40 to +85 °C PCA9540BDP 9540B Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2004 Apr 13
2
Philips Semiconductors
Product data
2-channel I2C multiplexer
PCA9540B
BLOCK DIAGRAM
PCA9540B
SD0
SD1
SC0
SC1
SWITCH CONTROL LOGIC V SS
VDD
Power-on Reset
SCL Input Filter SDA I2C-Bus Control
SW02211
Figure 2. Block diagram
2004 Apr 13
3
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