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Details, datasheet, quote on part number:PI74FCT16952TV
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Datasheet text preview:
Logic Block Diagram
1OEBA 2OEBA
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16952T/162952/162H952T PI74FCT16952T 16-BIT REGISTERED TRANSCEIVERS
PI74FCT162952T PI74FCT162H952T
16-Bit Registered Transceivers
Product Features:
Common Features: · PI74FCT16952T, PI74FCT162952T, and PI74FCT2H952T are high-speed, low power devices with high current drive · VCC = 5V ±10% · Hysteresis on all inputs · Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V) PI74FCT16952T Features: · High output drive: IOH = 32 mA; IOL = 64 mA · Power off disable outputs permit "live insertion" · Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C PI74FCT162952T Features: · Balanced output drivers: ±24 mA · Reduced system switching noise · Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C PI74FCT162H952T Features: · Bus Hold retains last active bus state during 3-state · Eliminates the need for external pull-up resistors
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16952T, PI74FCT162952T, and PI74FCT162H952T are 16-bit registered transceivers organized with two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (xCEAB) input must be LOW in order to enter data from xAx. The data present on the A port will be clocked on the B register when xCLKAB toggles from LOW-to-HIGH. The xOEAB control performs the output enable function on the B port. Control of data from B to A is similar, but uses the xCEBA, xCLKBA, and xOEBA inputs. By connecting the control pins of the two independent transceivers together, a full 16-bit operation can be achieved. The output buffers are designed with a Power-Off disable allowing "live insertion" of boards when used as backplane drivers. The PI74FCT16952T output buffers are designed with a PowerOff disable function allowing "live insertion" of boards when used as backplane drivers. The PI74FCT162952T has ±24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H952T has "Bus Hold" which retains the input's last state whenever the input goes to high-impedance preventing "floating" inputs and eliminating the need for pull-up/down resistors.
1CEBA
2CEBA
1CLKBA 1OEAB 1CEAB
2CLKBA 2OEAB 2CEAB
1CLKAB
2CLKAB
C
1A0 2A0
C
1B0
D C D
D C D
2B0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
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PS2042A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS
Product Pin Configuration
1OEAB 1CLKAB 1CEAB
Product Pin Description
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1CLKBA 1CEBA GND 1B0 1B1
1 2 3 4 5 6 7 8 9 10 11 56-PIN 12 V56 13 A56 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
GND 1A0
1A1 VCC 1A2 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 2A2
VCC
1B2 1B3 1B4
Pin Name xOEAB xOEBA xCEAB xCEBA xCLKAB xCLKBA xAx
GND
1B5 1B6 1B7 2B0 2B1 2B2
Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Clock Enable Input (Active LOW) B-to-A Clock Enable Input (Active LOW) A-to-B Clock Input B-to-A clock Input A-to-B Data Inputs or B-to-A 3-State Outputs (1) xBx B-to-A Data Inputs or B-to-A 3-State Outputs (1) GND Ground VCC Power Note: 1. For the PI74FCT162H952T, these pins have "Bus Hold". All other pins are standard, outputs, or I/Os.
GND
2A3 2A4 2A5
GND
2B3 2B4 2B5
Truth Table(1,2)
Inputs Outputs
VCC 2A6
2A7
VCC
2B6 2B7
xCEAB H X L L X
xCLKAB X L X
xOEAB L L L L H
xAx X X L H X
xBx B(3) B(3) L H High Z
GND 2CEAB
2CLKAB 2OEAB
GND 2CEBA
2CLKBA 2OEBA
1. H = High Voltage Level L = Low Voltage Level X = Don't Care or Irrelevant = LOW-to-HIGH Transition Z = High Impedance 2. A-to-B data flow shown, B-to-A flow control is the same, except using xCEBA, xCLKBA, and xOEBA. 3. Level of B before the indicated steady-state input conditions were established.
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PS2042A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........ 55°C to +125°C Ambient Temperature with Power Applied ........ 40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... 0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... 0.5V to +7.0V DC Input Voltage ....... 0.5V to +7.0V DC Output Current .. 120 mA Power Dissipation ........ 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 5.0V ± 10%)
Parameters Description VIH VIL II H II H II H II H IIL IIL IIL IIL IBHH I BHL IOZH(5) IOZL(5) VIK IO S IO VH Input HIGH Voltage Input LOW Voltage Input HIGH Current Input HIGH Current Input HIGH Current Input HIGH Current Input LOW Current Input LOW Current Input LOW Current Input LOW Current Bus Hold Sustain Current High-Impedance Output Current (3-STATE OUTPUTS) Clamp Diode Voltage Short Circuit Current Output Drive Current Input Hysteresis Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Standard Input, VCC = Max. Standard I/O, VCC = Max. Bus Hold Input(4), VCC = Max. Bus Hold I/O(4), VCC = Max. Standard Input, VCC = Min. Standard I/O, VCC = Min. Bus Hold Input(4), VCC = Min. Bus Hold I/O(4), VCC = Min. Bus Hold Input(4), VCC = Min. VCC = Max. VCC = Max. VCC = Min., IIN = 18 mA VCC = Max.(3), VOUT = GND VCC = Max.(3), VOUT = 2.5V Min. 2.0 VIN = VCC VIN = VCC VIN = VCC VIN = VCC VIN = GND VIN = GND VIN = GND VIN = GND VIN = 2.0V VIN = 0.8V VOUT = 2.7V VOUT = 0.5V 0.8 1 1 ±100 ±100 1 1 ±100 ±100 50 +50 1 1 0.7 140 100 1.2 200 180 Typ(2) Max. Units V V µA µA µA µA µA µA µA µA µA µA µA V mA mA mV
80 50
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Pins with Bus Hold are identified in the pin description. 5. This specification does not apply to bi-directional functionalities with Bus Hold.
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PS2042A 03/11/96
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