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Details, datasheet, quote on part number:M14427EJ4V0DS00
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Datasheet text preview:
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD444004L
4M-BIT CMOS FAST SRAM 1M-WORD BY 4-BIT
Description
The µPD444004L is a high speed, low power, 4,194,304 bits (1,048,576 words by 4 bits) CMOS static RAM. Operating supply voltage is 3.3 V ± 0.3 V. The µPD444004L is packaged in a 32-pin PLASTIC SOJ.
Features
· 1,048,576 words by 4 bits organization · Fast access time : 8, 10, 12 ns (MAX.) · Output Enable input for easy application · Single +3.3 V power supply
Ordering Information
Part number Package Access time ns (MAX.) Supply current mA (MAX.) At operating 180 160 150 At standby 5
µPD444004LLE-A8 µPD444004LLE-A10 µPD444004LLE-A12
32-pin PLASTIC SOJ (10.16 mm (400))
8 10 12
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Document No. M14427EJ4V0DS00 (4th edition) Date Published May 2002 NS CP(K) Printed in Japan
The mark
shows major revised points.
©
1999
µPD444004L
Pin Configuration (Marking Side)
/××× indicates active low signal. 32-pin PLASTIC SOJ (10.16 mm (400))
A0 A1 A2 A3 A4 /CS I/O1 VCC GND I/O2 /WE A5 A6 A7 A8 A9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
A19 A18 A17 A16 A15 /OE I/O4 GND VCC I/O3 A14 A13 A12 A11 A10 NC
A0 - A19 /CS /W E /OE VCC GND NC
: Address Inputs : Chip Select : W rite Enable : Output Enable : Power supply : Ground : No connection
I/O1 - I/O4 : Data Inputs / Outputs
Remark Refer to Package Drawing for the 1-pin index mark.
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Data Sheet M14427EJ4V0DS
µPD444004L
Block Diagram
Address buffer
A0 | A19
Row decoder
Memory cell array 4,194,304 bits
I/O1 | I/O4
Input data controller
Sense amplifier / Switching circuit Column decoder
Output data controller
Address buffer
/CS
/OE
/WE VCC GND
Truth Table
/CS H L L L /OE /W E Mode Not selected Read W rite Output disable I/O High impedance DOUT DIN High impedance Supply current ISB ICC
×
L
×
H L H
×
H
Remark × : Don't care
Data Sheet M14427EJ4V0DS
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