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Details, datasheet, quote on part number:HMP9701ACN
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Datasheet text preview:
Semiconductor
November 1998
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HMP9701A
AC'97 Audio Codec
Features
· Compliant with the Audio Codec `97 Standard
Description
The HMP9701A is the next generation PC based audio codec solution. The HMP9701A is compliant to the new AC'97 stan· High Fidelity 16-Bit Converters dard and, as such, interfaces to any AC'97 compliant digital [ /TitleC(HMP9701A) - DA SNR 87dB controller. The HMP9701A offers the designer a solution to sat/S-ubjDct SNR 85dBAudio Codec) A e C (AC'97 isfy the demand for flexibility and improved High Fidelity sound / Adh t o () in a PC environment. As part of the AC'97 PC audio standard ·Autdioir nal A/D for Microphone Pass-Through /KeC words (Harris Semiconductor, Audio Codecs, PC chitecture, the HMP9701A helps pave the way for PC'97 y Link Serial Interface Compatible with AC'97 Digital ar ·A AudioroPC'98, PC98, PC 98, PC'99, PC 99, PC99, compliant desktop, portable and entertainment PCs with a cost Cont , llers effective high-quality audio solution. THiD,dPCI Audio, AC97, AC'97, AC 97, AC'98, AC 98, · F xe 48kHz Sampling Rate As the analog front end of the AC'97 chipset, the HMP9701A · 6 Channel Input Mixer
AC98, SNR, AC Link, PC'97, PC 97, PC97, GAM accepts line level audio inputs from seven different sources and PCI Sound, Total Harmonic Distortion, Signal to Noise verts the analog audio to 16-bit digital streams of either stecon · atrogrRecorde Powerdown Modes R P io, ammabl Gain reo or mono data. The 48 kss data is transmitted to the controller via the AC'97 standard five wire interface. The controller ) · 48 Lead TQFP Package sends digital audio data to the HMP9701A to be converted to / Seat e () ·Cringlor+5V Supply analog stereo or monaural line output using two DACs. /DOCINFO pdfmark We include an additional ADC to be used for Acoustic Echo Applications Canceling needed for video conferencing applications. This [ /PageMode /UseOutlines ADC has a dedicated microphone input. It has the same high · Multimedia PC Applications quality performance as the stereo ADCs. The small 48 lead /DOCVIEWPCs pdfmark - Desk Top
- Notebook PCs - PCI Sound Cards - Motherboards · Video Conferencing · Speaker Phones TQFP (Thin 1.5mm and 7mm x 7mm footprint Quad Flat Package) makes it easy to locate the analog codec close to the analog sources. Thus, reducing noise and lowering the cost of implementation.
Ordering Information
Page
PART NUMBER HMP9701ACN HMP9701EVAL2 TEMP. RANGE (oC) 0 to 70 PACKAGE 48 Ld TQFP PKG. NO. Q48.7x7A
Table of Contents
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Serial Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Control Register Description . . . . . . . . . . . . . . . . . . . . . . . . 8 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 AC and DC Electrical Specifications . . . . . . . . . . . . . . . . . 13 ADC/DAC Filter Response Curves . . . . . . . . . . . . . . . . . . 17 AC Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PCI Bus Evaluation Board (Includes codec)
TQFP is also known as PQFP and MQFP.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© Harris Corporation 1998
File Number
4473.1
1
HMP9701A Functional Block Diagram
HMP9701A AC'97 AUDIO CODEC
MIC1 MIC2 LINE_IN CD VIDEO AUX PHONE
MIC SEL
GAIN 0dB / 20dB A/D RECORD SELECT RECORD GAIN A/D A/D
MONO SEL
MONO_OUT
MONO VOL G A M MASTER VOL GAM
G A M G A M G A M G A M G A M
AC'97 CONTROL/CONFIGURATION (64 REGISTERS)
AC LINK INTERFACE
SYNC BIT_CLK SDATA_OUT SDATA_IN RESET
GAM D/A D/A
LINE_OUT
PC_BEEP
STEREO SIGNAL PATH MONO SIGNAL PATH
Functional Description
The HMP9701A is a full-duplex stereo audio codec compliant to the AC'97 Codec specification. This component is designed for use in multimedia and business personal computers. The codec includes full duplex stereo converters, a mic pass through ADC, complete on-chip anti-alias filtering, and a 5 channel analog mixer with programmable gain and attenuation. Analog Inputs The HMP9701A has 4 stereo inputs (LINE_IN, CD, VIDEO, and AUX), two microphone level inputs (MIC1 and MIC2), and one mono line level input (PHONE). A multiplexer is provided to independently select the right and left record sources from the analog inputs listed above. In addition, the output stereo mix (LINE_OUT) or its mono equivalent may also be selected as a record source. A gain block is available to amplify the MIC inputs by 20dB to compensate for the difference between line levels and typical condenser microphone levels. Besides being fed to the Record Select Mux, all analog inputs can be mixed (see Analog Mixer) with the stereo output from the Playback DACs. Note: all analog inputs except PHONE and PC_BEEP can be output on MONO_OUT. There is a dedicated analog input, PC_BEEP, for the standard "Beep" signal provided on most PC/Compatible computers for power on self test and boot audio status indication. This input is mixed into each channel of the stereo line outputs. Record ADCs The HMP9701A provides 3 ADCs to record one dedicated microphone input and 2 user selectable analog inputs. The user selectable analog inputs are routed to the stereo ADCs via an programmable Input Multiplexer. The multiplexer is programmed to select the 2 record channels via the Record Select register (1Ah). Each of the record channels pass through a programmable gain block before each ADC. The record gain for each channel is set individually and ranges from 0dB to 22.5dB in 1.5dB increments (see Record Gain Registers 1Ch and 1Eh). The gain block can also be used to mute each channel. Note: an additional gain block provides 20dB of gain on the MIC channel if activated (see MIC Volume register 0Eh). The HMP9701A uses oversampling ADCs which only require a single pole passive filter for anti-alias filtering. The filter for the left, right and MIC channels is realized by placing a 1nF capacitor between the AFILT1, AFILT2, and AFILT3 pins and analog ground respectively. Playback DACs The HMP9701A uses oversampling single bit DACs to convert the stereo playback sample to an analog line level output. The output of the DACs pass through internal reconstruction filters that do not require any external components.
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HMP9701A
Analog Mixer The Analog Mixer generates two outputs, one stereo and one mono. The stereo output is used to drive LINE_OUT and is composed of a stereo mix of all analog input sources and the audio output from the DACs. The mono output drives MONO_OUT, and it is user selectable as either MIC only or a mono mix of all the analog and PCM sources except the PHONE and PC_BEEP inputs. The inputs to the analog mixer pass through gain/attenuate/mute (GAM) blocks. Each gain block provides volume control from -34.5dB to +12dB in 1.5dB increments (see Input Volume Registers 0Ch - 18h). Additionally, the GAM blocks can be used to mute individual mixer inputs. An additional gain of 20dB is provided for the selected MIC input. Note: for best SNR performance, the GAM block for the DAC output should be used to control PCM analog volume rather than digitally attenuating the DAC PCM input to take advantage of full resolution conversions. Clocking The HMP9701A derives it's internal clock from an externally attached 24.576MHz crystal. The crystal and 2 capacitors are attached to the XTL_IN and XTL_OUT pins, and it should be fundamental-mode/parallel resonant with a load capacitor as specified by the crystal manufacturer (typically 12-30pF). For an example circuit, refer to the Typical Application Schematic. An external CMOS clock may be connected to XTL_IN instead of a crystal. If this external clocking option is used, XTL_OUT should be left floating. Please Note: No capacitors are used on the crystal pins in this mode. The HMP9701A divides the clock source by 2 to derive the BIT_CLK provided to the companion digital controller. The digital controller should divide the provided BIT_CLK by 256 to generate the 48kHz SYNC signal used to define the audio frame transmitted over the serial digital interface (See Serial Digital Interface Section)
FIGURE 1. HMP9701A CONNECTION TO AC'97 CONTROLLER
Serial Digital Interface
Audio Data Format The HMP9701A supports 16-bit 2's complement linear PCM data for record and playback. The 16-bit 2's complement format (also called 16-bit signed format) is the standard method of representing 16-bit digital audio. This format gives 96dB theoretical dynamic range and is the standard for compact disk audio players. This format uses the value -32768 (8000h) to represent minimum analog amplitude while 32767 (7FFFh) represents maximum analog amplitude.
SYNC BIT_CLK AC'97 DIGITAL CONTROLLER SDATA_OUT SDATA_IN HMP9701A AC'97 AUDIO CODEC
RESET
Digital Serial Interface (AC Link) The HMP9701A is linked to an AC'97 digital controller via a 5 pin digital serial interface as shown in Figure 1. This interface, the AC-link, supports bidirectional, fixed rate, serial data streams. The data transfers are based on a time division multiplexed (TDM) protocol that provides for multiple input and output audio streams together with control and status data. The AC-link protocol is based on incoming and outgoing audio frames which are each divided into 12 data slots as shown in Figure 2. The HMP9701A allocates data slots for 2 PCM playback channels, 2 PCM record channels, codec control, codec status, and a PCM microphone record channel. The remaining unused time slots are reserved.
SLOT NO. SYNC
0
1
2
3
4
5
6
7
8
9
10
11
12
OUTGOING AUDIO STREAMS
TAG
CMD ADDR
CMD DATA
PCM LEFT
PCM RIGHT
RSRVD RSRVD RSRVD RSRVD RSRVD RSRVD RSRVD RSRVD
INCOMING AUDIO STREAMS
TAG
STATUS STATUS ADDR DATA
PCM LEFT
PCM RIGHT
RSRVD
MIC
RSRVD RSRVD RSRVD RSRVD RSRVD RSRVD
TAG PHASE
DATA PHASE
FIGURE 2. AC LINK BIDIRECTIONAL DATA FRAME
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