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Details, datasheet, quote on part number:HM-65162
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Datasheet text preview:
TM
HM-65162
2K x 8 Asynchronous CMOS Static RAM
Description
The HM-65162 is a CMOS 2048 x 8 Static Random Access Memory manufactured using the Intersil Advanced SAJI V process. The device utilizes asynchronous circuit design for fast cycle time and ease of use. The pinout is the JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which allows easy memory board layouts flexible to accommodate a variety of industry standard PROMs, RAMs, ROMs and EPROMs. The HM-65162 is ideally suited for use in microprocessor based systems with its 8-bit word length organization. The convenient output enable also simplifies the bus interface by allowing the data outputs to be controlled independent of the chip enable. Gated inputs lower operating current and also eliminate the need for pull-up or pull-down resistors.
March 1997
Features
· Fast Access Time . . . . . . . . . . . . . . . . . . . 70/90ns Max · Low Standby Current. . . . . . . . . . . . . . . . . . . . 50µA Max · Low Operating Current . . . . . . . . . . . . . . . . . 70mA Max · Data Retention at 2.0V . . . . . . . . . . . . . . . . . . . 20µA Max · TTL Compatible Inputs and Outputs · JEDEC Approved Pinout (2716, 6116 Type) · No Clocks or Strobes Required · Equal Cycle and Access Time · Single 5V Supply · Gated Inputs · No Pull-Up or Pull-Down Resistors Required
Ordering Information
P ACKAGE CE RDIP JAN # SMD# CL CC SMD# NOTE: 1. Access time/data retention supply current. TEMP. RANGE -40oC to +85oC -55oC to +125oC -55oC to +125oC -40oC to +85oC -55oC to 125oC 70ns/20µA (NOTE 1) HM1-65162B-9 29110BJA 8403606JA HM4-65162B -9 8403606ZA 90ns/40µA (NOTE 1) HM1-65162-9 29104BJA 8403602JA HM4-65162-9 8403602ZA 8403603JA HM4-65162C- 9 8403603ZA 90ns/300µA (NOTE 1) HM1-65162C- 9 PKG. NO. F24.6 F24.6 F24.6 J32.A J32.A
Pinouts
HM-65162 (CERDIP ) TOP VIEW
NC A7
HM-65162 ( CLCC) TOP VIEW
V CC
PIN
NC NC 30 29 A8 28 A9 27 NC 26 W 25 G 24 A10 23 E 22 DQ7 21 DQ6
DESCRIPTION No Connect Address Input Chip Enable/Power Down Ground Data In/Data Out Power (+5V) Write Enable Output Enable
NC
NC
A7 A6 A5 A4 A3 A2 A1 A0 D Q0
1 2 3 4 5 6 7 8 9
24 VCC 23 A8 22 A9 21 W 20 G 19 A1 0 18 E 17 DQ7 16 DQ6 15 DQ5 14 DQ4 13 DQ3 A6 A5 A4 A3 A2 5 6 7 8 9
4
3
2
1
3 2 31
NC A0 - A10 E VSS/GND DQ0 - DQ7 VCC W G
A1 10 A0 11 NC 12 DQ 0 13 1 4 15 16 DQ 1 DQ 2 GND 17 NC 18 DQ 3 19 DQ 4 20 DQ 5
D Q1 10 D Q2 11 GND 12
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved
FN3000.1
1
HM-65162 Functional Diagram
A1 A2 A3 A4 A5 A6 A7 RO W ADDRESS BUFFER A 7 RO W DECODER 7 128 COLUMN DECODER AND DATA INPUT / OUTPUT (X8) 4 G A 4 A 128 128 X 128 MEMORY ARRAY 1 OF 8 DQ0 TH RU DQ7
A
8
E
COLUMN ADDRESS BUFFER
W
A0
A8 A9 A10
2
HM-65162
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to V CC +0.3V Typical Derating Factor . . . . . . . . . . 05mA/MHz Increase in ICCOP ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance JA (oC/W) JC (oC/W) CERD IP Package . . . . . . . . . . . . . . . . 48 8 CLCC Package . . . . . . . . . . . . . . . . . . 66 12 Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +175oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . +300oC
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range HM-65162S-9, HM-65162B-9, HM-65162-9, HM65162C-9. . . . . . . . . . . . . . . . . . - 40oC to +85oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26000 Gates
CAUTIO N: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications VCC = 5V ±10%; TA = -40oC to +85oC (HM-65162S-9, HM-65162B-9, HM-65162-9, HM-65162C-9)
LIMITS SYMBOL ICCS B1 PARAMETER S tandby Supply Current MIN MAX 50 100 UNITS µA µA TEST CONDITIONS H M-65162B-9, IO = 0mA, E = VCC - 0.3V, VCC = 5.5V H M-65162S-9, HM65162-9, IO = 0mA, E = VCC - 0.3V, VCC = 5.5V H M-65162C-9, IO = 0mA, E = VCC - 0.3V, VCC = 5.5V E = 2.2V, IO = 0mA, VCC = 5.5V E = 0.8V, IO = 0mA, VCC = 5.5V E = 0.8V, IO = 0mA, f = 1MHz, VCC = 5.5V H M-65162B-9, IO = 0mA, VCC = 2.0V, E = VCC - 0.3V H M-65162S-9, HM-65162-9, IO = 0mA, VCC = 2.0V, E = VCC - 0.3V H M-65162C-9, IO = 0mA, VCC = 2.0V, E = VCC - 0.3V VI = VCC or GND, VCC = 5.5V VIO = VCC or GND, VCC = 5.5V VCC = 4.5V VCC = 5.5V IO = 4.0mA, VCC = 4.5V IO = -1.0mA, VCC = 4.5V IO = -100µA, V CC = 4.5V
ICCSB ICCEN ICCOP ICCDR S tandby Supply Current E nabled Supply Current Operating Supply Current (Note 1) Data Retention Supply Current -
900 8 70 70 20 40
µA mA mA mA µA µA
VCCDR II IIOZ VIL V IH VOL VOH1 VOH2 Data Retention Supply Voltage Input Leakage Current Input/Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output High Voltage (Note 2) 2.0 -1.0 -1.0 -0.3 2.2 2.4 VCC -0.4
300 +1.0 +1.0 0.8 VCC +0.3 0.4 -
µA V µA µA V V V V V
Capacitance TA = +25oC
SYMBOL CI CIO NOTES : 1. Typical derating 5mA/MHz increase in ICCOP. 2. Tested at initial design and after major design changes. PARAMETER Input Capacitance (Note 2) Input/Output Capacitance (Note 2) M AX 10 12 UNITS pF pF TEST CONDITIONS f = 1MHz, All measurements are referenced to device GND
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