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Details, datasheet, quote on part number:HM-6516
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Datasheet text preview:
TM
HM-6516
2K x 8 CMOS RAM
Description
The HM-6516 is a CMOS 2048 x 8 Static Random Access Memory. Extremely low power operation is achieved by the use of complementary MOS design techniques. This low power is further enhanced by the use of synchronous circuit techniques that keep the active (operating) power low, which also gives fast access times. The pinout of the HM-6516 is the popular 24 pin, 8-bit wide JEDEC standard, which allows easy memory board layouts, flexible enough to accommodate a variety of PROMs, RAMS, EPROMs, and ROMs. The HM-6516 is ideally suited for use in microprocessor based systems. The byte wide organization simplifies the memory array design, and keeps operating power down to a minim um , because only one device is enabled at a time. The address latches allow very simple interfacing to recent generation microprocessors which employ a multiplexed address/data bus. The convenient output enable control also simplifies multiplexed bus interfacing by allowing the data outputs to be controlled independent of the chip enable.
March 1997
Features
· Low Power Standby. . . . . . . . . . . . . . . . . . . 275µW Max · Low Power Operation . . . . . . . . . . . . . .55mW/MHz Max · Fast Access Time . . . . . . . . . . . . . . . . . 120/200ns Max · Industry Standard Pinout · Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0V VCC · TTL Compatible · Static Memory Cells · High Output Drive · On-Chip Address Latches · Easy Microprocessor Interfacing
Ordering Information
120ns HM1-6516B-9 8403607JA 8403607ZA 200ns HM1-6516-9 29102BJA 8403601JA HM4-6516-9 8403601ZA TEMP. RANGE -40oC to +85oC -55oC to +125oC -55oC to +125oC -40oC to +85oC -55oC to +125oC PACKAGE CERDIP JAN# SMD# CL CC SMD# F24.6 F24.6 F24.6 J32.A J32.A PKG. NO.
Pinouts
HM-6516 (CERDIP ) TOP VIEW
NC A7
HM-6516 ( CLCC) TOP VIEW
VCC NC NC NC NC
PIN
29 A8 28 A9 27 NC 26 W 25 G 24 A1 0 23 E 22 DQ7 21 DQ6
DESCR IPTION No Connect Address Inputs Chip Enable/Power Down Ground
A7 1 A6 2 A5 3 A4 4 A3 5 A2 6 A1 7 A0 8 DQ0 9 DQ1 10 DQ2 11 GND 12
24 VCC 23 A8 22 A9 21 W 20 G 19 A10 18 E 17 DQ7 16 DQ6 15 DQ5 14 DQ4 13 DQ3
4 A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 1 1 NC 12 DQ 0 1 3
3
2
1
32 31 30
NC A0 - A10 E V SS/GND
D Q0 - DQ7 Data In/Data Out V CC W G Power (+5V) Write Enable Output Enable
1 4 15 16 17 18 19 20 G ND DQ1 DQ2 NC DQ3 DQ4 DQ5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001. All Rights Reserved
File Number
2998.1
1
HM-6516 Functional Diagram
A10 A9 A8 A7 A6 A5 A4
A 7 LATCHED ADDRESS REGISTER GATED RO W DECODER 12 8 x 128 MATRIX
128
A 7
1 OF 8 G G 16 16 16 16 16 16 16 16 A 8 A 4 A L A 4 8 DQ 0 T HRU DQ 7
L
G W E
GATED COLUMN DECODER
LATCHED ADDRESS REGISTER
A3
A2
A1
A0
2
HM-6516
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V Input or Output Voltage Applied for all Grades. . . . . . . GND -0.3V to V CC +0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance JA JC CERD IP Package . . . . . . . . . . . . . . . . 48oC/W 8oC/W CLCC Package . . . . . . . . . . . . . . . . . . 66oC/W 12oC/W Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +175oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . +300oC
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Ranges: HM-6516B-9, HM-6516-9 . . . . . . . . . . . . . . . . . . . - 40oC to +85oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25953 Gates
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications VCC = 5V ±10%; TA = -40oC to +85oC (HM-6516B-9, HM-6516-9)
LIMITS SYMBOL ICCSB PARAMETER S tandby Supply Current MIN ICCOP ICCDR Operating Supply Current (Note 1) Data Retention Supply Current VCCDR II IIOZ VIL V IH VOL VOH1 VOH2 Data Retention Supply Voltage Input Leakage Current Input/Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output High Voltage (Note 2) 2.0 -1.0 -1.0 -0.3 2.4 2.4 VCC -0.4 MAX 50 100 10 25 50 +1.0 +1.0 0.8 VCC +0.3 0.4 UNITS µA µA mA µA µA V µA µA V V V V V VI = VCC or GND, VCC = 5.5V VIO = VCC or GND, VCC = 5.5V VCC = 4.5V VCC = 5.5V IO = 3.2mA, VCC = 4.5V IO = -1.0mA, VCC = 4.5V IO = -100µA, V CC = 4.5V TEST CONDITIONS IO = 0mA, VI = VCC or GND, VCC = 5.5V, HM-6516B-9 IO = 0mA, VI = VCC or GND, H M-6516- 9 f = 1MHz, IO = 0mA, G = VCC, VCC = 5.5V, VI = VCC or GND VCC = 2.0V, IO = 0mA, VI = VCC or GND, E = VCC, HM-6516B-9 VCC = 2.0V, IO = 0mA, VI = VCC or GND, E = VCC, HM-6516-9
Capacitance TA = +25oC
SYMBOL CI CIO NOTES : 1. Typical derating 5mA/MHz increase in ICCOP. 2. Tested at initial design and after major design changes. PARAMETER Input Capacitance (Note 2) Input/Output Capacitance (Note 2) M AX 8 10 UNITS pF pF TEST CONDITIONS f = 1MHz, All measurements are referenced to device GND
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