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Details, datasheet, quote on part number:HM-6514/883
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Datasheet text preview:
TM
HM-6514/883
1024 x 4 CMOS RAM
Description
The HM-6514/883 is a 1024 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes synchronous circuitry to achieve high performance and low power operation. On chip latches are provided for addresses allowing efficient interfacing with microprocessor systems. The data output can be forced to a high impedance state for use in expanded memory arrays. Gated inputs allow lower operating current and also eliminates the need for pull up or pull down resistors. The HM-6514/883 is fully static RAM and may be maintained in any state for an indefinite period of time. Data retention supply voltage and supply current are guaranteed over temperature.
March 1997
Features
· This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. · Low Power Standby. . . . . . . . . . . . . . . . . . . 125µW Max · Low Power Operation . . . . . . . . . . . . . .35mW/MHz Max · Data Retention . . . . . . . . . . . . . . . . . . . . . . . at 2.0V Min · TTL Compatible Input/Output · Common Data Input/Output · Three-State Output · Standard JEDEC Pinout · Fast Access Time . . . . . . . . . . . . . . . . . 120/200ns Max · 18 Pin Package for High Density · Gated Inputs - No Pull Up or Pull Down Resistors Required · On-Chip Address Register
Ordering Information
120ns HM1-6514S/883 200ns HM1-6514B/883 300ns HM1-6514/883 TEMPERATU RE RANGE -55oC to 125oC PACKAGE CERDIP PKG. NO. F18.3
Pinout
HM-6514/883 (CERDIP) TOP VIEW
A6 A5 A4 A3 A0 A1 A2 E G ND 1 2 3 4 5 6 7 8 9 18 VCC 17 A7 16 A8 15 A9 14 DQ0 13 DQ1 12 DQ2 11 DQ3 10 W
PIN A E W D Q
DESCRIPTION Addr ess Input Chip Enable Write Enable Data Input Data Output
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved
FN2996.1
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HM-6514/883 Functional Diagram
LSB A9 A8 A7 A6 A5 A4 A LATCHED ADD RESS REGISTER A L L LSB A2 A1 A0 A3 A LATCHED ADD RESS REGISTER 4 A 4 E W DQ G 6 GA TED RO W DECODER 64 x 64 MATRIX
64
6 G 1 6 1 6 16 1 6 GATED COLUMN I/O SELECT 4
1 OF 4
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HM-6514/883
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance CERD IP Package . . . . . . . . . . . . . . . . 75oC/W 15oC/W Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +175oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . +300oC JA JC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6910 Gates
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC Input Low Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +0.8V Input High Voltage. . . . . . . . . . . . . . . . . . . . . . . . VCC -2.0V to VCC Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns Max
TABLE 1. HM-6514/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested (NOTE 1) CONDITIONS V CC = 4.5V IOL = 3.2mA VCC = 4.5V IOH = -1.0mA VCC = 5.5V, V I = GND or VCC V CC = 5.5 V, V IO = GND or VCC V CC = 2.0V, E = VCC -0.3V, IO = 0mA V CC = 5.5V, (Note 2) E = 1MHz VCC = 5.5V, E = VCC-0.3V, IO = 0mA GR OU P A SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE - 55oC TA +125oC - 55oC TA +125oC - 55oC TA +125oC - 55oC TA +125oC - 55oC TA +125oC MIN 2.4 -1.0 -1.0 M AX 0.4 +1.0 +1.0 25 UNITS V V µA µA µA
PARAMETE R Output Low Voltage Output High Voltage Input Leakage Current Input/Output Leakage Current Data Retention Supply Current Operating Supply Current S tandby Supply Current NOTES :
SYMBOL V OL VOH II IIOZ ICCDR
ICCOP ICCSB
1, 2, 3 1, 2, 3
- 55oC TA +125oC - 55oC TA +125oC
-
7 50
mA µA
1. All voltages referenced to device GND. 2. Typical derating 1.5mA/MHz increase in ICCOP.
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