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Details, datasheet, quote on part number:M2005-02PB
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Datasheet text preview:
Integrated Circuit Systems, Inc.
Product Brief
M2005-02
VCSO FREQUENCY TRANSLATOR WITH HOLD
PIN ASSIGNMENT (9 x 9 mm SMT)
REF_CLK0 REF_CLK1 nP_LOAD REF_SEL S_LOAD S_DATA 20 GND VCC 19 18 17 16 M0 27
GENERAL DESCRIPTION
The M2005-02 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for reference clock frequency translation and jitter attenuation in a high-speed data communications system. The device is similar to the M2005-01, but it includes a reference input divider and a much larger feedback divider, accessible through serial programming. Internal divider ratios are user selectable, and external loop filter components allow tailoring of the PLL loop response.
26
24
23
25
M1 M2 M3 M4 M5 VCC DNC DNC DNC
28 29 30 31 32 33 34 35 36 5 6 7 1 2 3 4 8 9
22
21
S_CLOCK MR nFOUT FOUT GND P1 HOLD VCC GND
M2005-02
(Top View)
15 14 13 12 11 10
F EATURE S
· Integrated SAW (surface acoustic wave) delay line · Output clock center frequencies from 75 to 700 · · · ·
MHz (Specify center frequency at time of order) Low phase jitter 0.5ps RMS, typical (12kHz-20MHz) Ideal for OC-48, STM-16, GbE clock reference Hold error +10ppm max Wide-range M and R dividers enable following (accessible through serial programing): - 8kHz input reference frequency - FEC output clock support - Very low PLL bandwidth, down to <10Hz. Single 3.3V power supply Small 9 x 9 mm SMT package includes SAW device
P1 0 1 P Divider Value 1 4
RLOOP CLOOP
nOP_OUT
Example Input / Output Frequency Combinations
Input Clock (MHz) 19.44 25.00 VCSO Freq 1 (MHz) 622.08 625.00 Output Freq (MHz) 622.08 155.52 156.25 Application OC-12/48 Gigabit Ethernet
· ·
VCSO Output Divider Ratios (parallel loading):
1.Specify VCSO center frequency at time of order
BLOCK DIAGRAM
RPOST CPOST CPOST
Extern al Loop Filter Components
RLOOP
CLOOP OP_OUT
RPOST nOP_OUT nVC VC
M2005-02
MUX Phase Detector
OP_IN
nOP_IN
RIN
0
SAW Delay Line
REF_CLK1 REF_CLK0 REF_SEL
1 0
R Divider
R = 1, 2, 4 to 511 RIN Loop Filter Amplifier
Frequency Hold
1
Phase Shifter
VCSO
M Divider
M = 3 to 131,071
OP_OUT
nOP_IN
GND
GND
GND
OP_IN
nVC
VC
P Divider S_DATA S_CLK S_LOAD nP_LOAD
P = 1 or 4
FOUT nFOUT
Serial / Parallel Configuration Register
6
M5:0
P1
HOLD
MR
MNC 2005-02 Rev 1.0
M2005-02 VCSO Frequency Translator with Hold
Revision 112602
I n t e g r a t e d Circuit Systems, Inc. Communications Modules
www.icst.com/comm-modules
tel (508) 852-5400
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