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Details, datasheet, quote on part number:HMS97C7134
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| Part: | HMS97C7134 |
| Category: | Microcontrollers => 90 Series->Application Specific |
| Description: | ROM/ram Size: 32 K/512 Bytes, 4.5-5.5 V , 12 MHz,8-bit Single-chip Microcontroller |
| Company: | Hynix Semiconductor |
| Datasheet: | Download HMS97C7134 datasheet File size : 1545 kB |
| Request For quote: | Find where to buy HMS97C7134
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Datasheet text preview:
HMS91C7134
HMS91C7134
CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR MONITOR
1. OVERVIEW
1.1 Description
The HMS9xC7134 is a single-chip microcontroller of the 80C51 family, which is dedicated for monitor application. It is particularly suitable for multi-sync computer monitor controller. This contains DDC interfaces to the PC host, sync-detector and sync-processor for autosync application, ADC, static PWM, dynamic PWM and I2C bus interface for control of the video and deflection functions of the monitor. Device name HMS91C7134 ROM Size 32K bytes Mask ROM RAM Size 512 bytes I/O 30(42DIP) 32(42SDIP) O TP HMS97C7134 Package 40DIP(HMS91C7134), 42SDIP(HMS91C7134K)
1.2 Features
· 80C51 core · 32K bytes of ROM for HMS91C7134 (32K bytes of EPROM for HMS97C7134) · 256 bytes of RAM and 256 bytes of XRAM for DDC operation · Uses an external crystal of 12.0 MHz · One DDC compliant interface : - Fully supports DDC1 with dedicated hardware - DDC2B, DDC2AB and DDC2B+ compliant dedicated hardware based on an I2C bus interface - RAM buffer with programmable size, 128 bytes or 256 bytes, which can be used for DDC operation or shared as system RAM · On-chip sync processor - HSYNC frequency with 12-bit resolution - VSYNC frequency with 12-bit resolution - HSYNC and VSYNC polarity - HSYNC and VSYNC presence detection - Composite sync separation - Free running sync. generation - Clamping pulse output - Pattern generation - Separate input for a SOG signal - Missing pulse insertion option - HSYNC/ VSYNC change interrupt · One multi-master/slave I2C interface (up to 400K bit/s) for control of other system IC's · Eight 8-bit Static PWM outputs for digital control applications · Two 8-bit Dynamic PWM outputs for various waveform generation · One 8-bit ADC with 4 input channels · LED driver port ; two port lines with 15 mA drive capability · One 8-bit port only for I/O function · 24 derivative I/O ports configurable for alternative functions · W atchdog timer (524ms max.) · On-chip low VDD voltage detect and reset (reset period: 524ms) · Operating temperature : 0 to 70 · Special idle and power-down modes with low power consumption · Single power supply : 4.5V to 5.5V
November.2001 ver1.0
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IN T 0 VD D 1 VSS1 A C H [ 3 :0 ] SD A 2 SCL2 V DD 2 V SS2 RE SET CPU P ro g ra m M e m o ry (6 4 K B ) D a ta M e m o ry (6 4 K B ) 8 -B it ADC I2 C -B u s S e r i a l I/O W a tc h D o g T im e r S y n c . D e te c tio n & Sync. Process DDC In te rfa c e 8 x 8 -B it Static PW M 2 x 8 -B it D y n a m ic PW M Low V o lta g e R eset P3 S D A1 SCL1 PA T O U T CLA M P H SY N C o ut V SY N C ou t V S Y N C in H S Y N C in SO G in PW M 0 to PW M 7 DPW M0 to DPW M1
HMS91C7134
2. BLOCK DIAGRAM
80C 5 1 core
XTAL1
XTAL2
T h r e e 16-B i t T im e r s ( T0, T1, T 2 )
Parallel I/O Ports & E x te rn a l B u s
November.2001 ver1.0
P0
P1
P2
HMS91C7134
3. PIN ASSIGNMENT
3.1 40PDIP pinning
PWM0* /P2.2 DPWM0* /P2.1 DPWM0* /P2.0 RESET VDD1 VSS1 XTAL2 XTAL1 SDA2** /P1.7 SCL2** /P1.6 P0.7** P0.6** P0.5** P0.4** INT0/VPP P0.3** P0.2** P0.1** P0.0** ACH3 /P1.5
40DIP (Top View)
* : Open-drain option ** : Open-drain type pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
Vsync-IN Hsync-IN PWM1* /P2.3 PWM2* /P2.4 PWM3* /P2.5 PWM4* /P2.6 PWM5* /P2.7 Hsync-OUT /P3.2 Vsync-OUT /P3.3 PWM6* /INT1 /P3.4 CLAMP/PWM /P3.5 PADOUT /P3.6 SOG /P3.7 VDD2 VSS2 SCL1** /P1.0 SDA1** /P1.1 ACH0 /P1.2 ACH1 /P1.3 ACH2 /P1.4
HMS9xC7132
40DIP (Top View)
* : Open-drain option ** : Open-drain type pin
PWM0* /P2.2 DPWM0* /P2.1 DPWM0* /P2.0 RESET VDD1 VSS1 XTAL2 XTAL1 SDA2** /P1.7 SCL2** /P1.6 P0.7** P0.6** P0.5** P0.4** INT0/VPP P0.3** P0.2** P0.1** P0.0** ACH3 /P1.5
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
Vsync-IN Hsync-IN PWM1* /P2.3 PWM2* /P2.4 PWM3* /P2.5 PWM4* /P2.6 PWM5* /P2.7 Hsync-OUT /P3.2 Vsync-OUT /P3.3 PWM6* /INT1 /P3.4/CLAMP PWM /P3.5 PADOUT /P3.6 SOG /P3.7 P3.0 P3.1 SCL1** /P1.0 SDA1** /P1.1 ACH0 /P1.2 ACH1 /P1.3 ACH2 /P1.4
HMS9xC7134
November.2001 ver1.0
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