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Details, datasheet, quote on part number:HMPP-389T
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Datasheet text preview:
Agilent HMPP-389x Series MiniPak Surface Mount RF PIN Switch Diodes
Data Sheet
Features · Surface mount MiniPak package low height, 0.7 mm (0.028") max. small footprint, 1.75 mm2 (0.0028 inch2) · Better thermal conductivity for higher power dissipation Description/Applications These ultra-miniature products represent the blending of Agilent Technologies' proven semiconductor and the latest in leadless packaging technology. The HMPP-389x series is optimized for switching applications where low resistance at low current and low capacitance are required. The MiniPak package offers reduced parasitics when compared to conventional leaded diodes, and lower thermal resistance. Low junction capacitance of the PIN diode chip, combined with ultra low package parasitics, mean that these products may be used at frequencies which are higher than the upper limit for conventional PIN diodes. Note that Agilent's manufacturing techniques assure that dice packaged in pairs are taken from adjacent sites on the wafer, assuring the highest degree of match. The HMPP-389T low inductance wide band shunt switch is well suited for applications up to 6 GHz. · Single and dual versions · Matched diodes for consistent performance · Low capacitance · Low resistance at low current · Low FIT (Failure in Time) rate* · Six-sigma quality level
* For more information, see the Surface Mount Schottky Reliability Data Sheet.
Pin Connections and Package Marking
3 4
AA
2 1 Product code Date code
Package Lead Code Identification (Top View)
Single 3 4 3 Anti-parallel 4 3 Parallel 4 3 Shunt Switch
Cathode Anode
4
2 #0
1
2 #2
1
2 #5
1
2
Anode
1 T
Cathode
Notes: 1. Package marking provides orientation and identification. 2. See "Electrical Specifications" for appropriate package marking.
HMPP-389x Series Absolute Maximum Ratings [1], TC = 25°C Symbol
If PIV Tj Tstg jc
Parameter
Forward Current (1 µs pulse) Peak Inverse Voltage Junction Temperature Storage Temperature Thermal Resistance [2]
Units
Amp V °C °C °C/W
Value
1 100 150 -65 to +150 150
ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge.
Notes: 1. Operation in excess of any one of these conditions may result in permanent damage to the device. 2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board.
Electrical Specifications, TC = +25°C, each diode
Part Number HMPP3890 3892 3895 389T Test Conditions Package Marking Code D C B T Lead Code 0 2 5 T Configuration Single Anti-parallel Parallel Shunt Switch Minimum Breakdown Voltage (V) 100 Maximum Series Resistance () 2.5 Maximum Total Capacitance (pF) 0.30
VR = VBR Measure IR 10 µA
IF = 5 mA f = 100 MHz
VR = 5V f = 1 MHz
Typical Parameters, TC = +25°C
Part Number HMPP389x Test Conditions Series Resistance RS () 3.8 IF = 1 mA f = 100 MHz Carrier Lifetime (ns) 200 IF = 10 mA IR = 6 mA Total Capacitance CT (pF) 0.20 @ 5 V
2
HMPP-389x Series Typical Performance, Tc = 25°C, each diode
0.50 0.45 120 Diode Mounted as a Series Attenuator in a 50 Ohm Microstrip and Tested at 123 MHz Intercept point will be higher at higher frequencies
RF RESISTANCE (OHMS)
10
INPUT INTERCEPT POINT (dBm)
16 20
115 110 105 100 95 90 85
TOTAL CAPACITANCE (pF)
0.40 0.35 0.30 0.25 0.20 1 GHz 0.15 0 4 8 12 1 MHz
1
0.1
1
10
100
1
10 IF FORWARD BIAS CURRENT (mA)
30
IF FORWARD BIAS CURRENT (mA)
VR REVERSE VOLTAGE (V)
Figure 1. Total RF Resistance at 25°C vs. Forward Bias Current.
Figure 2. Capacitance vs. Reverse Voltage.
Figure 3. 2nd Harmonic Input Intercept Point vs. Forward Bias Current.
200
100
Trr REVERSE RECOVERY TIME (nS)
160 VR = 2V 120
IF FORWARD CURRENT (mA)
10
1
80 VR = 5V 40 VR = 10V 0 10 15 20 25 30
0.1 125°C 25°C 50°C 0 0.2 0.4 0.6 0.8 1.0 1.2
0.01
FORWARD CURRENT (mA)
VF FORWARD VOLTAGE (V)
Figure 4. Typical Reverse Recovery Time vs. Reverse Voltage.
Figure 5. Forward Current vs. Forward Voltage.
Typical Applications
RF COMMON
RF COMMON
2 1 RF 1
3 4 RF 2
RF 1 2 1 2 1 3 4 3 4 RF 2
BIAS 1
BIAS 2
BIAS
Figure 6. Simple SPDT Switch Using Only Positive Bias.
Figure 7. High Isolation SPDT Switch Using Dual Bias.
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