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Details, datasheet, quote on part number:M27C801-150F1
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Datasheet text preview:
M27C801
8 Megabit (1Meg x 8) UV EPROM and OTP EPROM
FAST ACCESS TIME: 90ns LOW POWER "CMOS" CONSUMPTION: Active Current 35mA Standby Current 100µA PROGRAMMING VOLTAGE: 12.75V ELECTRONIC SIGNATURE for AUTOMATED PROGRAMMING PROGRAMMING TIMES of AROUND 52sec. (PRESTO IIB ALGORITHM)
32
1
FDIP32W (F)
PLCC32 (K)
DESCRIPTION The M27C801 is an high speed 8 Megabit UV erasable and electrically programmable EPROM ideal ly su ited for applications where fast turnaround and pattern experimentation are important requirements. Its is organized as 1,048,57 6 by 8 bits. The Window Ceramic Frit-Seal Dual-in-Line package has transparen t lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C801 is offered in Plastic Leaded Chip Carrier and Plastic Thin Small Outline packages.
TSOP32 (N) 8 x 20mm
Figure 1. Logic Diagram
VCC
20 A0-A19
8 Q0-Q7
E
M27C801
Table 1. Signal Names
A0 - A19 Q0 - Q7 E GVPP VCC VSS Address Inputs Data Outputs Chip Enable Output Enable / Program Supply Supply Voltage Ground
GVPP
VSS
AI01267
May 1996
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M27C801
Figure 2A. DIP Pin Connections
A19 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 2 3 4 5 6 7 8 M27C801 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A18 A17 A14 A13 A8 A9 A11 GVPP A10 E Q7 Q6 Q5 Q4 Q3
Figure 2B. PLCC Pin Connections
A7 A6 A5 A4 A3 A2 A1 A0 Q0
A 12 A 15 A 16 A 19 V CC A 18 A 17 1 32 A14 A13 A8 A9 A11 GVPP A10 E Q7 9 M27C801 25 17 V SS Q3 Q4 Q5 Q6
AI01814
AI01268
Figure 2C. TSOP Pin Connections
A11 A9 A8 A13 A14 A17 A18 VCC A19 A16 A15 A12 A7 A6 A5 A4 1 32 GVPP A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2 A3
8 9
M27C801 (Normal)
25 24
16
17
AI01269
DEVICE OPERATION The modes of operations of the M27C801 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for GVP P and 12V on A9 for Electronic Signature and Margin Mode Set or Reset .
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Read Mode The M27C801 has two control functions, both of which must b e logically active in order t o obtain data at the outputs. Chip Enable (E) is the p ower control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses h ave been stable for at least tAVQV-tGLQV. Standby Mode The M27C801 has a standby mode which reduces t he a c t iv e cu rren t f rom 3 5m A to 10 0µA T h e M27C801 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedanc e state, independ ent of the GVPP input. Two Line Output Control Because EPROMs are usually used in larger memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus content ion will not occur.
Q1 Q2
M27C801
Table 2. Absolute Maximum Ratings (1)
Symbol TA TBIAS TSTG VIO
(2)
Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Outp ut Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage
Value 40 to 125 50 to 125 65 to 150 2 to 7 2 to 7 2 to 13.5 2 to 14
Unit °C °C °C V V V V
VCC VA9
(2)
VPP
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
Table 3. Operating Modes
Mode R ead Output Disable Program Program Inhibit Standby Electronic Signature
Note: X = VIH or VIL, VID = 12V ± 0.5V.
E VIL VIL VIL Pulse VIH VIH VIL
GVPP VIL VIH VPP VPP X VIL
A9 X X X X X VID
Q0 - Q7 Data Out Hi-Z Data In Hi-Z Hi-Z Codes
Table 4. Electronic Signature
Id entifier Manufacturer's Code Device Code A0 VIL VIH Q7 0 0 Q6 0 1 Q5 1 0 Q4 0 0 Q3 0 0 Q2 0 0 Q1 0 1 Q0 0 0 Hex Data 20h 42h
For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power s tandby mode and that the output pins a re only active when data is required from a particular memory device.
System Considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, IC C, has three segments that are of interest t o the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output.
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