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Part: 74VHC157T
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74VHC157
QUAD 2 CHANNEL MULTIPLEXER
PRELIMINAR Y D ATA
s s
s
s s
s
s
s
s s
HIGH SPEED: tPD = 4.1 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.)
M1 (Micro Package)
T (TSSOP Package)
ORDER CODES : 74VHC157M 74VHC157T
DESCRIPTION The 74VHC157 is an high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS t echnology. It has similar high speed performance of equivalent Bipolar Schottky TTL combined with true CMOS low power dissipation. It consists of four 2-input digital multiplexers with PIN CONNECTION AND IEC L OGIC SYMBOLS
common select and strobe inputs. It is a non-inverting multiplexer. When t he STROBE input is held high, selection of data is inhibited and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.All inputs and output s are equippe d with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
October 1998
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74VHC157
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
P I N No 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 15 8 16 S YM B O L SELECT 1A to 4A 1B to 4B 1Y to 4Y STROBE GND VCC N AM E AN D F U NCT I O N C om mo n D ata Select Input D ata I nputs F ro m S ource A D ata I nputs F ro m S ource B M ultip lexer Ou tp uts S trob e Inp ut G round ( 0V ) P osit iv e S upply V oltage
TRUTH TABLE
I NP UT S T R O BE H L L L L
X: "H" or "L"
O UT P UT A X L H X X B X X X L H Y L L H L H
S E LE C T X L L H H
LOGIC DIAGRAM
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74VHC157
ABSOLUTE MAXIMUM RATINGS
S ym b o l VCC VI VO IIK IOK IO ICC or IGND Tstg TL Su pply V o ltage D C Input Volta ge D C Outp ut Volt age D C Input Diode Curre nt D C Outp ut Diode C urrent D C Outp ut Current D C VCC o r Gro und Current St or age Tem perat ur e Lead T e mperat ure (10 s ec) P ara met er V al u e -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 300 Unit V V V mA mA mA mA
o o
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
S ym b o l VCC VI VO Top dt/dv S upply Vo ltage I nput V oltage O ut put Volt age O perati ng T em peratur e I nput R is e a nd F all T im e (se e note 1) (VCC = 3. 3 ± 0. 3V ) (V CC = 5.0 ± 0.5V ) P ara met er V al u e 2.0 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 100 0 to 20 Uni t V V V
o
C
ns/V ns/V
1) VIN from 30% to 70% of VCC
DC SPECIFICATIONS
S ymb o l P ara met er T est C o n d i t i o n s V CC ( V) VIH VIL VOH High Level In put Volt age Low Level I nput Volt age High Level Ou t put Volt age 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 VOL Low Level O utp ut Volt age 2.0 3.0 4.5 3.0 4.5 II ICC Input L eakage Current Quiesce nt Su pply Current 0 to 5.5 5.5 VI(*) = VIH or VIL VI(*) = VIH or VIL IO=-50 µA IO=-50 µA IO=-50 µA IO=-4 mA IO=-8 mA IO=50 µA IO=50 µA IO=50 µA IO=4 mA IO=8 mA VI = 5.5V or GND VI = VCC or GND 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 ±0.1 4 2.0 3.0 4.5
o
V al u e T A = 25 C M in. 1.5 0.7VCC 0.5 0.3VCC 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 ±1.0 40 T yp . M ax . - 40 t o 85 C M in . 1.5 0.7VCC 0.5 0.3VCC M ax .
o
Un i t
V V
V
V
µA µA
(*) All outputs loaded.
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74VHC157
AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
S ymb o l P ara met er V CC ( V) tPLH tPHL Propagatio n Delay Tim e A, B to Y 3.3(*) 3.3(*) 5.0(**) 5.0(**) 3.3(*) 3.3(*) 5.0 5.0(**) 3.3 3.3(*) 5.0(**) 5.0(**)
(*) (**)
T est Co n d i t i o n CL (p F ) 15 50 15 50 15 50 15 50 15 50 15 50
V al u e T A = 25 o C M i n . T yp . M ax . 6.2 9.7 8.7 4.1 5.6 8.4 10.9 5.3 6.8 8.7 11.2 5.6 7.1 13.2 6.4 8.4 13.2 16.7 8.1 10.1 13.6 17.1 8.6 10.6
Un i t - 40 t o 85 o C M i n . M ax . 1.0 11.5 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 15.0 7.5 9.5 15.5 19.0 9.5 11.5 16.0 19.5 10.0 12.0 ns ns
tPLH tPHL
Propagatio n Delay Tim e SEL ECT to Y
ns
tPLH tPHL
Propagatio n Delay Tim e STR OBE t o Y
(*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5V ± 0.5V
CAPACITIVE CHARACTERISTICS
S ymb o l P ara met er T est C o n d i t i o n s M in. CIN CPD Input C apacita nce Power D iss ipation Capacit ance (n ot e 1) T yp . 4 20 V al u e T A = 25 o C M ax . 10 - 40 t o 85 o C M in . M ax . 10 pF pF Un i t
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD · VCC · fIN + ICC/4 (per Channel)
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74VHC157
DYNAMIC SWITCHING CHARACTERISTICS
S ymb o l P ara met er T est C o n d i t i o n s V CC ( V) VOLP VOLV VIHD VILD Dynamic Low V oltage Quiet Out put (not e 1 , 2) Dynamic High Vo ltage Input ( note 1, 3) Dynamic Low V oltage Input ( note 1, 3) 5.0 -0.8 5.0 5.0 CL = 50 pF 3.5 1.5 M in. T yp . 0.3 -0.3 V V al u e T A = 25 o C M ax . 0.8 - 40 t o 85 o C M in . M ax . Un i t
1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
TEST CIRCUIT
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
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