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Part: 74LVC138APWDH
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Datasheet: Download 74LVC138APWDH datasheet File size : 291 kB
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INTEGRATED CIRCUITS
74LVC138A 3-to-8 line decoder/demultiplexer; inverting
Product specification 1998 Apr 28
Philips Semiconductors
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
FEATURES
· Wide supply voltage range of 1.2 to 3.6 V · In accordance with JEDEC standard no. 8-1A · Inputs accept voltages up to 5.5 V · CMOS lower power consumption · Direct interface with TTL levels · Demultiplexing capability · Multiple input enable for easy expansion · Ideal for memory chip select decoding · Active LOW mutually exclusive outputs · Output drive capability 50 W transmission lines at 85°C
DESCRIPTION
The 74LVC138A is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC138A accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7). The 74LVC138A features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LV138A to a 1-of-32 (5 lines to 32 lines) decoder with just four 74LV138A ICs and one inverter. The 74LV138A can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.5 ns SYMBOL tPHL/tPLH CI CP D PARAMETER Propagation delay An to Yn, E3 to Yn, En to Yn Input capacitance Power dissipation capacitance per package VCC = 3.3 V Notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V TYPICAL 3.5 3.5 5.0 44 UNIT ns pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES 16-Pin Plastic SO 16-Pin Plastic SSOP Type II 16-Pin Plastic TSSOP Type I TEMPERATURE RANGE 40°C to +85°C 40°C to +85°C 40°C to +85°C OUTSIDE NORTH AMERICA 74LVC138A D 74LVC138A DB 74LVC138A PW NORTH AMERICA 74LVC138A D 74LVC138A DB 74LVC138APW DH PKG. DWG. # SOT109-1 SOT338-1 SOT403-1
PIN CONFIGURATION
A0 A1 A2 E1 E2 E3 Y7 1 2 3 4 5 6 7 16 15 14 13 12 11 10 9 VCC Y0 Y0 Y0 Y0 Y0 Y0 Y0
LOGIC DIAGRAM
1 2 3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 4 5 6 E1 E2 E3 Y5 Y6 Y7 15 14 13 12 11 10 9 7
GND 8
SV00553
SV00554
1998 Apr 28
2
8531943 19308
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
PIN DESCRIPTION
PIN NUMBER 1, 2, 3 4, 5 6 SYMBOL A0 to A2 E1, E2 E3 NAME AND FUNCTION Address inputs Enable inputs (active LOW) Enable inputs (active HIGH)
FUNCTIONAL DIAGRAM
Y0 1 2 A1 A2 A3 3-to-8 DECODER ENABLE EXITING Y1 Y2 Y3 Y4 Y5 Y6 Y7
15 14 13 12 11 10 9 7
15, 14, 13, 12, Y0 to Y7 11, 10, 9, 7 8 16 GND VCC
Outputs
3
Ground (0 V) Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
DX 1 2 3 2 0 0 1 2 3 4 4 5 6 (a) & 5 6 7 15 14 13 12 11 10 9 7 4 5 6 (b) & 1 2 3 1 2 4 X/Y 4 0 1 2 3 4 5
EN 6
E1 E2 E3
15 14 13 12 11 10 9 7
5 6
SV00556
7
SV00555
FUNCTION TABLE
INPUTS E1 H X X L L L L L L L L E2 X H X L L L L L L L L E3 X X L H H H H H H H H A0 X X X L H L H L H L H A1 X X X L L H H L L H H A2 X X X L L L L H H H H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H OUTPUTS Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L
NOTES: H = HIGH voltage level L = LOW voltage level X = don't care
1998 Apr 28
3
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL PARAMETER DC supply voltage (for max. speed performance) VCC VI VI/O Tamb tr, tf DC supply voltage (for low-voltage applications) DC input voltage range DC output voltage range; output HIGH or LOW state DC input voltage range; output 3-State Operating free-air temperature range Input rise and fall times VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V CONDITIONS MIN 2.7 1.2 0 0 0 40 0 0 MAX 3.6 3.6 5.5 VCC 5.5 +85 20 10 V V V °C ns/V UNIT
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V). SYMBOL VCC IIK VI IOK VI/O IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage; output HIGH or LOW DC input voltage; output 3-State DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K VI t 0 Note 2 VO uVCC or VO t 0 Note 2 Note 2 VO = 0 to VCC CONDITIONS RATING 0.5 to +6.5 50 0.5 to +6.5 "50 0.5 to VCC +0.5 0.5 to 6.5 "50 "100 65 to +150 500 500 UNIT V mA V mA V mA mA °C
mW
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28
4
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIH HIGH level input voltage level input voltage VCC = 1.2V VCC = 2.7 to 3.6V LOW level input voltage level input voltage VCC = 1.2V VCC = 2.7 to 3.6V VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOH HIGH level output voltage level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA VCC = 3.0V; VI = VIH or VIL; IO = 12mA VCC = 3.0V; VI = VIH or VIL; IO = 24mA VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA VCC = 3.0V; VI = VIH or VIL; IO = 24mA II ICC ICC Input leakage current leakage current Quiescent supply current Additional quiescent supply current per input pin VCC = 3 6V; VI = 5 5V or GND 3.6V; 5.5V or GND VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC 0.6V; IO = 0 "0.1 0.1 5 GND VCC*0.5 VCC*0.2 VCC*0.6 VCC*1.0 0.40 0.20 0.55 "5 10 500 µA µA µA V VCC V VCC 2.0 GND V 0.8 TYP1 MAX V UNIT
VIL
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF; RL = 500W; Tamb = 40_C to +85_C LIMITS SYMBOL PARAMETER Propagation delay An to Yn Propagation delay E3 to Yn Propagation delay En to Yn WAVEFORM MIN tPHL/tPLH tPHL/tPLH tPHL/tPLH Figure 1, 3 Figure 1, 3 Figure 2, 3 1.5 1.5 1.5 VCC = 3.3V ±0.3V TYP1 3.5 3.6 3.5 MAX 5.8 5.8 5.8 VCC = 2.7V MIN 1.5 1.5 1.5 MAX 6.8 6.8 6.8 ns ns ns UNIT
NOTE: 1. These typical values are at VCC = 3.3V and Tamb = 25°C.
1998 Apr 28
5
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