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Part: 74LVC126APWDH
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INTEGRATED CIRCUITS
74LVC126A Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-State)
Product specification Supersedes data of 1997 Aug 01 IC24 Data Handbook 1998 Apr 28
Philips Semiconductors
Philips Semiconductors
Product specification
Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-state)
74LVC126A
FEATURES
· 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic · Supply voltage range of 1.2V to 3.6V · Complies with JEDEC standard no. 8-1A · CMOS low power consumption · Direct interface with TTL levels · High impedance when VCC = 0V
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf 2.5 ns SYMBOL tPHL/tPLH CI CP D PARAMETER Propagation delay nA to nY Input capacitance Power dissipation capacitance per buffer
DESCRIPTION
The 74LVC126A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5.0V devices. In 3-state operation, outputs can handle 5V. The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high impedance OFF-state.
CONDITIONS CL = 50 pF; VCC = 3.3 V VCC = 3.3 V
TYPICAL 3.0 5.0 20
UNIT ns pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE 40°C to +125°C 40°C to +125°C 40°C to +125°C OUTSIDE NORTH AMERICA 74LVC126A D 74LVC126A DB 74LVC126A PW NORTH AMERICA 74LVC126A D 74LVC126A DB 74LVC126APW DH PKG. DWG. # SOT108-1 SOT337-1 SOT402-1
PIN CONFIGURATION
1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4OE 4A
PIN DESCRIPTION
PIN NUMBER 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11
4Y 3OE 3A 3Y
SYMBOL
NAME AND FUNCTION
1OE 4OE Data enable inputs (active HIGH) 1A 4A 1Y 4Y GND VCC Data inputs Data Outputs Ground (0 V) Positive supply voltage
7 14
SV00483
1998 Apr 28
2
853-2009 19310
Philips Semiconductors
Product specification
Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-state)
74LVC126A
LOGIC SYMBOL
2 1 5 4 9 10 12 13 1A 1OE 2A 2OE 3A 3OE 4A 4OE 4Y 11 3Y 8 2Y 6 1Y 3
LOGIC SYMBOL (IEEE/IEC)
2 3 2 3 1 1 EN1 5 6 4 9 9 8 8 10 10 EN 12 11 11 13 EN (a) (b) 4 EN 5 6 1 EN
SV00484
FUNCTION TABLE
INPUTS nOE H H L NOTES: H = HIGH voltage level L = LOW voltage level X = don't care Z = high impedance OFF-state nA L H X OUTPUT nY L H Z
12
13
SV00485
LOGIC DIAGRAM
nA nY
nOE
SV00486
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb tr, tf PARAMETER DC supply voltage (for max. speed performance) DC supply voltage (for low-voltage applications) DC input voltage range DC output voltage range; output HIGH or LOW state DC output voltage range; output 3-State Operating ambient temperature range in free-air Input rise and fall times VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V CONDITIONS LIMITS MIN 2.7 1.2 0 0 0 40 0 0 MAX 3.6 3.6 5.5 VCC 5.5 +85 20 10 UNIT V V V °C ns/V
1998 Apr 28
3
Philips Semiconductors
Product specification
Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-state)
74LVC126A
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK VI IOK VO IO IGND, ICC Tstg PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage; output HIGH or LOW state DC output voltage; output 3-State DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K VI t0 Note 2 VO uVCC or VO t 0 Note 2 Note 2 VO = 0 to VCC CONDITIONS RATING 0.5 to +6.5 50 0.5 to +5.5 ±50 0.5 to VCC +0.5 0.5 to 6.5 ±50 ±100 65 to +150 500 500 mW mA mA °C UNIT V mA V mA V
PTOT
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIH HIGH level Input voltage level Input voltage VCC = 1.2V VCC = 2.7 to 3.6V LOW level Input voltage level Input voltage VCC = 1.2V VCC = 2.7 to 3.6V VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOH HIGH level output voltage level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA VCC = 3.0V; VI = VIH or VIL; IO = 18mA VCC = 3.0V; VI = VIH or VIL; IO = 24mA VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA VCC = 3.0V; VI = VIH or VIL; IO = 24mA II IOZ IOFF ICC ICC Input leakage current leakage current 3-State output OFF-state current Power off leakage current Quiescent supply current Additional quiescent supply current per input pin VCC = 3 6V; VI = 5 5V or GND 3.6V; 5.5V or GND VCC = 0.0V; VI or VO = 5.5V VCC = 3.6V; VI = VIH or VIL; VO = VCC or GND VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC 0.6V; IO = 0 0.1 0.1 5 "0.1 VCC*0.5 VCC*0.2 VCC*0.6 VCC*0.8 0.40 0.20 0.55 "5 "5 "10 10 500 µA µA µA µA µA V VCC V VCC 2.0 GND V 0.8 TYP1 MAX V UNIT
VIL
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C.
1998 Apr 28
4
Philips Semiconductors
Product specification
Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-state)
74LVC126A
AC CHARACTERISTICS
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500W LIMITS SYMBOL tPHL tPLH tPZH tPZL tPHZ tPLZ PARAMETER Propagation delay nA to nY 3-state output enable time nOE to nY 3-state output disable time nOE to nY WAVEFORM VCC = 3.3V ±0.3V MIN Figures 1, 3 Figures 2, 3 Figures 2, 3 1.5 1.5 1.5 TYP1 3.2 3.9 4.4 MAX 5.5 6.3 6.2 VCC = 2.7V MIN 1.5 1.5 1.5 MAX 6.5 7.3 7.2 VCC = 1.2V TYP 13.0 13.0 10 ns ns ns UNIT
NOTE: 1. These typical values are at VCC = 3.3V and Tamb = 25°C.
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V VM = 0.5 S VCC at VCC < 2.7 V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1 VCC at VCC < 2.7 V VY = VOH 0.3 V at VCC 2.7 V; VY = VOH 0.1 VCC at VCC < 2.7 V
V I nA INPUT V M
TEST CIRCUIT
V CC S1 2
RL=500 V IN PULSE GENERATOR RT D.U.T. CL RL=500 VOUT
Test Circuit for 3-State Outputs SWITCH POSITION TEST
PLH
GND t V OH nY OUTPUT V OL V M PHL t
SWITCH Open 2
VCC t 2.7V 2.7 3.6V
VIN VCC 2.7V
tPLH/tPHL tPLZ/tPZL tPHZ/tPZH
SV00487
Figure 1. Input (nA) to output (nY) propagation delays.
VI nOE INPUT GND V CC OUTPUT LOW-to-OFF OFF-to-LOW V OL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND t PLZ t PZL V M t PHZ V Y V M outputs enabled outputs disabled outputs enabled PZH V M
DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators.
SW00047
Figure 3. Load circuitry for switching times.
V X t
SV00488
Figure 2. 3-state enable and disable times.
1998 Apr 28
5
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