Details, datasheet, quote on part number: TS13401ULTRT
PartTS13401ULTRT
CategorySemiconductors => Power Management ICs => Gate Drivers => 8844311
TitleGate Drivers Neo-Iso Solid State Relay Driver
Description
CompanySemtech Corporation
DatasheetDownload TS13401ULTRT datasheet
Specifications 
Product CategoryGate Drivers
ManufacturerSemtech
Mounting StyleSMD/SMT
Package/CaseMLPQ-UT 20
ProductRelay Drivers
Number of Drivers2 Driver
Output Current5 A
ConfigurationHigh Side, Low Side
Supply Voltage - Max5.5 V
Supply Voltage - Min4.5 V
Operating Supply Current15 uA
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 125 C
TypeSolid State Relay Driver
SeriesTS13401
PackagingReel
BrandSemtech
Number of Outputs2 Output
ShutdownShutdown
Factory Pack Quantity3300
TS13401ULTRT photo

 

Features, Applications
TS13401 Neo-IsoTM Solid State Relay Driver with Sensing and Power Transfer
Features

Low Quiescent Operating Currents in ON state 2mA in Sensing Mode Switch to controller scalable galvanic isolation Single control signal for input commands Microcontroller-compatible levels Switch Characteristics Bi-directional blocking in OFF state to 60V FETs supported to 10A current during inrush and 5A continuous operation Operating Modes Zero-cross ON / OFF Immediate ON / OFF Dithering Mode for system power sharing Switch state polling Sensing Modes for system data acquisition

Description

The is a galvanically isolated 60V power FET driver with bi-directional blocking. The state of the switch and other product features are controlled by sending commands on the CLK input. The TS13401 supports several sensing modes where the switch state, load current, supply voltage and device temperature can be sampled. The digitized measurements can be read back from the device on the DATA pin when requested on the CLK pin. In addition, TS13401 supports power transfer from the system`s AC supply to the low-voltage controller domain. The TS13401 includes several protection features. The switch will open in self protection if current exceeds the over-current limit or if the device temperature limit is exceeded. The switch will remain open until a new turn on sequence is given through CLK.

Junction operating temperature 125 °C Packaged a 20 pin QFN x 3mm) Product is lead-free, Halogen Free, RoHS / WEEE compliant

Applications

Power load/rail switching Input supply multiplexing Isolated power supplies Solid state relays HVAC control Sprinkler control Internet of Things (IoT)

CVDD CVGG5 CVGG10 RWD Regulator CPTO CREG PTO SYSP SW1 VCC AD2 AD1 VDD SRC VGG10 WD CSYS CWD

Pin Symbol SUB SYSP SYSM VDD PTO CLK DATA AD2 AD1 N/C AD0 WD SRC SW2 GATE2 SRC GATE1 SW1 SUB Pin PAD Function IC Substrate Connection Positive System Voltage Negative System Voltage Bias Voltage Output Power Transfer Output Clock Input Data Output Address Select 2 Address Select 1 No Connect Address Select 0 Watch Dog Source Bias Voltage Output Bias Voltage Output Switch Output Node 2 Gate 2 Source Gate 1 Switch Output Node 1 Thermal Input Connect thermally to the FET chip Connect to gate of switch between SRC and SW2 Connect to source of external switches Connect to gate of switch between SRC and SW1 For logic 0, must be tied to SRC on PCB For logic 1, must be tied VGG5 on PCB Control input for latching vs non-latching switch Bulk connection of switch, connect VGG5, VGG10 capacitors Connect VGG5 Capacitor to SRC Connect VGG10 Capacitor to SRC Description Connect substrate capacitor from SUB to SYSM Power is harvested from the SW pins Power is harvested from the SW pins Connect VDD Capacitor to SYSM Connect to Power Transfer Capacitor CPTO Galvanically Isolated Clock Input Galvanically Isolated Data Output For logic 0, must be tied to SRC on PCB For logic 1, must be tied VGG5 on PCB For logic 0, must be tied to SRC on PCB For logic 1, must be tied VGG5 on PCB

Over operating free­air temperature range unless otherwise noted(1, 4) Parameter SW2 (2) SYSP, SYSM, PTO VGG10 (2) SUB

Operating Junction Temperature Range, TJ Storage Temperature Range, TSTG Electrostatic Discharge ­ Human Body Model Electrostatic Discharge ­ Charged Device Model Peak IR Reflow Temperature to 30 seconds)

Notes: (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute­maximum­rated conditions for extended periods may affect device reliability. (2) Voltage values are with respect to SRC terminal. (3) Voltage values are with respect to SYSM terminal. (4) ESD testing is performed according to the respective JESD22 JEDEC standard.


 

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