Implementing Bootloader Firmware Application Note
Category: Telephone, cellular phone and intercom
Manufacture: Microchip Technology, Inc.
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This application note discusses the general design requirements for bootloader firmware in a ROMless controller system. To illustrate the key points, a fullyfeatured reference design, with an interface to external host software, is described in detail. Information on integrating a bootloader with user application code is also covered. The reader is expected to be familiar with the following: · General PIC18 architecture · The PIC18 instruction set · External memory interface modes of the PIC18 ROMless devices, and · Interface modes of different non-volatile memory devices
Implementing Bootloader Firmware for the PIC18C601/801 ROMless Microcontrollers
Gaurang Kavaiya and Nilesh Rajbharti Microchip Technology Inc.
The PIC18C601 and PIC18C801 microcontrollers are the first members of Microchip's PIC18 family with no on-chip program memory. They offer the PIC18 architecture, with the ability to use different types and sizes of external program memory (up to 2 Mbyte) to exactly fit most applications. In modern embedded applications, where features and functionality are constantly evolving, FLASH memory is an ideal choice for external program memory. Field upgradability is almost always desirable in these systems, too. Most commonly available FLASH devices, however, disable read access while being programmed or erased. They also require special command sequences for programming, and have longer erase and write times than read times. As a result, systems using FLASH technology require either a second memory device, or a microcontroller with built-in memory space, in order to implement field reprogrammability. PIC18C601/801 controllers do this by allowing part of on-chip data memory to be reconfigured as program memory. To implement reprogrammability, the user must incorporate into their design, a bootloader -- a firmware mechanism that allows a new user application program to be written to the system. The bootloader firmware system must be able to recognize that new user code is available and initiate itself ("invocation"), receive the new code from some communication channel in manageable segments and check it for communication errors ("communication"), and program the memory with the new data and without errors ("programming"). It must also be flexible enough to be able to incorporate new programming methods, as new FLASH devices become available.
PROGRAMMING A ROMLESS SYSTEM: OVERVIEW
PIC18C601/801 controllers offer no on-chip program memory. In normal operation, program instructions are fetched and executed directly from the external memory. These microcontrollers also offer 1.5 Kbytes of onchip data memory. Of this, the last 512 bytes are designated as "Boot RAM". This block can be configured to act as either data or program memory; when set as program memory, it provides the system designer a way to program external FLASH devices without the need for additional hardware. The memory maps for the controllers, showing Boot RAM enabled and disabled, are presented in Figures 1 and 2. When programs are executed from Boot RAM, the system bus and all of its control signals are deactivated. If required, the external system bus may be disabled and turned into I/O port signals. While the Boot RAM is enabled, any attempts to read or write to it are ignored. Any TBLWT instructions attempted to addresses in the Boot RAM space result in an external table write to the external memory, instead. Similarly, TBLRD instructions on the Boot RAM space, are performed on the external memory.
© 2001 Microchip Technology Inc.
A typical bootloader using the Boot RAM performs the following steps: 1. 2. Disable Boot RAM. Transfer the programmer routine of the bootloader program from the external program memory to the Boot RAM, using TBLRD and MOVWF instructions. Enable the Boot RAM. Execute the programmer routine as a data block is received. 5. Perform the necessary programming on the external memory by either executing the necessary TBLRD and TBLWT instructions, or by switching the system bus to I/O ports. Continue to execute the programmer routine from Boot RAM as data blocks are received. Jump to a known valid external program memory location. Reset the system when all data is programmed.
© 2001 Microchip Technology Inc.